2014-10-19 02:40:08 +02:00
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/************************************************************************************
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* arch/arm/src/efm32/efm32_gpio.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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2014-10-19 21:47:52 +02:00
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#include <sys/types.h>
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2014-10-19 02:40:08 +02:00
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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2014-10-19 21:47:52 +02:00
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#include "up_arch.h"
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#include "chip/efm32_gpio.h"
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2014-10-19 02:40:08 +02:00
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#include "efm32_gpio.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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2014-10-19 21:07:52 +02:00
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#define __GPIO_INPUT (1 << 0) /* Bit 0: GPIO is an input */
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#define __GPIO_OUTPUT (1 << 1) /* Bit 1: GPIO is an output */
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#define __GPIO_DOUT (1 << 2) /* Bit 2: An input modified with DOUT setting */
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#define __GPIO_DRIVE (1 << 3) /* Bit 3: An output with drive selection */
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2014-10-19 02:40:08 +02:00
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/************************************************************************************
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2014-10-19 21:07:52 +02:00
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* Private Data
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************************************************************************************/
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static const uint8_t g_gpiomode[16] =
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{
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(__GPIO_DOUT), /* 0 DISABLED Input disabled. Pullup if DOUT is
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* set. */
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(__GPIO_INPUT | __GPIO_DOUT), /* 1 INPUT Input enabled. Filter if DOUT is set. */
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(__GPIO_INPUT | __GPIO_DOUT), /* 2 INPUTPULL Input enabled. DOUT determines pull
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* direction */
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(__GPIO_INPUT | __GPIO_DOUT), /* 3 INPUTPULLFILTER Input enabled with filter.
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* COUT determines pull direction */
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(__GPIO_OUTPUT), /* 4 PUSHPULL Push-pull output */
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(__GPIO_OUTPUT | __GPIO_DRIVE), /* 5 PUSHPULLDRIVE Push-pull output with drive-
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* strength set by DRIVEMODE */
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(__GPIO_OUTPUT), /* 6 WIREDOR Wired-or output */
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(__GPIO_OUTPUT), /* 7 WIREDORPULLDOWN Wired-or output with pull-
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* down */
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(__GPIO_OUTPUT), /* 8 WIREDAND Open-drain output */
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(__GPIO_OUTPUT), /* 9 WIREDANDFILTER Open-drain output with filter */
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(__GPIO_OUTPUT), /* 10 WIREDANDPULLUP Open-drain output with pullup */
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(__GPIO_OUTPUT), /* 11 WIREDANDPULLUPFILTER Open-drain output with
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* filter and pullup */
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(__GPIO_OUTPUT | __GPIO_DRIVE), /* 12 WIREDANDDRIVE Open-drain output with
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* drive-strength set by DRIVEMODE */
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(__GPIO_OUTPUT | __GPIO_DRIVE), /* 13 WIREDANDDRIVEFILTER Open-drain output with
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* filter and drive-strength set by DRIVEMODE */
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(__GPIO_OUTPUT | __GPIO_DRIVE), /* 14 WIREDANDDRIVEPULLUP Open-drain output with
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* pullup and drive-strength set by DRIVEMODE */
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(__GPIO_OUTPUT | __GPIO_DRIVE) /* 15 WIREDANDDRIVEPULLUPFILTER Open-drain output
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* with filter, pullup and drive-strength set
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* by DRIVEMODE */
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};
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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2014-10-19 21:47:52 +02:00
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* Name: efm32_getport
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2014-10-19 21:07:52 +02:00
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*
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* Description:
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* Extract the encoded port number
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*
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************************************************************************************/
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2014-10-19 21:47:52 +02:00
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static inline uint8_t efm32_getport(gpio_pinset_t cfgset)
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2014-10-19 21:07:52 +02:00
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{
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return (uint8_t)((cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
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}
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/************************************************************************************
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2014-10-19 21:47:52 +02:00
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* Name: efm32_getpin
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2014-10-19 21:07:52 +02:00
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*
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* Description:
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* Extract the encoded pin number
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*
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************************************************************************************/
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2014-10-19 21:47:52 +02:00
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static inline uint8_t efm32_getpin(gpio_pinset_t cfgset)
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2014-10-19 21:07:52 +02:00
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{
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return (uint8_t)((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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}
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/************************************************************************************
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2014-10-19 21:47:52 +02:00
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* Name: efm32_getmode
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2014-10-19 21:07:52 +02:00
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*
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* Description:
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* Extract the encoded pin mode
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*
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************************************************************************************/
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2014-10-19 21:47:52 +02:00
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static inline uint8_t efm32_getmode(gpio_pinset_t cfgset)
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2014-10-19 21:07:52 +02:00
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{
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return (uint8_t)((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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}
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/************************************************************************************
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2014-10-19 21:47:52 +02:00
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* Name: efm32_getdrive
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2014-10-19 21:07:52 +02:00
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*
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* Description:
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2014-10-19 21:47:52 +02:00
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* Extract the output drive strength from the encoded configuration
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2014-10-19 21:07:52 +02:00
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*
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2014-10-19 02:40:08 +02:00
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************************************************************************************/
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2014-10-19 21:47:52 +02:00
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static uint8_t efm32_getdrive(uint8_t mode, gpio_pinset_t cfgset)
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2014-10-19 21:07:52 +02:00
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{
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if ((g_gpiomode[mode] & __GPIO_DRIVE) != 0)
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{
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return (uint8_t)((cfgset & GPIO_DRIVE_MASK) >> GPIO_DRIVE_SHIFT);
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}
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else
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{
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return _GPIO_DRIVE_STANDARD;
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}
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}
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/************************************************************************************
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2014-10-19 21:47:52 +02:00
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* Name: efm32_setdrive
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*
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* Description:
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* Set the GPIO output drive strength
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*
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************************************************************************************/
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static inline void efm32_setdrive(uintptr_t base, uint8_t pin, uint8_t drive)
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{
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/* Select drive mode for all pins on port configured with alternate drive
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* strength.
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*
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* REVISIT: Is there any sane way to manage this for multiple pins in the port
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* with different drive values?
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*/
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putreg32((uint32_t)drive << _GPIO_P_CTRL_DRIVEMODE_SHIFT,
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base + EFM32_GPIO_Pn_CTRL_OFFSET);
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}
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/************************************************************************************
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* Name: efm32_getdout
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2014-10-19 21:07:52 +02:00
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*
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* Description:
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* Extract the encoded port number
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*
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************************************************************************************/
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2014-10-19 21:47:52 +02:00
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static inline bool efm32_getdout(uint8_t mode, gpio_pinset_t cfgset)
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2014-10-19 21:07:52 +02:00
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{
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if ((g_gpiomode[mode] & __GPIO_DOUT) != 0)
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{
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2014-10-19 21:47:52 +02:00
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return (bool)((cfgset >> GPIO_MODE_DOUT_SHIFT) & 1);
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2014-10-19 21:07:52 +02:00
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}
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else if ((g_gpiomode[mode] & __GPIO_OUTPUT) != 0)
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{
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2014-10-19 21:47:52 +02:00
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return (bool)((cfgset >> GPIO_OUTPUT_SHIFT) & 1);
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2014-10-19 21:07:52 +02:00
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}
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else
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{
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return 0;
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}
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}
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2014-10-19 21:47:52 +02:00
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/************************************************************************************
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* Name: efm32_setdout
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*
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* Description:
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* Set the GPIO output data value
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*
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************************************************************************************/
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static inline void efm32_setdout(uintptr_t base, uint8_t pin, bool dout)
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{
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/* Set or clear the port data out bit */
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if (dout)
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{
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putreg32(1 << pin, base + EFM32_GPIO_Pn_DOUTSET_OFFSET);
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}
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else
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{
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putreg32(1 << pin, base + EFM32_GPIO_Pn_DOUTCLR_OFFSET);
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}
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}
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/************************************************************************************
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* Name: efm32_getdin
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*
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* Description:
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* Get the GPIO input value
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*
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************************************************************************************/
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static inline bool efm32_getdin(uintptr_t base, uint8_t pin)
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{
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return ((getreg32(base + EFM32_GPIO_Pn_DIN_OFFSET) & ((uint32_t)1 << pin)) != 0);
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}
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/************************************************************************************
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* Name: efm32_setmode
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*
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* Description:
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* Set the GPIO mode
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*
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************************************************************************************/
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static inline void efm32_setmode(uintptr_t base, uint8_t pin, uint8_t mode)
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{
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uintptr_t regaddr;
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unsigned int shift;
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uint32_t regval;
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/* Select high or low register */
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if (pin < 8)
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{
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regaddr = base + EFM32_GPIO_Pn_MODEL_OFFSET;
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shift = (unsigned int)pin << 2;
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}
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else
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{
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regaddr = base + EFM32_GPIO_Pn_MODEH_OFFSET;
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shift = (unsigned int)(pin - 8) << 2;
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}
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/* Set the new mode */
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regval = getreg32(regaddr);
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regval &= ~((uint32_t)15 << shift);
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regval |= ~((uint32_t)mode << shift);
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putreg32(regval, regaddr);
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}
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2014-10-19 02:40:08 +02:00
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: efm32_configgpio
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*
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* Description:
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* Configure a PIO pin based on bit-encoded description of the pin.
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*
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************************************************************************************/
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int efm32_configgpio(gpio_pinset_t cfgset)
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{
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2014-10-19 21:47:52 +02:00
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uintptr_t base;
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uint8_t port;
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uint8_t pin;
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uint8_t mode;
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uint8_t drive;
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bool dout;
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2014-10-19 21:07:52 +02:00
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2014-10-19 21:47:52 +02:00
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/* Get basic pin configuration information */
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port = efm32_getpin(cfgset);
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base = EFM32_GPIO_Pn_BASE(port);
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pin = efm32_getport(cfgset);
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mode = efm32_getmode(cfgset);
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/* Set the drive strength in the GPIO control register */
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drive = efm32_getdrive(mode, cfgset);
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efm32_setdrive(base, pin, drive);
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/* Set the port data out register */
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dout = efm32_getdout(mode, cfgset);
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efm32_setdout(base, pin, dout);
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/* Finally, set the pin mode */
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efm32_setmode(base, pin, mode);
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return OK;
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2014-10-19 02:40:08 +02:00
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}
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/************************************************************************************
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* Name: efm32_gpiowrite
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*
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* Description:
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* Write one or zero to the selected PIO pin
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*
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************************************************************************************/
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void efm32_gpiowrite(gpio_pinset_t pinset, bool value)
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{
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2014-10-19 21:47:52 +02:00
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uintptr_t base;
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uint8_t port;
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uint8_t pin;
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/* Get basic pin configuration information */
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port = efm32_getpin(pinset);
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base = EFM32_GPIO_Pn_BASE(port);
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pin = efm32_getport(pinset);
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/* And set the output value */
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efm32_setdout(base, pin, value);
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2014-10-19 02:40:08 +02:00
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}
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/************************************************************************************
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* Name: efm32_gpioread
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*
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* Description:
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* Read one or zero from the selected PIO pin
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*
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************************************************************************************/
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bool efm32_gpioread(gpio_pinset_t pinset)
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{
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2014-10-19 21:47:52 +02:00
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uintptr_t base;
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uint8_t port;
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uint8_t pin;
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/* Get basic pin configuration information */
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port = efm32_getpin(pinset);
|
|
|
|
base = EFM32_GPIO_Pn_BASE(port);
|
|
|
|
pin = efm32_getport(pinset);
|
|
|
|
|
|
|
|
/* And return the input value of the pin */
|
|
|
|
|
|
|
|
return efm32_getdin(base, pin);
|
2014-10-19 02:40:08 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Function: efm32_dumpgpio
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Dump all PIO registers associated with the base address of the provided pinset.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_GPIO
|
|
|
|
int efm32_dumpgpio(uint32_t pinset, const char *msg)
|
|
|
|
{
|
|
|
|
#warning Missing logic
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
#endif
|