2014-10-21 17:21:03 +02:00
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/****************************************************************************
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* arch/arm/src/efm32/efm32_leserial.c
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*
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* Copyright (C) 2024 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial/serial.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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2014-10-21 19:38:51 +02:00
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#include "chip/efm32_leuart.h"
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2014-10-21 17:21:03 +02:00
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#include "efm32_config.h"
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#include "efm32_lowputc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Some sanity checks *******************************************************/
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/* Is there at least one UART enabled and configured as a RS-232 device? */
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#ifndef HAVE_LEUART_DEVICE
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# warning "No LEUARTs enabled"
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#endif
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/* If we are not using the serial driver for the console, then we still must
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* provide some minimal implementation of up_putc.
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*/
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#ifdef USE_SERIALDRIVER
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/* Which LEUART with be ttyLE0/console and which ttyLE1? The console will always
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* be ttyLE0. If there is no console then will use the lowest numbered LEUART.
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*/
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/* First pick the console and ttys0. This could be either LEUART0-1 */
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#if defined(CONFIG_LEUART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_leuart0port /* LEUART0 is console */
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# define TTYLE0_DEV g_leuart0port /* LEUART0 is ttyLE0 */
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# define LEUART0_ASSIGNED 1
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#elif defined(CONFIG_LEUART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_leuart1port /* LEUART1 is console */
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# define TTYLE0_DEV g_leuart1port /* LEUART1 is ttyLE0 */
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# define LEUART1_ASSIGNED 1
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#else
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# undef CONSOLE_DEV /* No console */
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# if defined(CONFIG_EFM32_LEUART0)
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# define TTYLE0_DEV g_leuart0port /* LEUART0 is ttyLE0 */
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# define LEUART0_ASSIGNED 1
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# elif defined(CONFIG_EFM32_LEUART1)
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# define TTYLE0_DEV g_leuart1port /* LEUART1 is ttyLE0 */
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# define LEUART1_ASSIGNED 1
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# endif
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#endif
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/* Pick ttyLE1. This could be any of LEUART0-1, excluding the and the
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* LEUART already selected for ttyLE0
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*/
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#if defined(CONFIG_EFM32_LEUART0) && !defined(LEUART0_ASSIGNED)
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# define TTYLE1_DEV g_leuart0port /* LEUART0 is ttyLE1 */
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# define LEUART0_ASSIGNED 1
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#elif defined(CONFIG_EFM32_LEUART1) && !defined(LEUART1_ASSIGNED)
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# define TTYLE1_DEV g_leuart1port /* LEUART1 is ttyLE1 */
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# define LEUART1_ASSIGNED 1
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#endif
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/* TX/RX interrupts */
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#define EFM32_TXERR_INTS (LEUART_IEN_TXOF)
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#define EFM32_RXERR_INTS (LEUART_IEN_RXOF | LEUART_IEN_PERR | \
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LEUART_IEN_FERR)
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2016-06-11 22:14:08 +02:00
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#ifdef CONFIG_DEBUG_FEATURES
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2014-10-21 17:21:03 +02:00
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# define EFM32_TX_INTS (LEUART_IEN_TXBL | EFM32_TXERR_INTS)
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# define EFM32_RX_INTS (LEUART_IEN_RXDATAV | EFM32_RXERR_INTS)
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#else
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# define EFM32_TX_INTS LEUART_IEN_TXBL
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# define EFM32_RX_INTS LEUART_IEN_RXDATAV
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct efm32_config_s
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{
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uintptr_t uartbase; /* Base address of UART registers */
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xcpt_t handler; /* Interrupt handler */
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uint32_t baud; /* Configured baud */
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uint8_t irq; /* IRQ associated with this LEUART (for enable) */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (8 or 9) */
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bool stop2; /* True: 2 stop bits */
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};
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struct efm32_leuart_s
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{
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const struct efm32_config_s *config;
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uint16_t ien; /* Interrupts enabled */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static inline uint32_t efm32_serialin(struct efm32_leuart_s *priv, int offset);
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static inline void efm32_serialout(struct efm32_leuart_s *priv, int offset,
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uint32_t value);
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static inline void efm32_setuartint(struct efm32_leuart_s *priv);
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static void efm32_restoreuartint(struct efm32_leuart_s *priv, uint32_t ien);
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static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien);
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static int efm32_setup(struct uart_dev_s *dev);
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static void efm32_shutdown(struct uart_dev_s *dev);
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static int efm32_attach(struct uart_dev_s *dev);
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static void efm32_detach(struct uart_dev_s *dev);
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static int efm32_interrupt(struct uart_dev_s *dev);
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#if defined(CONFIG_EFM32_LEUART0)
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static int efm32_leuart0_interrupt(int irq, void *context);
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#endif
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#if defined(CONFIG_EFM32_LEUART1)
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static int efm32_leuart1_interrupt(int irq, void *context);
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#endif
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static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int efm32_receive(struct uart_dev_s *dev, uint32_t *status);
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static void efm32_rxint(struct uart_dev_s *dev, bool enable);
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static bool efm32_rxavailable(struct uart_dev_s *dev);
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static void efm32_send(struct uart_dev_s *dev, int ch);
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static void efm32_txint(struct uart_dev_s *dev, bool enable);
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static bool efm32_txready(struct uart_dev_s *dev);
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static bool efm32_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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2016-02-22 01:06:09 +01:00
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* Private Data
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2014-10-21 17:21:03 +02:00
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****************************************************************************/
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static const struct uart_ops_s g_leuart_ops =
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{
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.setup = efm32_setup,
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.shutdown = efm32_shutdown,
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.attach = efm32_attach,
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.detach = efm32_detach,
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.ioctl = efm32_ioctl,
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.receive = efm32_receive,
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.rxint = efm32_rxint,
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.rxavailable = efm32_rxavailable,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.rxflowcontrol = NULL,
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#endif
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.send = efm32_send,
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.txint = efm32_txint,
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.txready = efm32_txready,
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.txempty = efm32_txempty,
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};
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/* I/O buffers */
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#ifdef CONFIG_EFM32_LEUART0
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static char g_leuart0rxbuffer[CONFIG_LEUART0_RXBUFSIZE];
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static char g_leuart0txbuffer[CONFIG_LEUART0_TXBUFSIZE];
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#endif
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#ifdef CONFIG_EFM32_LEUART1
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static char g_leuart1rxbuffer[CONFIG_LEUART1_RXBUFSIZE];
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static char g_leuart1txbuffer[CONFIG_LEUART1_TXBUFSIZE];
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#endif
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/* This describes the state of the EFM32 LEUART0 port. */
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#ifdef CONFIG_EFM32_LEUART0
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2014-10-29 16:37:39 +01:00
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static const struct efm32_config_s g_leuart0config =
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2014-10-21 17:21:03 +02:00
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{
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.uartbase = EFM32_LEUART0_BASE,
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.handler = efm32_leuart0_interrupt,
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.baud = CONFIG_LEUART0_BAUD,
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.irq = EFM32_IRQ_LEUART0,
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.parity = CONFIG_LEUART0_PARITY,
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.bits = CONFIG_LEUART0_BITS,
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.stop2 = CONFIG_LEUART0_2STOP,
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};
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static struct efm32_leuart_s g_leuart0priv =
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{
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.config = &g_leuart0config,
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};
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static struct uart_dev_s g_leuart0port =
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{
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.recv =
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{
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.size = CONFIG_LEUART0_RXBUFSIZE,
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.buffer = g_leuart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_LEUART0_TXBUFSIZE,
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.buffer = g_leuart0txbuffer,
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},
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.ops = &g_leuart_ops,
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.priv = &g_leuart0priv,
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};
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#endif
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/* This describes the state of the EFM32 LEUART1 port. */
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#ifdef CONFIG_EFM32_LEUART1
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static struct efm32_config_s g_leuart1config =
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{
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.uartbase = EFM32_LEUART1_BASE,
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.handler = efm32_leuart1_interrupt,
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.baud = CONFIG_LEUART1_BAUD,
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.irq = EFM32_IRQ_LEUART1,
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.parity = CONFIG_LEUART1_PARITY,
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.bits = CONFIG_LEUART1_BITS,
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.stop2 = CONFIG_LEUART1_2STOP,
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};
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static struct efm32_leuart_s g_leuart1priv =
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{
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.config = &g_leuart1config,
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};
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static struct uart_dev_s g_leuart1port =
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{
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.recv =
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{
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.size = CONFIG_LEUART1_RXBUFSIZE,
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.buffer = g_leuart1rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_LEUART1_TXBUFSIZE,
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.buffer = g_leuart1txbuffer,
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},
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.ops = &g_leuart_ops,
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.priv = &g_leuart1priv,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: efm32_serialin
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****************************************************************************/
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static inline uint32_t efm32_serialin(struct efm32_leuart_s *priv, int offset)
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{
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return getreg32(priv->config->uartbase + offset);
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}
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/****************************************************************************
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* Name: efm32_serialout
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****************************************************************************/
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static inline void efm32_serialout(struct efm32_leuart_s *priv, int offset,
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uint32_t value)
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{
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putreg32(value, priv->config->uartbase + offset);
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}
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/****************************************************************************
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* Name: efm32_setuartint
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****************************************************************************/
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static inline void efm32_setuartint(struct efm32_leuart_s *priv)
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{
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efm32_serialout(priv, EFM32_LEUART_IEN_OFFSET, priv->ien);
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}
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/****************************************************************************
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* Name: efm32_restoreuartint
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****************************************************************************/
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static void efm32_restoreuartint(struct efm32_leuart_s *priv, uint32_t ien)
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{
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irqstate_t flags;
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/* Re-enable/re-disable interrupts corresponding to the state of bits in ien */
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2016-02-14 02:11:09 +01:00
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flags = enter_critical_section();
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2014-10-21 17:21:03 +02:00
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priv->ien = ien;
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efm32_setuartint(priv);
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2016-02-14 02:11:09 +01:00
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leave_critical_section(flags);
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2014-10-21 17:21:03 +02:00
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}
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/****************************************************************************
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* Name: efm32_disableuartint
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****************************************************************************/
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static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien)
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{
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irqstate_t flags;
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2016-02-14 02:11:09 +01:00
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flags = enter_critical_section();
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2014-10-21 17:21:03 +02:00
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if (ien)
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2015-10-06 01:13:53 +02:00
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{
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*ien = priv->ien;
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}
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2014-10-21 17:21:03 +02:00
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efm32_restoreuartint(priv, 0);
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2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2014-10-21 17:21:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_setup
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure the UART baud, bits, parity, etc. This method is called the
|
|
|
|
* first time that the serial port is opened.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int efm32_setup(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
#ifndef CONFIG_SUPPRESS_LEUART_CONFIG
|
2015-10-06 01:13:53 +02:00
|
|
|
const struct efm32_config_s *config = priv->config;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
2015-10-06 01:13:53 +02:00
|
|
|
/* Configure the UART as an RS-232 UART */
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
efm32_leuartconfigure(config->uartbase, config->baud, config->parity,
|
|
|
|
config->bits, config->stop2);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Make sure that all interrupts are disabled */
|
|
|
|
|
|
|
|
efm32_restoreuartint(priv, 0);
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_shutdown
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Disable the UART. This method is called when the serial
|
|
|
|
* port is closed
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void efm32_shutdown(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
/* Disable interrupts */
|
|
|
|
|
|
|
|
efm32_restoreuartint(priv, 0);
|
|
|
|
|
|
|
|
/* Reset the LEUART/UART by disabling it and restoring all of the registers
|
|
|
|
* to the initial, reset value. Only the ROUTE data set by efm32_lowsetup
|
|
|
|
* is preserved.
|
|
|
|
*/
|
|
|
|
|
|
|
|
efm32_leuart_reset(priv->config->uartbase);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_attach
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure the UART to operation in interrupt driven mode. This method is
|
|
|
|
* called when the serial port is opened. Normally, this is just after the
|
|
|
|
* the setup() method is called, however, the serial console may operate in
|
|
|
|
* a non-interrupt driven mode during the boot phase.
|
|
|
|
*
|
|
|
|
* RX and TX interrupts are not enabled when by the attach method (unless the
|
|
|
|
* hardware supports multiple levels of interrupt enabling). The RX and TX
|
|
|
|
* interrupts are not enabled until the txint() and rxint() methods are called.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int efm32_attach(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
const struct efm32_config_s *config = priv->config;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Attach and enable the IRQ(s). The interrupts are (probably) still
|
|
|
|
* disabled in the C2 register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
ret = irq_attach(config->irq, config->handler);
|
|
|
|
if (ret >= 0)
|
|
|
|
{
|
|
|
|
up_enable_irq(config->irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_detach
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Detach UART interrupts. This method is called when the serial port is
|
|
|
|
* closed normally just before the shutdown method is called. The exception
|
|
|
|
* is the serial console which is never shutdown.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void efm32_detach(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
const struct efm32_config_s *config = priv->config;
|
|
|
|
|
|
|
|
/* Disable interrupts */
|
|
|
|
|
|
|
|
efm32_restoreuartint(priv, 0);
|
|
|
|
up_disable_irq(config->irq);
|
|
|
|
|
|
|
|
/* Detach from the interrupt(s) */
|
|
|
|
|
|
|
|
irq_detach(config->irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_interrupt
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This is the common UART RX interrupt handler.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int efm32_interrupt(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
uint32_t intflags;
|
|
|
|
|
|
|
|
DEBUGASSERT(priv);
|
|
|
|
|
|
|
|
/* Read the interrupt flags register */
|
|
|
|
|
|
|
|
intflags = efm32_serialin(priv, EFM32_LEUART_IF_OFFSET);
|
|
|
|
|
|
|
|
/* Clear pending interrupts by writing to the interrupt flag clear
|
|
|
|
* register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
efm32_serialout(priv, EFM32_LEUART_IFC_OFFSET, intflags);
|
|
|
|
|
|
|
|
/* Check if the receive data is available is full (RXDATAV). */
|
|
|
|
|
|
|
|
if ((intflags & LEUART_IEN_RXDATAV) != 0)
|
|
|
|
{
|
|
|
|
/* Process incoming bytes */
|
|
|
|
|
|
|
|
uart_recvchars(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if the transmit data buffer became empty */
|
|
|
|
|
|
|
|
if ((intflags & LEUART_IEN_TXBL) != 0)
|
|
|
|
{
|
|
|
|
/* Process outgoing bytes */
|
|
|
|
|
|
|
|
uart_xmitchars(dev);
|
|
|
|
}
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2014-10-21 17:21:03 +02:00
|
|
|
/* Check for receive errors */
|
|
|
|
|
|
|
|
if ((intflags & EFM32_RXERR_INTS) != 0)
|
|
|
|
{
|
|
|
|
/* RXOF - RX Overflow Interrupt Enable
|
|
|
|
* RXUF - RX Underflow Interrupt Enable
|
|
|
|
* TXUF - TX Underflow Interrupt Enable
|
|
|
|
* PERR - Parity Error Interrupt Enable
|
|
|
|
* FERR - Framing Error Interrupt Enable
|
|
|
|
*/
|
|
|
|
|
2016-06-16 20:33:32 +02:00
|
|
|
_llerr("RX ERROR: %08x\n", intflags);
|
2014-10-21 17:21:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for transmit errors */
|
|
|
|
|
|
|
|
if ((intflags & EFM32_TXERR_INTS) != 0)
|
|
|
|
{
|
|
|
|
/* TXOF - TX Overflow Interrupt Enable */
|
|
|
|
|
2016-06-16 20:33:32 +02:00
|
|
|
_llerr("RX ERROR: %08x\n", intflags);
|
2014-10-21 17:21:03 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(CONFIG_EFM32_LEUART0)
|
|
|
|
static int efm32_leuart0_interrupt(int irq, void *context)
|
|
|
|
{
|
|
|
|
return efm32_interrupt(&g_leuart0port);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(CONFIG_EFM32_LEUART1)
|
|
|
|
static int efm32_leuart1_interrupt(int irq, void *context)
|
|
|
|
{
|
|
|
|
return efm32_interrupt(&g_leuart1port);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_ioctl
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* All ioctl calls will be routed through this method
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|
|
|
{
|
|
|
|
#if 0 /* Reserved for future growth */
|
|
|
|
struct inode *inode;
|
|
|
|
struct uart_dev_s *dev;
|
|
|
|
struct efm32_leuart_s *priv;
|
|
|
|
int ret = OK;
|
|
|
|
|
|
|
|
DEBUGASSERT(filep, filep->f_inode);
|
|
|
|
inode = filep->f_inode;
|
|
|
|
dev = inode->i_private;
|
|
|
|
|
2015-05-27 21:32:39 +02:00
|
|
|
DEBUGASSERT(dev, dev->priv);
|
2015-10-07 01:28:32 +02:00
|
|
|
priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
switch (cmd)
|
|
|
|
{
|
|
|
|
case xxx: /* Add commands here */
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
ret = -ENOTTY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
#else
|
|
|
|
return -ENOTTY;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_receive
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called (usually) from the interrupt level to receive one
|
|
|
|
* character from the UART. Error bits associated with the
|
|
|
|
* receipt are provided in the return 'status'.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int efm32_receive(struct uart_dev_s *dev, uint32_t *status)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
uint32_t rxdatax;
|
|
|
|
|
|
|
|
/* Get error status information:
|
|
|
|
*
|
|
|
|
* FERR Data Framing Error
|
|
|
|
* PERR Data Parity Error
|
|
|
|
*/
|
|
|
|
|
|
|
|
rxdatax = efm32_serialin(priv, EFM32_LEUART_RXDATAX_OFFSET);
|
|
|
|
|
|
|
|
/* Return status information */
|
|
|
|
|
|
|
|
if (status)
|
|
|
|
{
|
|
|
|
*status = rxdatax;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Then return the actual received byte. */
|
|
|
|
|
|
|
|
return (int)(rxdatax & _LEUART_RXDATAX_RXDATA_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_rxint
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Call to enable or disable RX interrupts
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void efm32_rxint(struct uart_dev_s *dev, bool enable)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
flags = enter_critical_section();
|
2014-10-21 17:21:03 +02:00
|
|
|
if (enable)
|
|
|
|
{
|
|
|
|
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
|
|
|
|
* timeout occurs).
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
|
|
priv->ien |= EFM32_RX_INTS;
|
|
|
|
efm32_setuartint(priv);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
priv->ien &= ~EFM32_RX_INTS;
|
|
|
|
efm32_setuartint(priv);
|
|
|
|
}
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2014-10-21 17:21:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_rxavailable
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true if the receive register is not empty
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static bool efm32_rxavailable(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
/* Return true if the receive data is available (RXDATAV). */
|
|
|
|
|
|
|
|
return (efm32_serialin(priv, EFM32_LEUART_STATUS_OFFSET) & LEUART_STATUS_RXDATAV) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_send
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method will send one byte on the UART.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void efm32_send(struct uart_dev_s *dev, int ch)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
efm32_serialout(priv, EFM32_LEUART_TXDATA_OFFSET, (uint32_t)ch);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_txint
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Call to enable or disable TX interrupts
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void efm32_txint(struct uart_dev_s *dev, bool enable)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
flags = enter_critical_section();
|
2014-10-21 17:21:03 +02:00
|
|
|
if (enable)
|
|
|
|
{
|
|
|
|
/* Enable the TX interrupt */
|
|
|
|
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
|
|
priv->ien |= EFM32_TX_INTS;
|
|
|
|
efm32_setuartint(priv);
|
|
|
|
|
|
|
|
/* Fake a TX interrupt here by just calling uart_xmitchars() with
|
|
|
|
* interrupts disabled (note this may recurse).
|
|
|
|
*/
|
|
|
|
|
|
|
|
uart_xmitchars(dev);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Disable the TX interrupt */
|
|
|
|
|
|
|
|
priv->ien &= ~EFM32_TX_INTS;
|
|
|
|
efm32_setuartint(priv);
|
|
|
|
}
|
|
|
|
|
2016-02-14 02:11:09 +01:00
|
|
|
leave_critical_section(flags);
|
2014-10-21 17:21:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_txready
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true if the transmit data register is not full
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static bool efm32_txready(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
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|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
/* The TX Buffer Level (TXBL) status bit indicates the level of the
|
|
|
|
* transmit buffer. Set when the transmit buffer is empty, and cleared
|
|
|
|
* when it is full.
|
|
|
|
*/
|
|
|
|
|
|
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|
return (efm32_serialin(priv, EFM32_LEUART_STATUS_OFFSET) & LEUART_STATUS_TXBL) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: efm32_txempty
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true if the transmit data register is empty
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static bool efm32_txempty(struct uart_dev_s *dev)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
|
|
|
|
/* TX Complete (TXC) is set when a transmission has completed and no more
|
|
|
|
* data is available in the transmit buffer.
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (efm32_serialin(priv, EFM32_LEUART_STATUS_OFFSET) & LEUART_STATUS_TXC) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_earlyserialinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Performs the low level UART initialization early in debug so that the
|
|
|
|
* serial console will be available during bootup. This must be called
|
|
|
|
* before up_serialinit. NOTE: This function depends on GPIO pin
|
|
|
|
* configuration performed in efm32_consoleinit() and main clock iniialization
|
|
|
|
* performed in efm32_clkinitialize().
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_earlyserialinit(void)
|
|
|
|
{
|
|
|
|
/* Disable interrupts from all UARTS. The console is enabled in
|
|
|
|
* pic32mx_consoleinit()
|
|
|
|
*/
|
|
|
|
|
|
|
|
efm32_restoreuartint(TTYLE0_DEV.priv, 0);
|
|
|
|
#ifdef TTYLE1_DEV
|
|
|
|
efm32_restoreuartint(TTYLE1_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Configuration whichever one is the console */
|
|
|
|
|
|
|
|
#ifdef CONSOLE_DEV
|
|
|
|
CONSOLE_DEV.isconsole = true;
|
|
|
|
efm32_setup(&CONSOLE_DEV);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_serialinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Register serial console and serial ports. This assumes that
|
|
|
|
* up_earlyserialinit was called previously.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_serialinit(void)
|
|
|
|
{
|
|
|
|
/* Register the console */
|
|
|
|
|
|
|
|
#ifdef CONSOLE_DEV
|
|
|
|
(void)uart_register("/dev/console", &CONSOLE_DEV);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Register all UARTs */
|
|
|
|
|
|
|
|
(void)uart_register("/dev/ttyLE0", &TTYLE0_DEV);
|
|
|
|
#ifdef TTYLE1_DEV
|
|
|
|
(void)uart_register("/dev/ttyLE1", &TTYLE1_DEV);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_putc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Provide priority, low-level access to support OS debug writes
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_CONSOLE
|
|
|
|
int up_putc(int ch)
|
|
|
|
{
|
2015-10-07 01:28:32 +02:00
|
|
|
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)CONSOLE_DEV.priv;
|
2014-10-21 17:21:03 +02:00
|
|
|
uint32_t ien;
|
|
|
|
|
|
|
|
efm32_disableuartint(priv, &ien);
|
|
|
|
|
|
|
|
/* Check for LF */
|
|
|
|
|
|
|
|
if (ch == '\n')
|
|
|
|
{
|
|
|
|
/* Add CR */
|
|
|
|
|
|
|
|
efm32_lowputc('\r');
|
|
|
|
}
|
|
|
|
|
|
|
|
efm32_lowputc(ch);
|
|
|
|
efm32_restoreuartint(priv, ien);
|
|
|
|
return ch;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#else /* USE_SERIALDRIVER */
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_putc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Provide priority, low-level access to support OS debug writes
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_CONSOLE
|
|
|
|
int up_putc(int ch)
|
|
|
|
{
|
|
|
|
/* Check for LF */
|
|
|
|
|
|
|
|
if (ch == '\n')
|
|
|
|
{
|
|
|
|
/* Add CR */
|
|
|
|
|
|
|
|
efm32_lowputc('\r');
|
|
|
|
}
|
|
|
|
|
|
|
|
efm32_lowputc(ch);
|
|
|
|
return ch;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* USE_SERIALDRIVER */
|