82 lines
2.6 KiB
ReStructuredText
82 lines
2.6 KiB
ReStructuredText
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======================
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Zynq UltraScale+ MPSoC
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======================
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The Zynq UltraScale+ MPSoC family consists of a system-on-chip (SoC) style integrated
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processing system (PS) and a Programmable Logic (PL) unit, providing an extensible and
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flexible SoC solution on a single die.There's 64-bit Quadcore ARM Cortex-A53 Processors
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and Dualcore ARM Cortex-R5 Real-Time Processors in the MPSoC, zynq-mpsoc given support
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for Quadcore ARM Cortex-A53 Processors of MPSoC
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= ===============
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Peripheral Support Notes
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========== ======= ===============
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MIO Yes
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EMIO Yes Depending on PL
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I2C No
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CAN No
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NET No
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SPI No
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QSPI No
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TIMER NO
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UART Yes
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WDT No
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DMA No
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SDI No
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ADC No Depending on PL
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DAC No Depending on PL
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PCI NO Depending on PL
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========== ======= ===============
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MIO/EMIO
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--------
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Key features of the GPIO peripheral are summarized as follows:
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- 78 GPIO interfaces to the device pins.
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- Routed through the MIO multiplexer.
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- Programmable I/O drive strength, slew rate, and 3-state control.
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- 96 GPIO interfaces to the PL (four allocated by software to reset PL logic).
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- Routed through the EMIO interface.
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- Data inputs.
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- Data outputs.
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- Output enables.
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- I/O interface is organized into six banks (3 MIO and 3 EMIO).
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Pins can be configured/operated using ``zynq_mio_*`` functions. To handled 96 GPIO in 3
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EMIO banks you should map GPIO to chip's pin by HDL design in PL logic.
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UART
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----
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Zynq UltraScale+ MPSoC have two high-speed UARTs (up to 1Mb/s). The UART controller is
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a full-duplex asynchronous receiver and transmitter that supports a wide range of
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programmable baud rates and I/O signal formats. The controller can accommodate
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automatic parity generation and multi-master detection mode this may introduce a large
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number of interrupts which may be undesirable.
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UART can be configured/operated using ``zynq_uart_*`` functions. Both receive and
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transmit can be operated in interrupt mode and polling mode.
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Psci and debug
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--------------
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Default exception level is EL1 for the NuttX OS. However, if we debug NuttX by JTAG
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the XSCT of Vivado SDK will set the Zynq MPSoC to EL3. so have to config NuttX to run on
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EL3. Other levels are not supported at the moment. And in this operating conditon
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we can't use SMC for there's no ATF support.
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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