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nuttx/boards/x86_64/intel64/qemu-intel64/configs/ostest/defconfig

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Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
#
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
# This file is autogenerated: PLEASE DO NOT EDIT IT.
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
#
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_16550_ADDRWIDTH=16
CONFIG_16550_UART0=y
CONFIG_16550_UART0_BASE=0x3f8
CONFIG_16550_UART0_CLOCK=1843200
CONFIG_16550_UART0_IRQ=36
CONFIG_16550_UART0_RXBUFSIZE=16
CONFIG_16550_UART0_SERIAL_CONSOLE=y
CONFIG_16550_UART0_TXBUFSIZE=16
CONFIG_16550_UART=y
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_ARCH="x86_64"
CONFIG_ARCH_BOARD="qemu-intel64"
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_ARCH_BOARD_INTEL64_QEMU=y
CONFIG_ARCH_CHIP="intel64"
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_ARCH_INTEL64_CORE_FREQ_KHZ=2600000
CONFIG_ARCH_SIZET_LONG=y
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_ARCH_X86_64=y
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_BOARD_LOOPSPERMSEC=999
CONFIG_BOOT_RUNFROMEXTSRAM=y
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_CLOCK_MONOTONIC=y
CONFIG_CONSOLE_SYSLOG=y
CONFIG_IDLETHREAD_STACKSIZE=4194304
boards/x86_64/intel64: enable CONFIG_LIBM=y to fix the math.h can't be found on macOS Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-06-29 15:54:37 +02:00
CONFIG_LIBM=y
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_MAX_TASKS=64
CONFIG_PREALLOC_CHILDSTATUS=16
CONFIG_PRIORITY_INHERITANCE=y
CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_PTHREAD_STACK_DEFAULT=4194304
CONFIG_PTHREAD_STACK_MIN=4194304
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_RAM_SIZE=268435456
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_SCHED_CHILD_STATUS=y
CONFIG_SCHED_HAVE_PARENT=y
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_SCHED_TICKLESS=y
CONFIG_SCHED_TICKLESS_ALARM=y
CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SIG_DEFAULT=y
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_START_DAY=3
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2011
CONFIG_SYSTEM_TIME64=y
Flat address x86_64 port of Nuttx (#411) * arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
2020-03-04 00:29:13 +01:00
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_STACKSIZE=4149304
Run refresh.sh --silent all Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-17 21:18:23 +02:00
CONFIG_USEC_PER_TICK=1
CONFIG_USERMAIN_STACKSIZE=4194304
CONFIG_USER_ENTRYPOINT="ostest_main"
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