2019-12-08 13:26:55 +01:00
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/*****************************************************************************
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2019-11-09 00:18:01 +01:00
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* boards/arm/imxrt/imxrt1020-evk/include/board.h
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*
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2019-12-08 15:02:31 +01:00
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* Copyright (C) 2018-2019 Gregory Nutt. All rights reserved.
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2019-11-09 00:18:01 +01:00
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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* Dave Marples <dave@marples.net>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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2019-11-11 23:06:43 +01:00
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#ifndef __BOARDS_ARM_IMXRT1020_EVK_INCLUDE_BOARD_H
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#define __BOARDS_ARM_IMXRT1020_EVK_INCLUDE_BOARD_H
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2019-11-09 00:18:01 +01:00
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/* Do not include i.MXRT header files here */
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* Set VDD_SOC to 1.25V */
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#define IMXRT_VDD_SOC (0x12)
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/* Set Sys PLL (PLL2) to fOut = (24Mhz * SYS_PLL_DIV_SELECT) / ARM_PODF_DIVISOR
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* 528Mhz = (24Mhz * SYS_PLL_DIV_SELECT) / ARM_PODF_DIVISOR
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* SYS_PLL_DIV_SELECT = 22
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* SYS_PODF_DIVISOR = 1
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* 528Mhz = (24Mhz * 22) / 1
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*
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* AHB_CLOCK_ROOT = PLL6fOut / IMXRT_AHB_PODF_DIVIDER
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* 1Hz to 500 Mhz = Mhz / IMXRT_ARM_CLOCK_DIVIDER
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* IMXRT_ARM_CLOCK_DIVIDER = 1
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* 500Mhz = 500Mhz / 1
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*
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* PRE_PERIPH_CLK_SEL = PRE_PERIPH_CLK_SEL_PLL6
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* PERIPH_CLK = 500Mhz
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*
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* IPG_CLOCK_ROOT = AHB_CLOCK_ROOT / IMXRT_IPG_PODF_DIVIDER
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* IMXRT_IPG_PODF_DIVIDER = 4
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* 125Mhz = 500Mhz / 4
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*
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* PERCLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER
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* IMXRT_PERCLK_PODF_DIVIDER = 2
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* 62.5Mhz = 125Mhz / 2
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*
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2019-11-09 00:49:29 +01:00
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* SEMC_CLK_ROOT = PERIPH_CLK / IMXRT_SEMC_PODF_DIVIDER
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2019-11-09 00:18:01 +01:00
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* IMXRT_SEMC_PODF_DIVIDER = 4
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* 125Mhz = 500 / 4
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*
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* Set USB1 PLL (PLL3) to fOut = (24Mhz * 20)
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* 480Mhz = (24Mhz * 20)
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*
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2019-12-12 15:33:05 +01:00
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* Set LPSPI PLL3 PFD0 to fOut = (480Mhz / 12 * 18)
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* 720Mhz = (480Mhz / 12 * 18)
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* 90Mhz = (720Mhz / LSPI_PODF_DIVIDER)
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*
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* Set LPI2C PLL3 / 8 to fOut = (480Mhz / 8)
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* 60Mhz = (480Mhz / 8)
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* 12Mhz = (60Mhz / LSPI_PODF_DIVIDER)
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*
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2019-11-09 00:18:01 +01:00
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* These clock frequencies can be verified via the CCM_CLKO1 pin and sending
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* the appropriate clock to it with something like;
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*
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* putreg32( <Clk number> | CCM_CCOSR_CLKO1_EN , IMXRT_CCM_CCOSR);
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* imxrt_config_gpio(GPIO_CCM_CLKO1);
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*/
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2019-11-29 21:54:08 +01:00
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#define BOARD_XTAL_FREQUENCY 24000000
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#define BOARD_CPU_FREQUENCY 500000000U
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#define IMXRT_PRE_PERIPH_CLK_SEL CCM_CBCMR_PRE_PERIPH_CLK_SEL_PLL6
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#define IMXRT_PERIPH_CLK_SEL CCM_CBCDR_PERIPH_CLK_SEL_PRE_PERIPH
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#define IMXRT_ARM_PODF_DIVIDER 1
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#define IMXRT_AHB_PODF_DIVIDER 1
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#define IMXRT_IPG_PODF_DIVIDER 4
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#define IMXRT_PERCLK_CLK_SEL CCM_CSCMR1_PERCLK_CLK_SEL_IPG_CLK_ROOT
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#define IMXRT_PERCLK_PODF_DIVIDER 2
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#define IMXRT_SEMC_PODF_DIVIDER 4
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2019-12-12 15:33:05 +01:00
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2019-11-29 21:54:08 +01:00
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#define IMXRT_LPSPI_CLK_SELECT CCM_CBCMR_LPSPI_CLK_SEL_PLL3_PFD0
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#define IMXRT_LSPI_PODF_DIVIDER 8
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2019-12-12 15:33:05 +01:00
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#define IMXRT_LPI2C_CLK_SELECT CCM_CSCDR2_LPI2C_CLK_SEL_PLL3_60M
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#define IMXRT_LSI2C_PODF_DIVIDER 5
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2019-11-09 00:18:01 +01:00
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#define IMXRT_USDHC1_CLK_SELECT CCM_CSCMR1_USDHC1_CLK_SEL_PLL2_PFD0
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2019-11-29 21:54:08 +01:00
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#define IMXRT_USDHC1_PODF_DIVIDER 1
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2019-12-12 15:33:05 +01:00
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#define IMXRT_USDHC2_CLK_SELECT CCM_CSCMR1_USDHC2_CLK_SEL_PLL2_PFD0
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2019-11-29 21:54:08 +01:00
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#define IMXRT_USDHC2_PODF_DIVIDER 4
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2019-11-09 00:18:01 +01:00
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2019-11-29 21:54:08 +01:00
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#define IMXRT_SYS_PLL_DIV_SELECT CCM_ANALOG_PLL_SYS_DIV_SELECT_22
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2019-11-09 00:18:01 +01:00
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#define IMXRT_USB1_PLL_DIV_SELECT CCM_ANALOG_PLL_USB1_DIV_SELECT_20
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#define IMXRT_AUDIO_PLL_DIV_SELECT (45)
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2019-11-29 21:54:08 +01:00
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/* Define this to enable tracing */
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#if 0
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# define IMXRT_TRACE_PODF_DIVIDER 1
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# define IMXRT_TRACE_CLK_SELECT CCM_CBCMR_TRACE_CLK_SEL_PLL2_PFD0
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#endif
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2019-11-09 00:18:01 +01:00
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/* LED definitions ***********************************************************/
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/* There is one user accessible LED status indicator located on the 1020-EVK.
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* The function of the LEDs include:
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*
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* D3: Power (Green) & Overpower (Red)
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* D5: User LED (Green) GPIO_AD_B0_05
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* D15: RST LED (Red)
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*
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* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/imxrt_autoleds.c. The LED is used to encode
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* OS-related events as documented in board.h
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*
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2019-11-11 23:27:53 +01:00
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* -------------------- ----------------------------- --------
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* SYMBOL Meaning USERLED
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* -------------------- ----------------------------- --------
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2019-11-09 00:49:29 +01:00
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*/
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2019-11-09 00:18:01 +01:00
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#define LED_STARTED 0 /* NuttX has been started OFF */
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#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF */
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#define LED_IRQSENABLED 2 /* Interrupts enabled OFF */
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#define LED_STACKCREATED 3 /* Idle stack created ON */
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#define LED_INIRQ 4 /* In an interrupt N/C */
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#define LED_SIGNAL 5 /* In a signal handler N/C */
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#define LED_ASSERTION 6 /* An assertion failed N/C */
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#define LED_PANIC 7 /* The system has crashed FLASH */
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#undef LED_IDLE /* Not used */
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2019-11-09 00:49:29 +01:00
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/* The intention is that if the LED is statically on, NuttX has successfully
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2019-11-09 00:18:01 +01:00
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* booted and is, apparently, running normally. If the LED is flashing at
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* approximately 2Hz, then a fatal error has been detected and the system has
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* halted.
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*/
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/* LED index values for use with board_userled() */
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2019-11-11 23:27:53 +01:00
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#define BOARD_USERLED 0
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2019-11-09 00:18:01 +01:00
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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2019-11-11 23:27:53 +01:00
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#define BOARD_USERLED_BIT (1 << BOARD_USERLED)
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2019-11-09 00:18:01 +01:00
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/* Which device the SD card appears on */
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#define BOARD_USDHC_SD_ID (0)
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/* Button definitions ********************************************************/
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/* The IMXRT board has three external buttons
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*
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* 1. SW2 (IRQ88, ONOFF) Not on a GPIO, No muxing
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* 2. SW3 (IRQ88, POR) Not on a GPIO, No muxing
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* 2. SW4 (IRQ88, USER) Wakeup, GPIO5-0
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*/
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#define BUTTON_WAKE 0
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#define BUTTON_WAKE_BIT (1 << BUTTON_WAKE)
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/* SDIO - Used for both Port 1 & 2 ******************************************/
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/* 386 KHz for initial inquiry stuff */
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#define BOARD_USDHC_IDMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV256
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#define BOARD_USDHC_IDMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(2)
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/* 24.8MHz for other modes */
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#define BOARD_USDHC_MMCMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
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#define BOARD_USDHC_MMCMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
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#define BOARD_USDHC_SD1MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
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#define BOARD_USDHC_SD1MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
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#define BOARD_USDHC_SD4MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
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#define BOARD_USDHC_SD4MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
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2019-11-09 00:49:29 +01:00
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/* Pinning ******************************************************************/
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2019-11-09 00:18:01 +01:00
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/* Make sure these entries match to allow interrupts to be present */
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2019-11-09 00:49:29 +01:00
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2019-12-08 15:02:31 +01:00
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#define GPIO_ENET_GRP IMXRT_GPIO1_16_31_IRQ
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2019-11-09 16:55:16 +01:00
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#ifndef GPIO_ENET_GRP
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2019-11-09 00:49:29 +01:00
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# ifdef CONFIG_IMXRT_ENET
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# error GPIO_ENET_IRQ Host IRQ not defined!
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# endif
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2019-11-09 00:18:01 +01:00
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#endif
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2019-11-09 16:55:16 +01:00
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#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1 | IOMUX_ENET_MDIO_DEFAULT
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#define GPIO_ENET_MDC GPIO_ENET_MDC_1 | IOMUX_ENET_MDC_DEFAULT
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#define GPIO_ENET_RX_EN GPIO_ENET_RX_EN_1 | IOMUX_ENET_EN_DEFAULT /* AKA CRS_DV */
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#define GPIO_ENET_TX_EN GPIO_ENET_TX_EN_1 | IOMUX_ENET_EN_DEFAULT
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#define GPIO_ENET_TX_CLK GPIO_ENET_REF_CLK_2 | IOMUX_ENET_TX_CLK_DEFAULT
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#define GPIO_ENET_RX_DATA00 GPIO_ENET_RX_DATA00_2 | IOMUX_ENET_DATA_DEFAULT
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#define GPIO_ENET_RX_DATA01 GPIO_ENET_RX_DATA01_2 | IOMUX_ENET_DATA_DEFAULT
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#define GPIO_ENET_TX_DATA00 GPIO_ENET_TX_DATA00_2 | IOMUX_ENET_DATA_DEFAULT
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#define GPIO_ENET_TX_DATA01 GPIO_ENET_TX_DATA01_2 | IOMUX_ENET_DATA_DEFAULT
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2019-11-09 00:18:01 +01:00
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/* LPI2Cs *******************************************************************/
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#define GPIO_LPI2C1_SDA GPIO_LPI2C1_SDA_1|IOMUX_I2C_DEFAULT /* AD_B1_15 */
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#define GPIO_LPI2C1_SCL GPIO_LPI2C1_SCL_1|IOMUX_I2C_DEFAULT /* AD_B1_14 */
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#define GPIO_LPI2C4_SDA GPIO_LPI2C4_SDA_1|IOMUX_I2C_DEFAULT /* SD_B1_02 */
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#define GPIO_LPI2C4_SCL GPIO_LPI2C4_SCL_1|IOMUX_I2C_DEFAULT /* SD_B1_03 */
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/* LPSPI ********************************************************************/
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#define GPIO_LPSPI1_MOSI GPIO_LPSPI1_SDO_1|IOMUX_LPSPI_DEFAULT /* AD_B0_12 */
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#define GPIO_LPSPI1_MISO GPIO_LPSPI1_SDI_1|IOMUX_LPSPI_DEFAULT /* AD_B0_13 */
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#define GPIO_LPSPI1_SCK GPIO_LPSPI1_SCK_1|IOMUX_LPSPI_DEFAULT /* AD_B0_10 */
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#define GPIO_LPSPI1_PCS GPIO_LPSPI1_PCS0_1|IOMUX_LPSPI_DEFAULT /* AD_B0_11 */
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/* LPUARTS Disambiguation ***************************************************/
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#define GPIO_LPUART1_RX GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT /* AD_B0_07 */
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#define GPIO_LPUART1_TX GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT /* AD_B0_06 */
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#define GPIO_LPUART2_RX GPIO_LPUART2_RX_2|IOMUX_UART_DEFAULT /* AD_B1_09 */
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#define GPIO_LPUART2_TX GPIO_LPUART2_TX_2|IOMUX_UART_DEFAULT /* AD_B1_08 */
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/* SDIO *********************************************************************/
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#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* SD_B0_04 */
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#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* SD_B0_05 */
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#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* SD_B0_00 */
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#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* SD_B0_01 */
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#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK_1 | IOMUX_USDHC1_CLK_DEFAULT) /* SD_B0_03 */
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#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD_1 | IOMUX_USDHC1_CMD_DEFAULT) /* SD_B0_02 */
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2019-12-12 15:34:58 +01:00
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/* N.B. This is not using a USDHC CD_B input but a regular GPIO. The
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* post-fix _GPIO enables GPIO testing logic in the USDHC driver.
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*/
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#define PIN_USDHC1_CD_GPIO (IOMUX_VSD_DEFAULT | \
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GPIO_PORT3 | GPIO_PIN19 ) /* SD_B0_06 */
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2019-11-09 00:18:01 +01:00
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/*****************************************************************************
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* Public Types
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*****************************************************************************/
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/*****************************************************************************
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* Public Data
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*****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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2019-11-09 00:49:29 +01:00
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* Public Function Prototypes
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2019-11-09 00:18:01 +01:00
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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2019-11-11 23:06:43 +01:00
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#endif /* __BOARDS_ARM_IMXRT1020_EVK_INCLUDE_BOARD_H */
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