2023-08-01 16:25:06 +02:00
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/****************************************************************************
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* drivers/ioexpander/pcf8575.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <sys/param.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/ioexpander/ioexpander.h>
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#include <nuttx/ioexpander/pcf8575.h>
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#include "pcf8575.h"
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#ifdef CONFIG_IOEXPANDER_PCF8575
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#ifdef CONFIG_IOEXPANDER_INT_ENABLE
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# error PCF8575 cannot work with CONFIG_IOEXPANDER_INT_ENABLE
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* PCF8575xx Helpers */
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static int pcf8575_read(FAR struct pcf8575_dev_s *priv,
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FAR uint16_t *portval);
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static int pcf8575_write(struct pcf8575_dev_s *priv, uint16_t portval);
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/* I/O Expander Methods */
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static int pcf8575_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int dir);
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static int pcf8575_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, void *regval);
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static int pcf8575_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value);
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static int pcf8575_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value);
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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static int pcf8575_multiwritepin(FAR struct ioexpander_dev_s *dev,
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2023-08-29 11:59:33 +02:00
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FAR const uint8_t *pins, FAR bool *values, int count);
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2023-08-01 16:25:06 +02:00
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static int pcf8575_multireadpin(FAR struct ioexpander_dev_s *dev,
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2023-08-29 11:59:33 +02:00
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FAR const uint8_t *pins, FAR bool *values, int count);
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2023-08-01 16:25:06 +02:00
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifndef CONFIG_PCF8575_MULTIPLE
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/* If only a single device is supported, then the driver state structure may
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* as well be pre-allocated.
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*/
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static struct pcf8575_dev_s g_pcf8575;
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#endif
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/* I/O expander vtable */
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static const struct ioexpander_ops_s g_pcf8575_ops =
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{
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pcf8575_direction,
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pcf8575_option,
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pcf8575_writepin,
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pcf8575_readpin,
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pcf8575_readpin
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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, pcf8575_multiwritepin
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, pcf8575_multireadpin
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, pcf8575_multireadpin
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pcf8575_read
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*
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* Description:
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* Read the PCF8575 16-bit value from a PCF8575xx port
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*
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* Primitive I2C read operation for the PCF8575. The PCF8575 is
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* 'interesting' in that it doesn't really have a data direction register,
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* but instead the outputs are current-limited when high, so by setting an
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* IO line high, you are also making it an input. Consequently, before
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* using this method, you'll need to perform a pca8574_write() setting the
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* bits you are interested in reading to 1's, then call this method.
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*
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****************************************************************************/
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static int pcf8575_read(FAR struct pcf8575_dev_s *priv,
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FAR uint16_t *portval)
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{
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struct i2c_msg_s msg;
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uint8_t buffer[2];
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int ret;
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DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
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/* Setup for the transfer */
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msg.frequency = priv->config->frequency,
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msg.addr = priv->config->address,
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msg.flags = I2C_M_READ;
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msg.buffer = buffer;
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msg.length = 2;
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/* Then perform the transfer. */
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ret = I2C_TRANSFER(priv->i2c, &msg, 1);
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*portval = buffer[0] & 0xff;
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*portval |= (buffer[1] << 8) & 0xff00;
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return (ret >= 0) ? OK : ret;
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}
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/****************************************************************************
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* Name: pcf8575_write
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*
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* Description:
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* Write a 16-bit value to a PCF8575xx port
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*
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* Primitive I2C write operation for the PCA8574. The I2C interface
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* simply sets the state of the 8 IO lines in the PCA8574 port.
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*
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****************************************************************************/
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static int pcf8575_write(struct pcf8575_dev_s *priv, uint16_t portval)
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{
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struct i2c_msg_s msg;
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uint8_t buffer[2];
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int ret;
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DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL);
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/* Setup for the transfer */
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buffer[0] = (uint8_t)(portval & 0xff);
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buffer[1] = (uint8_t)((portval & 0xff00) >> 8);
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msg.frequency = priv->config->frequency,
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msg.addr = priv->config->address;
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msg.flags = 0;
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msg.buffer = buffer;
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msg.length = 2;
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/* Then perform the transfer. */
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ret = I2C_TRANSFER(priv->i2c, &msg, 1);
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return (ret >= 0) ? OK : ret;
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}
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/****************************************************************************
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* Name: pcf8575_direction
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*
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* Description:
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* Set the direction of an ioexpander pin. Required.
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*
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* The PCF8575 is 'interesting' in that it doesn't really have a data
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* direction register, but instead the outputs are current-limited when
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* high, so by setting an IO line high, you are also making it an input.
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* Consequently, before using this method, you'll need to perform a
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* pcf8575_write() setting the bits you are interested in reading to 1's,
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* before calling pcf8575_read().
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* dir - One of the IOEXPANDER_DIRECTION_ macros
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pcf8575_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int direction)
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{
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FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
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int ret;
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if (direction != IOEXPANDER_DIRECTION_IN &&
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direction != IOEXPANDER_DIRECTION_OUT)
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{
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return -EINVAL;
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}
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if (pin > 15)
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{
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return -ENXIO;
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}
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DEBUGASSERT(priv != NULL && priv->config != NULL);
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gpioinfo("I2C addr=%02x pin=%u direction=%s\n",
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priv->config->address, pin,
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(direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT");
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/* Get exclusive access to the I/O Expander */
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ret = nxmutex_lock(&priv->lock);
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if (ret < 0)
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{
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return ret;
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}
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/* Set a bit in inpins if the pin is an input. Clear the bit in
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* inpins if the pin is an output.
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*/
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if (direction == IOEXPANDER_DIRECTION_IN)
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{
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priv->inpins |= (1 << pin);
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priv->outstate &= ~(1 << pin);
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}
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else
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{
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priv->inpins &= ~(1 << pin);
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}
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/* Write the OR of the set of input pins and the set of output pins.
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* In order to read input pins, we have to write a '1' to put the
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* pin in the current limiting state.
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*/
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ret = pcf8575_write(priv, priv->inpins | priv->outstate);
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nxmutex_unlock(&priv->lock);
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return ret;
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}
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/****************************************************************************
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* Name: pcf8575_option
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*
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* Description:
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* Set pin options. Required.
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* Since all IO expanders have various pin options, this API allows setting
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* pin options in a flexible way.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* opt - One of the IOEXPANDER_OPTION_ macros
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* val - The option's value
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pcf8575_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, FAR void *value)
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{
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FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
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int ret = OK;
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DEBUGASSERT(priv != NULL && priv->config != NULL);
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gpioinfo("I2C addr=%02x pin=%u option=%u\n",
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priv->config->address, pin, opt);
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return ret;
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}
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/****************************************************************************
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* Name: pcf8575_writepin
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*
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* Description:
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* Set the pin level. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* val - The pin level. Usually TRUE will set the pin high,
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* except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pcf8575_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value)
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{
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FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
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int ret;
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if (pin > 15)
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{
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return -ENXIO;
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}
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DEBUGASSERT(priv != NULL && priv->config != NULL);
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gpioinfo("I2C addr=%02x pin=%u value=%u\n",
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priv->config->address, pin, value);
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/* Get exclusive access to the I/O Expander */
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ret = nxmutex_lock(&priv->lock);
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if (ret < 0)
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{
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return ret;
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}
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/* Make sure that this is an output pin */
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if ((priv->inpins & (1 << pin)) != 0)
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{
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gpioerr("ERROR: pin%u is an input\n", pin);
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nxmutex_unlock(&priv->lock);
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return -EINVAL;
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}
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/* Set/clear a bit in outstate. */
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if (value)
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{
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priv->outstate |= (1 << pin);
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}
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else
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{
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priv->outstate &= ~(1 << pin);
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}
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/* Write the OR of the set of input pins and the set of output pins.
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* In order to set the new output value.
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*/
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ret = pcf8575_write(priv, priv->inpins | priv->outstate);
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nxmutex_unlock(&priv->lock);
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return ret;
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}
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/****************************************************************************
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* Name: pcf8575_readpin
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*
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* Description:
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* Read the actual PIN level. This can be different from the last value
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* written to this pin. Required.
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*
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* The PCF8575 is 'interesting' in that it doesn't really have a data
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* direction register, but instead the outputs are current-limited when
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* high, so by setting an IO line high, you are also making it an input.
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* Consequently, before using this method, you'll need to perform a
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* pca8574_write() setting the bits you are interested in reading to 1's,
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* before calling pca8574_read().
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin
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* valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
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* if the pin is high, except if OPTION_INVERT has been set on
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* this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int pcf8575_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
|
|
|
FAR bool *value)
|
|
|
|
{
|
|
|
|
FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
|
|
|
|
uint16_t regval;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (pin > 15)
|
|
|
|
{
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL && priv->config != NULL && value != NULL);
|
|
|
|
|
|
|
|
gpioinfo("I2C addr=%02x, pin=%u\n", priv->config->address, pin);
|
|
|
|
|
|
|
|
/* Get exclusive access to the I/O Expander */
|
|
|
|
|
|
|
|
ret = nxmutex_lock(&priv->lock);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Is the pin an output? */
|
|
|
|
|
|
|
|
if ((priv->inpins & (1 << pin)) == 0)
|
|
|
|
{
|
|
|
|
/* We cannot read the value on pin directly. Just Return the last
|
|
|
|
* value that we wrote to the pin.
|
|
|
|
*/
|
|
|
|
|
|
|
|
*value = ((priv->outstate & (1 << pin)) != 0);
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* It is an input pin. Read the input register for this pin
|
|
|
|
*
|
|
|
|
* The Input Port Register reflects the incoming logic levels of the pins,
|
|
|
|
* regardless of whether the pin is defined as an input or an output by
|
|
|
|
* the Configuration Register. They act only on read operation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
ret = pcf8575_read(priv, ®val);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
gpioerr("ERROR: Failed to read port register: %d\n", ret);
|
|
|
|
|
|
|
|
goto errout_with_lock;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Return 0 or 1 to indicate the state of pin */
|
|
|
|
|
|
|
|
*value = (bool)((regval >> (pin & 0xf)) & 1);
|
|
|
|
ret = OK;
|
|
|
|
|
|
|
|
errout_with_lock:
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: pcf8575_multiwritepin
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the pin level for multiple pins. This routine may be faster than
|
|
|
|
* individual pin accesses. Optional.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* dev - Device-specific state data
|
|
|
|
* pins - The list of pin indexes to alter in this call
|
|
|
|
* val - The list of pin levels.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* 0 on success, else a negative error code
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_IOEXPANDER_MULTIPIN
|
|
|
|
static int pcf8575_multiwritepin(FAR struct ioexpander_dev_s *dev,
|
2023-08-29 11:59:33 +02:00
|
|
|
FAR const uint8_t *pins, FAR bool *values,
|
2023-08-01 16:25:06 +02:00
|
|
|
int count)
|
|
|
|
{
|
|
|
|
FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
|
|
|
|
uint8_t pin;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL && priv->config != NULL &&
|
|
|
|
pins != NULL && values != NULL);
|
|
|
|
|
|
|
|
gpioinfo("I2C addr=%02x count=%d\n", priv->config->address, count);
|
|
|
|
|
|
|
|
/* Get exclusive access to the I/O Expander */
|
|
|
|
|
|
|
|
ret = nxmutex_lock(&priv->lock);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process each pin setting */
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++)
|
|
|
|
{
|
|
|
|
/* Make sure that this is an output pin */
|
|
|
|
|
|
|
|
pin = pins[i];
|
|
|
|
if (pin > 15)
|
|
|
|
{
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
|
|
|
|
2023-08-29 11:59:33 +02:00
|
|
|
gpioinfo("%d. pin=%u value=%u\n", i, pin, values[i]);
|
2023-08-01 16:25:06 +02:00
|
|
|
|
|
|
|
if ((priv->inpins & (1 << pin)) != 0)
|
|
|
|
{
|
|
|
|
gpioerr("ERROR: pin%u is an input\n", pin);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set/clear a bit in outstate. */
|
|
|
|
|
|
|
|
if (values[i])
|
|
|
|
{
|
|
|
|
priv->outstate |= (1 << pin);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
priv->outstate &= ~(1 << pin);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write the OR of the set of input pins and the set of output pins.
|
|
|
|
* In order to set the new output value.
|
|
|
|
*/
|
|
|
|
|
|
|
|
ret = pcf8575_write(priv, priv->inpins | priv->outstate);
|
|
|
|
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: pcf8575_multireadpin
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Read the actual level for multiple pins. This routine may be faster than
|
|
|
|
* individual pin accesses. Optional.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* dev - Device-specific state data
|
|
|
|
* pin - The list of pin indexes to read
|
|
|
|
* valptr - Pointer to a buffer where the pin levels are stored.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* 0 on success, else a negative error code
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_IOEXPANDER_MULTIPIN
|
|
|
|
static int pcf8575_multireadpin(FAR struct ioexpander_dev_s *dev,
|
2023-08-29 11:59:33 +02:00
|
|
|
FAR const uint8_t *pins, FAR bool *values,
|
2023-08-01 16:25:06 +02:00
|
|
|
int count)
|
|
|
|
{
|
|
|
|
FAR struct pcf8575_dev_s *priv = (FAR struct pcf8575_dev_s *)dev;
|
2023-08-29 11:59:33 +02:00
|
|
|
uint16_t regval;
|
2023-08-01 16:25:06 +02:00
|
|
|
uint8_t pin;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL && priv->config != NULL &&
|
|
|
|
pins != NULL && values != NULL);
|
|
|
|
|
|
|
|
gpioinfo("I2C addr=%02x, count=%d\n", priv->config->address, count);
|
|
|
|
|
|
|
|
/* Get exclusive access to the I/O Expander */
|
|
|
|
|
|
|
|
ret = nxmutex_lock(&priv->lock);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read the input register for this pin
|
|
|
|
*
|
|
|
|
* The Input Port Register reflects the incoming logic levels of the pins,
|
|
|
|
* regardless of whether the pin is defined as an input or an output by
|
|
|
|
* the Configuration Register. They act only on read operation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
ret = pcf8575_read(priv, ®val);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
gpioerr("ERROR: Failed to read port register: %d\n", ret);
|
|
|
|
goto errout_with_lock;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Return the requested pin values */
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++)
|
|
|
|
{
|
|
|
|
/* Make sure that this is an output pin */
|
|
|
|
|
|
|
|
pin = pins[i];
|
|
|
|
if (pin > 15)
|
|
|
|
{
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Is the pin an output? */
|
|
|
|
|
|
|
|
if ((priv->inpins & (1 << pin)) == 0)
|
|
|
|
{
|
|
|
|
/* We cannot read the value on pin directly. Just Return the last
|
|
|
|
* value that we wrote to the pin.
|
|
|
|
*/
|
|
|
|
|
|
|
|
values[i] = ((priv->outstate & (1 << pin)) != 0);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
values[i] = ((regval & (1 << pin)) != 0);
|
|
|
|
}
|
|
|
|
|
2023-08-29 11:59:33 +02:00
|
|
|
gpioinfo("%d. pin=%u value=%u\n", i, pin, values[i]);
|
2023-08-01 16:25:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = OK;
|
|
|
|
|
|
|
|
errout_with_lock:
|
|
|
|
nxmutex_unlock(&priv->lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: pcf8575_initialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Instantiate and configure the PCF8575xx device driver to use the
|
|
|
|
* provided I2C device instance.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* i2c - An I2C driver instance
|
|
|
|
* minor - The device i2c address
|
|
|
|
* config - Persistent board configuration data
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* an ioexpander_dev_s instance on success, NULL on failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
FAR struct ioexpander_dev_s *pcf8575_initialize(FAR struct i2c_master_s *i2c,
|
|
|
|
FAR struct pcf8575_config_s *config)
|
|
|
|
{
|
|
|
|
FAR struct pcf8575_dev_s *priv;
|
|
|
|
|
|
|
|
#ifdef CONFIG_PCF8575_MULTIPLE
|
|
|
|
/* Allocate the device state structure */
|
|
|
|
|
|
|
|
priv = (FAR struct pcf8575_dev_s *)
|
|
|
|
kmm_zalloc(sizeof(struct pcf8575_dev_s));
|
|
|
|
if (!priv)
|
|
|
|
{
|
|
|
|
gpioerr("ERROR: Failed to allocate driver instance\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
/* Use the one-and-only I/O Expander driver instance */
|
|
|
|
|
|
|
|
priv = &g_pcf8575;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Initialize the device state structure */
|
|
|
|
|
|
|
|
priv->dev.ops = &g_pcf8575_ops;
|
|
|
|
priv->i2c = i2c;
|
|
|
|
priv->config = config;
|
|
|
|
|
|
|
|
nxmutex_init(&priv->lock);
|
|
|
|
return &priv->dev;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_IOEXPANDER_PCF8575 */
|