162 lines
5.7 KiB
ArmAsm
162 lines
5.7 KiB
ArmAsm
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/****************************************************************************
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* libs/libc/machine/arm64/gnu/arch_strchr.S
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*
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* Copyright (c) 2014, ARM Limited
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* All rights Reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the company nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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* Neon Available.
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*/
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/* Arguments and results. */
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#define srcin x0
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#define chrin w1
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#define result x0
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#define src x2
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#define tmp1 x3
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#define wtmp2 w4
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#define tmp3 x5
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#define vrepchr v0
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#define vdata1 v1
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#define vdata2 v2
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#define vhas_nul1 v3
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#define vhas_nul2 v4
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#define vhas_chr1 v5
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#define vhas_chr2 v6
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#define vrepmask_0 v7
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#define vrepmask_c v16
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#define vend1 v17
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#define vend2 v18
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/* Core algorithm.
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For each 32-byte hunk we calculate a 64-bit syndrome value, with
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two bits per byte (LSB is always in bits 0 and 1, for both big
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and little-endian systems). For each tuple, bit 0 is set iff
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the relevant byte matched the requested character; bit 1 is set
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iff the relevant byte matched the NUL end of string (we trigger
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off bit0 for the special case of looking for NUL). Since the bits
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in the syndrome reflect exactly the order in which things occur
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in the original string a count_trailing_zeros() operation will
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identify exactly which byte is causing the termination, and why. */
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/* Locals and temporaries. */
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.macro def_fn f p2align=0
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.text
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.p2align \p2align
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.global \f
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.type \f, %function
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\f:
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.endm
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def_fn strchr
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/* Magic constant 0x40100401 to allow us to identify which lane
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matches the requested byte. Magic constant 0x80200802 used
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similarly for NUL termination. */
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mov wtmp2, #0x0401
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movk wtmp2, #0x4010, lsl #16
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dup vrepchr.16b, chrin
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bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
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dup vrepmask_c.4s, wtmp2
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ands tmp1, srcin, #31
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add vrepmask_0.4s, vrepmask_c.4s, vrepmask_c.4s /* equiv: lsl #1 */
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b.eq .Lloop
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/* Input string is not 32-byte aligned. Rather than forcing
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the padding bytes to a safe value, we calculate the syndrome
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for all the bytes, but then mask off those bits of the
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syndrome that are related to the padding. */
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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neg tmp1, tmp1
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cmeq vhas_nul1.16b, vdata1.16b, #0
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_nul2.16b, vdata2.16b, #0
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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and vhas_nul1.16b, vhas_nul1.16b, vrepmask_0.16b
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and vhas_nul2.16b, vhas_nul2.16b, vrepmask_0.16b
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and vhas_chr1.16b, vhas_chr1.16b, vrepmask_c.16b
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and vhas_chr2.16b, vhas_chr2.16b, vrepmask_c.16b
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orr vend1.16b, vhas_nul1.16b, vhas_chr1.16b
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orr vend2.16b, vhas_nul2.16b, vhas_chr2.16b
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lsl tmp1, tmp1, #1
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addp vend1.16b, vend1.16b, vend2.16b // 256->128
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mov tmp3, #~0
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addp vend1.16b, vend1.16b, vend2.16b // 128->64
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lsr tmp1, tmp3, tmp1
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mov tmp3, vend1.2d[0]
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bic tmp1, tmp3, tmp1 // Mask padding bits.
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cbnz tmp1, .Ltail
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.Lloop:
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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cmeq vhas_nul1.16b, vdata1.16b, #0
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_nul2.16b, vdata2.16b, #0
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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/* Use a fast check for the termination condition. */
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orr vend1.16b, vhas_nul1.16b, vhas_chr1.16b
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orr vend2.16b, vhas_nul2.16b, vhas_chr2.16b
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orr vend1.16b, vend1.16b, vend2.16b
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addp vend1.2d, vend1.2d, vend1.2d
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mov tmp1, vend1.2d[0]
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cbz tmp1, .Lloop
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/* Termination condition found. Now need to establish exactly why
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we terminated. */
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and vhas_nul1.16b, vhas_nul1.16b, vrepmask_0.16b
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and vhas_nul2.16b, vhas_nul2.16b, vrepmask_0.16b
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and vhas_chr1.16b, vhas_chr1.16b, vrepmask_c.16b
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and vhas_chr2.16b, vhas_chr2.16b, vrepmask_c.16b
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orr vend1.16b, vhas_nul1.16b, vhas_chr1.16b
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orr vend2.16b, vhas_nul2.16b, vhas_chr2.16b
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addp vend1.16b, vend1.16b, vend2.16b // 256->128
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addp vend1.16b, vend1.16b, vend2.16b // 128->64
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mov tmp1, vend1.2d[0]
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.Ltail:
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/* Count the trailing zeros, by bit reversing... */
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rbit tmp1, tmp1
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/* Re-bias source. */
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sub src, src, #32
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clz tmp1, tmp1 /* And counting the leading zeros. */
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/* Tmp1 is even if the target charager was found first. Otherwise
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we've found the end of string and we weren't looking for NUL. */
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tst tmp1, #1
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add result, src, tmp1, lsr #1
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csel result, result, xzr, eq
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ret
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.size strchr, . - strchr
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