751 lines
20 KiB
C
751 lines
20 KiB
C
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/****************************************************************************
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* drivers/ioexpander/icjx.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <sys/param.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/ioexpander/ioexpander.h>
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#include <nuttx/ioexpander/icjx.h>
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#include "icjx.h"
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#ifdef CONFIG_IOEXPANDER_ICJX
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define ICJX_NOP 0x00
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#define ICJX_RNW 0x01
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#define ICJX_NOB 0x0f
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#define ICJX_CONTROL 0x59
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct icjx_dev_s
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{
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struct ioexpander_dev_s dev; /* Nested structure to allow casting
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* as public gpio expander. */
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FAR struct icjx_config_s *config; /* Board configuration data */
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FAR struct spi_dev_s *spi; /* Saved SPI driver instance */
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uint16_t outpins;
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uint16_t outstate;
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mutex_t lock;
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};
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/****************************************************************************
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* Private Function Protototypes
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****************************************************************************/
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/* SPI helpers */
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static void icjx_select(FAR struct spi_dev_s *spi,
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FAR struct icjx_config_s *config, int bits);
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static void icjx_deselect(FAR struct spi_dev_s *spi,
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FAR struct icjx_config_s *config);
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/* Read/Write helpers */
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static int icjx_read(FAR struct icjx_dev_s *priv, uint8_t reg,
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uint8_t *data);
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static int icjx_write(FAR struct icjx_dev_s *priv, uint8_t reg,
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uint8_t data);
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/* I/O Expander Methods */
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static int icjx_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int dir);
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static int icjx_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, void *regval);
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static int icjx_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value);
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static int icjx_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value);
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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static int icjx_multiwritepin(FAR struct ioexpander_dev_s *dev,
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FAR const uint8_t *pins, FAR bool *values,
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int count);
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static int icjx_multireadpin(FAR struct ioexpander_dev_s *dev,
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FAR const uint8_t *pins, FAR bool *values,
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int count);
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifndef CONFIG_ICJX_MULTIPLE
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/* If only a single device is supported, then the driver state structure may
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* as well be pre-allocated.
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*/
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static struct icjx_dev_s g_icjx;
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#endif
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/* I/O expander vtable */
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static const struct ioexpander_ops_s g_icjx_ops =
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{
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icjx_direction,
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icjx_option,
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icjx_writepin,
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icjx_readpin,
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icjx_readpin
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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, icjx_multiwritepin
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, icjx_multireadpin
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, icjx_multireadpin
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: icjx_select
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*
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* Description:
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* Select the SPI, locking and re-configuring if necessary
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*
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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* config - Reference to iC-JX configuration structure
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* bits - Number of SPI bits
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void icjx_select(FAR struct spi_dev_s *spi,
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FAR struct icjx_config_s *config, int bits)
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{
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/* Select iC-JX chip (locking the SPI bus in case there are multiple
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* devices competing for the SPI bus
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*/
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SPI_LOCK(spi, true);
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SPI_SELECT(spi, SPIDEV_EXPANDER(config->id), true);
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/* Now make sure that the SPI bus is configured for the iC-JX (it
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* might have gotten configured for a different device while unlocked)
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*/
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SPI_SETMODE(spi, config->mode);
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SPI_SETBITS(spi, bits);
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SPI_SETFREQUENCY(spi, config->frequency);
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}
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/****************************************************************************
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* Name: icjx_deselect
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*
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* Description:
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* De-select the SPI
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*
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* Input Parameters:
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* spi - Reference to the SPI driver structure
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* config - Reference to iC-JX configuration structure
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void icjx_deselect(FAR struct spi_dev_s *spi,
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FAR struct icjx_config_s *config)
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{
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/* De-select iC-JX chip and relinquish the SPI bus. */
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SPI_SELECT(spi, SPIDEV_EXPANDER(config->id), false);
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SPI_LOCK(spi, false);
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}
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/****************************************************************************
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* Name: icjx_read
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*
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* Description:
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* Helper function for register read operation.
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*
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* Input Parameters:
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* priv - Pointer to icjx_dev_s structure
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* reg - Register offset (see icjx.h)
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* data - Pointer to read data
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int icjx_read(FAR struct icjx_dev_s *priv, uint8_t reg, uint8_t *data)
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{
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uint8_t startaddr;
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uint8_t tx_buffer[5];
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uint8_t rx_buffer[5];
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startaddr = (priv->config->addr << 6) | (reg << 1) | ICJX_RNW;
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tx_buffer[0] = startaddr;
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tx_buffer[1] = ICJX_NOP;
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tx_buffer[2] = ICJX_NOB;
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icjx_select(priv->spi, priv->config, 8);
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SPI_EXCHANGE(priv->spi, tx_buffer, rx_buffer, 3);
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*data = rx_buffer[2];
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if (priv->config->verification)
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{
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tx_buffer[0] = rx_buffer[2];
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tx_buffer[1] = ICJX_CONTROL;
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SPI_EXCHANGE(priv->spi, tx_buffer, rx_buffer, 2);
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}
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icjx_deselect(priv->spi, priv->config);
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if (priv->config->verification)
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{
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if (rx_buffer[0] != startaddr)
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{
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gpioerr("ERROR: Data verification error for register 0x%x!\n",
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reg);
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return -EIO;
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}
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if (rx_buffer[1] != ICJX_CONTROL)
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{
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gpioerr("ERROR: Control byte verification error for register"
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"0x%x!\n", reg);
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return -EIO;
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}
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}
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return OK;
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}
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/****************************************************************************
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* Name: icjx_write
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*
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* Description:
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* Helper function for register write operation.
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*
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* Input Parameters:
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* priv - Pointer to icjx_dev_s structure
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* reg - Register offset (see icjx.h)
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* data - Data to be written
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int icjx_write(FAR struct icjx_dev_s *priv, uint8_t reg, uint8_t data)
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{
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uint8_t startaddr;
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uint8_t bytes_to_exchange;
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uint8_t tx_buffer[5];
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uint8_t rx_buffer[5];
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bytes_to_exchange = 3;
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startaddr = (priv->config->addr << 6) | (reg << 1);
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tx_buffer[0] = startaddr;
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tx_buffer[1] = ICJX_NOB;
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tx_buffer[2] = data;
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if (priv->config->verification)
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{
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tx_buffer[3] = startaddr;
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tx_buffer[4] = ICJX_CONTROL;
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bytes_to_exchange = 5;
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}
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icjx_select(priv->spi, priv->config, 8);
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SPI_EXCHANGE(priv->spi, tx_buffer, rx_buffer, bytes_to_exchange);
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icjx_deselect(priv->spi, priv->config);
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if (priv->config->verification)
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{
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if (rx_buffer[2] != ICJX_NOB)
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{
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gpioerr("ERROR: Start address verification error for register"
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"0x%x!\n", reg);
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return -EIO;
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}
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if (rx_buffer[3] != data)
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{
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gpioerr("ERROR: Data verification error for register 0x%x!\n",
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reg);
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return -EIO;
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}
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if (rx_buffer[4] != ICJX_CONTROL)
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{
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gpioerr("ERROR: Data verification error for register 0x%x!\n",
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reg);
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return -EIO;
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}
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}
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return OK;
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}
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/****************************************************************************
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* Name: icjx_direction
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*
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* Description:
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* iC-JX is only input pin. However interface is provided in order
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* to avoid system falls if called.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* dir - One of the IOEXPANDER_DIRECTION_ macros
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int icjx_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int dir)
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{
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FAR struct icjx_dev_s *priv = (FAR struct icjx_dev_s *)dev;
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uint8_t outpins;
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uint8_t out_set;
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uint8_t regaddr;
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int ret;
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if (dir != IOEXPANDER_DIRECTION_IN &&
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dir != IOEXPANDER_DIRECTION_OUT)
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{
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return -EINVAL;
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}
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DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 16);
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ret = nxmutex_lock(&priv->lock);
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if (ret < 0)
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{
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return ret;
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}
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if (dir == IOEXPANDER_DIRECTION_OUT)
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{
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priv->outpins |= (1 << pin);
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}
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else
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{
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priv->outpins &= ~(1 << pin);
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}
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if (pin < 8)
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{
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regaddr = ICJX_CTRL_WORD_2_A;
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outpins = priv->outpins & 0xff;
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}
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else
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{
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regaddr = ICJX_CTRL_WORD_2_B;
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outpins = (priv->outpins >> 8) & 0xff;
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}
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ret = icjx_read(priv, regaddr, &out_set);
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if (ret < 0)
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{
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nxmutex_unlock(&priv->lock);
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return ret;
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}
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/* Enable output generation */
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if ((outpins & 0xf) != 0)
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{
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out_set |= ICJX_CTRL_WORD_2_NIOL;
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}
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else
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{
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out_set &= ~ICJX_CTRL_WORD_2_NIOL;
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}
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if ((outpins & 0xf0) != 0)
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{
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out_set |= ICJX_CTRL_WORD_2_NIOH;
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}
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else
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{
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out_set &= ~ICJX_CTRL_WORD_2_NIOH;
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}
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ret = icjx_write(priv, regaddr, out_set);
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nxmutex_unlock(&priv->lock);
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return ret;
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}
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/****************************************************************************
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* Name: icjx_option
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*
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* Description:
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* Set pin options. Required.
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* Since all IO expanders have various pin options, this API allows setting
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* pin options in a flexible way.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* opt - One of the IOEXPANDER_OPTION_ macros
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* value - The option's value
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int icjx_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, FAR void *value)
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{
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/* TODO: Implementation of iC-JX options should be here. This includes
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* setup of filters, ADC, interrupts etc. The right way to implement
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* this would probably be to introduce config structure to
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* include/nuttx/ioexpanders/icjx.h that the user could use for the
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* nibbles configuration.
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*/
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gpiowarn("ERROR: iC-JX options are not yet implemted!\n");
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return -ENOTSUP;
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}
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/****************************************************************************
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* Name: icjx_writepin
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*
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* Description:
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* Set the pin level. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* value - The pin level. Usually TRUE will set the pin high,
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* except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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||
|
static int icjx_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||
|
bool value)
|
||
|
{
|
||
|
FAR struct icjx_dev_s *priv = (FAR struct icjx_dev_s *)dev;
|
||
|
uint8_t outstate;
|
||
|
uint8_t regaddr;
|
||
|
int ret;
|
||
|
|
||
|
if (pin > 16)
|
||
|
{
|
||
|
return -ENXIO;
|
||
|
}
|
||
|
|
||
|
DEBUGASSERT(priv != NULL && priv->config != NULL);
|
||
|
|
||
|
gpioinfo("Expander id=%02x, pin=%u\n", priv->config->id, pin);
|
||
|
|
||
|
/* Get exclusive access to the I/O Expander */
|
||
|
|
||
|
ret = nxmutex_lock(&priv->lock);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
if ((priv->outpins & (1 << pin)) == 0)
|
||
|
{
|
||
|
gpioerr("ERROR: pin%u is an input\n", pin);
|
||
|
nxmutex_unlock(&priv->lock);
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
/* Set/clear a bit in outstate. */
|
||
|
|
||
|
if (value)
|
||
|
{
|
||
|
priv->outstate |= (1 << pin);
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
priv->outstate &= ~(1 << pin);
|
||
|
}
|
||
|
|
||
|
if (pin < 8)
|
||
|
{
|
||
|
regaddr = ICJX_OUTPUT_A;
|
||
|
outstate = priv->outstate & 0xff;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
regaddr = ICJX_OUTPUT_B;
|
||
|
outstate = (priv->outstate >> 8) & 0xff;
|
||
|
}
|
||
|
|
||
|
ret = icjx_write(priv, regaddr, outstate);
|
||
|
nxmutex_unlock(&priv->lock);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/****************************************************************************
|
||
|
* Name: icjx_readpin
|
||
|
*
|
||
|
* Description:
|
||
|
* Read the actual PIN level. This can be different from the last value
|
||
|
* written to this pin. Required.
|
||
|
*
|
||
|
* Input Parameters:
|
||
|
* dev - Device-specific state data
|
||
|
* pin - The index of the pin
|
||
|
* value - Pointer to a buffer where the pin level is stored. Usually
|
||
|
* TRUE if the pin is high, except if OPTION_INVERT has been
|
||
|
* set this pin.
|
||
|
*
|
||
|
* Returned Value:
|
||
|
* 0 on success, else a negative error code
|
||
|
*
|
||
|
****************************************************************************/
|
||
|
|
||
|
static int icjx_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
|
||
|
FAR bool *value)
|
||
|
{
|
||
|
FAR struct icjx_dev_s *priv = (FAR struct icjx_dev_s *)dev;
|
||
|
uint8_t regaddr;
|
||
|
uint8_t data;
|
||
|
int ret;
|
||
|
|
||
|
if (pin > 16)
|
||
|
{
|
||
|
return -ENXIO;
|
||
|
}
|
||
|
|
||
|
DEBUGASSERT(priv != NULL && priv->config != NULL && value != NULL);
|
||
|
|
||
|
gpioinfo("Expander addr=%02x, pin=%u\n", priv->config->addr, pin);
|
||
|
|
||
|
/* Get exclusive access to the I/O Expander */
|
||
|
|
||
|
ret = nxmutex_lock(&priv->lock);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/* Make sure that this is an output pin */
|
||
|
|
||
|
if ((priv->outpins & (1 << pin)) != 0)
|
||
|
{
|
||
|
*value = ((priv->outstate & (1 << pin)) != 0);
|
||
|
nxmutex_unlock(&priv->lock);
|
||
|
return OK;
|
||
|
}
|
||
|
|
||
|
regaddr = pin < 8 ? ICJX_INPUT_A : ICJX_INPUT_B;
|
||
|
|
||
|
ret = icjx_read(priv, regaddr, &data);
|
||
|
nxmutex_unlock(&priv->lock);
|
||
|
if (ret != OK)
|
||
|
{
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
*value = (bool)((data >> (pin & 0xf)) & 1);
|
||
|
return OK;
|
||
|
}
|
||
|
|
||
|
/****************************************************************************
|
||
|
* Name: icjx_multiwritepin
|
||
|
*
|
||
|
* Description:
|
||
|
* Set the pin level for multiple pins. This routine may be faster than
|
||
|
* individual pin accesses. Optional.
|
||
|
*
|
||
|
* Input Parameters:
|
||
|
* dev - Device-specific state data
|
||
|
* pins - The list of pin indexes to alter in this call
|
||
|
* values - The list of pin levels.
|
||
|
* count - Number of pins to be written
|
||
|
*
|
||
|
* Returned Value:
|
||
|
* 0 on success, else a negative error code
|
||
|
*
|
||
|
****************************************************************************/
|
||
|
|
||
|
#ifdef CONFIG_IOEXPANDER_MULTIPIN
|
||
|
static int icjx_multiwritepin(FAR struct ioexpander_dev_s *dev,
|
||
|
FAR const uint8_t *pins,
|
||
|
FAR bool *values, int count)
|
||
|
{
|
||
|
gpiowarn("WARNING: iC-JX does not have implemented support for"
|
||
|
"multiple pin write operation!\n");
|
||
|
|
||
|
return -ENOTSUP;
|
||
|
}
|
||
|
|
||
|
/****************************************************************************
|
||
|
* Name: icjx_multireadpin
|
||
|
*
|
||
|
* Description:
|
||
|
* Read the actual level for multiple pins. This routine may be faster than
|
||
|
* individual pin accesses. Optional.
|
||
|
*
|
||
|
* Input Parameters:
|
||
|
* dev - Device-specific state data
|
||
|
* pin - The list of pin indexes to read
|
||
|
* values - Pointer to a buffer where the pin levels are stored.
|
||
|
* count - Number of pins to be read
|
||
|
*
|
||
|
* Returned Value:
|
||
|
* 0 on success, else a negative error code
|
||
|
*
|
||
|
****************************************************************************/
|
||
|
|
||
|
static int icjx_multireadpin(FAR struct ioexpander_dev_s *dev,
|
||
|
FAR const uint8_t *pins, FAR bool *values,
|
||
|
int count)
|
||
|
{
|
||
|
gpiowarn("WARNING: iC-JX does not have implemented support for"
|
||
|
"multiple pin read operation!\n");
|
||
|
|
||
|
return -ENOTSUP;
|
||
|
}
|
||
|
#endif /* CONFIG_IOEXPANDER_MULTIPIN */
|
||
|
|
||
|
/****************************************************************************
|
||
|
* Public Functions
|
||
|
****************************************************************************/
|
||
|
|
||
|
/****************************************************************************
|
||
|
* Name: icjx_initialize
|
||
|
*
|
||
|
* Description:
|
||
|
* Instantiate and configure the ICJXxx device driver to use the
|
||
|
* provided SPI device instance.
|
||
|
*
|
||
|
* Input Parameters:
|
||
|
* spi - A SPI driver instance
|
||
|
* config - Persistent board configuration data
|
||
|
*
|
||
|
* Returned Value:
|
||
|
* an ioexpander_dev_s instance on success, NULL on failure.
|
||
|
*
|
||
|
****************************************************************************/
|
||
|
|
||
|
FAR struct ioexpander_dev_s *icjx_initialize(FAR struct spi_dev_s *spi,
|
||
|
FAR struct icjx_config_s *config)
|
||
|
{
|
||
|
FAR struct icjx_dev_s *priv;
|
||
|
uint8_t regval;
|
||
|
int ret;
|
||
|
|
||
|
#ifdef CONFIG_ICJX_MULTIPLE
|
||
|
/* Allocate the device state structure */
|
||
|
|
||
|
priv = kmm_zalloc(sizeof(struct icjx_dev_s));
|
||
|
if (!priv)
|
||
|
{
|
||
|
gpioerr("ERROR: Failed to allocate driver instance\n");
|
||
|
return NULL;
|
||
|
}
|
||
|
#else
|
||
|
/* Use the one-and-only I/O Expander driver instance */
|
||
|
|
||
|
priv = &g_icjx;
|
||
|
#endif
|
||
|
|
||
|
/* Initialize the device state structure */
|
||
|
|
||
|
priv->dev.ops = &g_icjx_ops;
|
||
|
priv->spi = spi;
|
||
|
priv->config = config;
|
||
|
priv->outpins = 0;
|
||
|
priv->outstate = 0;
|
||
|
|
||
|
nxmutex_init(&priv->lock);
|
||
|
|
||
|
/* Set pull up/down based on expander configuration. This is the first
|
||
|
* time we are accessing the expander therefore we do not have to worry
|
||
|
* about reading the register content first.
|
||
|
*/
|
||
|
|
||
|
regval = (config->current_src << 4) | config->current_src;
|
||
|
|
||
|
ret = icjx_write(priv, ICJX_CTRL_WORD_2_A, regval);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
gpioerr("ERROR: Could write to ICJX_CTRL_WORD_2_A: %d!\n", ret);
|
||
|
goto err;
|
||
|
}
|
||
|
|
||
|
ret = icjx_write(priv, ICJX_CTRL_WORD_2_B, regval);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
gpioerr("ERROR: Could write to ICJX_CTRL_WORD_2_B: %d!\n", ret);
|
||
|
goto err;
|
||
|
}
|
||
|
|
||
|
/* Bypass filters as those are not yet supported. */
|
||
|
|
||
|
regval = ICJX_CTRL_WORD_1_BYP0 | ICJX_CTRL_WORD_1_BYP1;
|
||
|
ret = icjx_write(priv, ICJX_CTRL_WORD_1_A, regval);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
gpioerr("ERROR: Could write to ICJX_CTRL_WORD_1_A: %d!\n", ret);
|
||
|
goto err;
|
||
|
}
|
||
|
|
||
|
ret = icjx_write(priv, ICJX_CTRL_WORD_1_B, regval);
|
||
|
if (ret < 0)
|
||
|
{
|
||
|
gpioerr("ERROR: Could write to ICJX_CTRL_WORD_1_B: %d!\n", ret);
|
||
|
goto err;
|
||
|
}
|
||
|
|
||
|
return &priv->dev;
|
||
|
|
||
|
err:
|
||
|
nxmutex_destroy(&priv->lock);
|
||
|
#ifdef CONFIG_ICJX_MULTIPLE
|
||
|
kmm_free(priv);
|
||
|
#endif
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
#endif /* CONFIG_IOEXPANDER_ICJX */
|