2016-11-01 21:42:54 +01:00
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README
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======
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README for NuttX port to the "Bambino 200E" board from Micromint USA
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featuring the NXP LPC4330FBD144 MCU
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Contents
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========
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- Bambino 200E board
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- Status
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- Serial Console
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- FPU
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- Bambino-200e Configuration Options
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- Configurations
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Bambino 200E board
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=====================
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Memory Map
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----------
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Block Start Length
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Name Address
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--------------------- ---------- ------
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RAM 0x10000000 128K
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RAM2 0x10080000 72K
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RAMAHB 0x20000000 32K
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RAMAHB2 0x20008000 16K
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RAMAHB3 0x2000c000 16K
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SPIFI flash 0x1e000000 4096K
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GPIO Usage:
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-----------
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GPIO PIN SIGNAL NAME
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-------------------------------- ------- --------------
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gpio3[7] - LED1 101 GPIO3[7]
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gpio5[5] - LED2 91 GPIO5[5]
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gpio0[7] - BTN1 96 GPIO0[7]
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Console
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-------
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The Bambino 200E default console is the UART1 on Gadgeteer Sockets 5 (U).
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Status
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======
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Many drivers are working (USB0 Device, Ethernet, etc), but many drivers are
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missing.
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Development Environment
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=======================
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Either Linux or Cygwin on Windows can be used for the development environment.
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The source has been built only using the GNU toolchain (see below). Other
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toolchains will likely cause problems. Testing was performed using the Cygwin
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environment.
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Serial Console
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==============
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The LPC4330 Xplorer does not have RS-232 drivers or serial connectors on board.
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USART0 and UART1 are available on J8 as follows:
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------ ------ -----------------------
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SIGNAL J8 PIN LPC4330FET100 PIN
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(TFBGA100 package)
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------ ------ -----------------------
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U0_TXD pin 9 F6 P6_4 U0_TXD=Alt 2
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U0_RXD pin 10 F9 P6_5 U0_RXD=Alt 2
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U1_TXD pin 13 H8 P1_13 U1_TXD=Alt 1
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U1_RXD pin 14 J8 P1_14 U1_RXD=Alt 1
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------ ------ -----------------------
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GND is available on J8 pin 1
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5V is available on J8 pin 2
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VBAT is available on J8 pin 3
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FPU
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===
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FPU Configuration Options
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-------------------------
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There are two version of the FPU support built into the most NuttX Cortex-M4
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2018-06-20 20:30:37 +02:00
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ports.
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2016-11-01 21:42:54 +01:00
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2018-06-20 20:30:37 +02:00
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1. Non-Lazy Floating Point Register Save
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2016-11-01 21:42:54 +01:00
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2018-06-20 20:30:37 +02:00
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In this configuration floating point register save and restore is
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implemented on interrupt entry and return, respectively. In this
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case, you may use floating point operations for interrupt handling
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logic if necessary. This FPU behavior logic is enabled by default
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with:
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CONFIG_ARCH_FPU=y
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2. Lazy Floating Point Register Save.
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2019-09-04 01:00:22 +02:00
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An alternative implementation only saves and restores FPU registers only
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2018-06-20 20:30:37 +02:00
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on context switches. This means: (1) floating point registers are not
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stored on each context switch and, hence, possibly better interrupt
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2016-11-01 21:42:54 +01:00
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performance. But, (2) since floating point registers are not saved,
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you cannot use floating point operations within interrupt handlers.
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This logic can be enabled by simply adding the following to your .config
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file:
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2018-06-20 20:30:37 +02:00
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CONFIG_ARCH_FPU=y
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CONFIG_ARMV7M_LAZYFPU=y
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2016-11-01 21:42:54 +01:00
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Bambino-200e Configuration Options
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==================================
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CONFIG_ARCH - Identifies the arch/ subdirectory. This should
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be set to:
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CONFIG_ARCH=arm
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CONFIG_ARCH_family - For use in C code:
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_architecture - For use in C code:
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CONFIG_ARCH_CORTEXM4=y
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CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
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CONFIG_ARCH_CHIP=lpc43xx
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CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
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chip:
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CONFIG_ARCH_CHIP_LPC4330=y
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2019-08-05 15:13:48 +02:00
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CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
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2016-11-01 21:42:54 +01:00
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hence, the board that supports the particular chip or SoC.
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CONFIG_ARCH_BOARD=bambino-200e (for the Bambino-200e board)
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CONFIG_ARCH_BOARD_name - For use in C code
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CONFIG_ARCH_BOARD_BAMBINO_200E=y
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CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
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of delay loops
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CONFIG_ENDIAN_BIG - define if big endian (default is little
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endian)
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CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case):
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CONFIG_RAM_SIZE=(32*1024) (32Kb)
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There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1.
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CONFIG_RAM_START - The start address of installed DRAM
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CONFIG_RAM_START=0x10000000
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CONFIG_ARCH_FPU - The LPC43xxx supports a floating point unit (FPU)
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CONFIG_ARCH_FPU=y
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CONFIG_LPC43_BOOT_xxx - The startup code needs to know if the code is running
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from internal FLASH, external FLASH, SPIFI, or SRAM in order to
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initialize properly. Note that a boot device is not specified for
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cases where the code is copied into SRAM; those cases are all covered
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by CONFIG_LPC43_BOOT_SRAM.
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CONFIG_LPC43_BOOT_SRAM=y : Running from SRAM (0x1000:0000)
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CONFIG_LPC43_BOOT_SPIFI=y : Running from QuadFLASH (0x1400:0000)
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CONFIG_LPC43_BOOT_FLASHA=y : Running in internal FLASHA (0x1a00:0000)
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CONFIG_LPC43_BOOT_FLASHB=y : Running in internal FLASHA (0x1b00:0000)
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CONFIG_LPC43_BOOT_CS0FLASH=y : Running in external FLASH CS0 (0x1c00:0000)
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CONFIG_LPC43_BOOT_CS1FLASH=y : Running in external FLASH CS1 (0x1d00:0000)
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CONFIG_LPC43_BOOT_CS2FLASH=y : Running in external FLASH CS2 (0x1e00:0000)
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CONFIG_LPC43_BOOT_CS3FLASH=y : Running in external FLASH CS3 (0x1f00:0000)
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
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have LEDs
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CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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stack. If defined, this symbol is the size of the interrupt
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stack in bytes. If not defined, the user task stacks will be
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used during interrupt handling.
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CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
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Individual subsystems can be enabled:
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CONFIG_LPC43_ADC0=y
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CONFIG_LPC43_ADC1=y
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CONFIG_LPC43_ATIMER=y
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2018-06-28 23:11:23 +02:00
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CONFIG_LPC43_CAN0=y
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2016-11-01 21:42:54 +01:00
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CONFIG_LPC43_CAN1=y
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CONFIG_LPC43_DAC=y
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CONFIG_LPC43_EMC=y
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CONFIG_LPC43_ETHERNET=y
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CONFIG_LPC43_EVNTMNTR=y
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CONFIG_LPC43_GPDMA=y
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CONFIG_LPC43_I2C0=y
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CONFIG_LPC43_I2C1=y
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CONFIG_LPC43_I2S0=y
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CONFIG_LPC43_I2S1=y
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CONFIG_LPC43_LCD=y
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CONFIG_LPC43_MCPWM=y
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CONFIG_LPC43_QEI=y
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CONFIG_LPC43_RIT=y
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CONFIG_LPC43_RTC=y
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CONFIG_LPC43_SCT=y
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CONFIG_LPC43_SDMMC=y
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CONFIG_LPC43_SPI=y
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CONFIG_LPC43_SPIFI=y
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CONFIG_LPC43_SSP0=y
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CONFIG_LPC43_SSP1=y
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CONFIG_LPC43_TMR0=y
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CONFIG_LPC43_TMR1=y
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CONFIG_LPC43_TMR2=y
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CONFIG_LPC43_TMR3=y
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CONFIG_LPC43_USART0=y
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CONFIG_LPC43_UART1=y
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CONFIG_LPC43_USART2=y
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CONFIG_LPC43_USART3=y
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CONFIG_LPC43_USB0=y
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CONFIG_LPC43_USB1=y
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CONFIG_LPC43_USB1_ULPI=y
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CONFIG_LPC43_WWDT=y
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LPC43xx specific U[S]ART device driver settings
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CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the UARTn for the
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console and ttys0 (default is the USART0).
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CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
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This specific the size of the receive buffer
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CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
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being sent. This specific the size of the transmit buffer
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CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
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CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
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CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_U[S]ARTn_2STOP - Two stop bits
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CONFIG_USARTn_RS485MODE - Support LPC43xx USART0,2,3 RS485 mode
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ioctls (TIOCSRS485 and TIOCGRS485) to enable and disable
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RS-485 mode.
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LPC43xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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2018-06-28 23:11:23 +02:00
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CONFIG_LPC43_CAN0_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN0
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is defined.
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CONFIG_LPC43_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1
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is defined.
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2018-06-28 23:44:42 +02:00
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CONFIG_LPC43_CAN_TSEG1 - The number of CAN time quanta in segment 1.
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Default: 12
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CONFIG_LPC43_CAN_TSEG2 = the number of CAN time quanta in segment 2.
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Default: 4
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2016-11-01 21:42:54 +01:00
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LPC43xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC43_ETHERNET.
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CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY
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2020-02-23 09:50:23 +01:00
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CONFIG_LPC43_AUTONEG - Enable auto-negotiation
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2018-06-30 19:55:41 +02:00
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2019-07-11 18:50:00 +02:00
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CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb
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2018-06-30 19:55:41 +02:00
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CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18
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CONFIG_LPC43_ETH_NRXDESC - Configured number of Rx descriptors. Default: 18
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CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
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CONFIG_DEBUG_FEATURES.
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CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
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Also needs CONFIG_DEBUG_FEATURES.
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LPC43xx USB Device Configuration
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CONFIG_LPC43_USBDEV_FRAME_INTERRUPT
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Handle USB Start-Of-Frame events.
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Enable reading SOF from interrupt handler vs. simply reading on demand.
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Probably a bad idea... Unless there is some issue with sampling the SOF
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from hardware asynchronously.
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CONFIG_LPC43_USBDEV_EPFAST_INTERRUPT
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Enable high priority interrupts. I have no idea why you might want to
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do that
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CONFIG_LPC43_USBDEV_NDMADESCRIPTORS
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Number of DMA descriptors to allocate in SRAM.
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CONFIG_LPC43_USBDEV_DMA
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2019-07-11 18:50:00 +02:00
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Enable lpc17xx/lpc40xx-specific DMA support
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2016-11-01 21:42:54 +01:00
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CONFIG_LPC43_USBDEV_NOVBUS
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Define if the hardware implementation does not support the VBUS signal
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CONFIG_LPC43_USBDEV_NOLED
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Define if the hardware implementation does not support the LED output
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Configurations
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==============
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Each Bambino-200e configuration is maintained in a sub-directory and can be selected
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as follow:
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2019-08-06 00:53:39 +02:00
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tools/configure.sh bambino-200e:<subdir>
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2016-11-01 21:42:54 +01:00
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Where <subdir> is one of the following:
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2017-08-31 20:01:15 +02:00
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knsh:
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-----
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This is identical to the nsh configuration below except that NuttX
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is built as a PROTECTED mode, monolithic module and the user applications
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are built separately.
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It is recommends to use a special make command; not just 'make' but make
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with the following two arguments:
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make pass1 pass2
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In the normal case (just 'make'), make will attempt to build both user-
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and kernel-mode blobs more or less interleaved. That actual works!
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However, for me it is very confusing so I prefer the above make command:
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Make the user-space binaries first (pass1), then make the kernel-space
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binaries (pass2)
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NOTES:
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1. At the end of the build, there will be several files in the top-level
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NuttX build directory:
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PASS1:
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nuttx_user.elf - The pass1 user-space ELF file
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nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig)
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User.map - Symbols in the user-space ELF file
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PASS2:
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nuttx - The pass2 kernel-space ELF file
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nuttx.hex - The pass2 Intel HEX file (selected in defconfig)
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System.map - Symbols in the kernel-space ELF file
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The J-Link programmer will except files in .hex, .mot, .srec, and .bin
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formats.
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2. Combining .hex files. If you plan to use the .hex files with your
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debugger or FLASH utility, then you may need to combine the two hex
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files into a single .hex file. Here is how you can do that.
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a. The 'tail' of the nuttx.hex file should look something like this
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(with my comments added):
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$ tail nuttx.hex
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# 00, data records
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...
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:10 9DC0 00 01000000000800006400020100001F0004
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:10 9DD0 00 3B005A0078009700B500D400F300110151
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:08 9DE0 00 30014E016D0100008D
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# 05, Start Linear Address Record
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:04 0000 05 0800 0419 D2
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# 01, End Of File record
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:00 0000 01 FF
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Use an editor such as vi to remove the 05 and 01 records.
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b. The 'head' of the nuttx_user.hex file should look something like
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this (again with my comments added):
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$ head nuttx_user.hex
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# 04, Extended Linear Address Record
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:02 0000 04 0801 F1
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# 00, data records
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:10 8000 00 BD89 01084C800108C8110208D01102087E
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:10 8010 00 0010 00201C1000201C1000203C16002026
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:10 8020 00 4D80 01085D80010869800108ED83010829
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|
...
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Nothing needs to be done here. The nuttx_user.hex file should
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be fine.
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c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
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$ cat nuttx.hex nuttx_user.hex >combined.hex
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Then use the combined.hex file with the to write the FLASH image.
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If you do this a lot, you will probably want to invest a little time
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to develop a tool to automate these steps.
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Other option is to combine nuttx.bin and nuttx_user.bin this way:
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$ dd if=/dev/zero of=empty.bin bs=1k count=256
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$ cat nuttx.bin empty.bin > nuttxtmp.bin
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$ dd if=nuttxtmp.bin of=nuttxpad.bin bs=1k count=256
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|
$ cat nuttxpad.bin nuttx_user.bin > nuttxfinal.bin
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|
|
|
2017-02-15 02:31:39 +01:00
|
|
|
netnsh:
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|
|
|
-------
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|
Configures the NuttShell (nsh) located at examples/nsh. This
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|
|
configuration is focused on network testing.
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|
2016-11-01 21:42:54 +01:00
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|
nsh:
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|
|
----
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|
This configuration is the NuttShell (NSH) example at examples/nsh/.
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|
NOTES:
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|
|
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|
|
1. This configuration uses the mconf-based configuration tool. To
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|
|
change this configurations using that tool, you should:
|
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|
|
|
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|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
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|
|
see additional README.txt files in the NuttX tools repository.
|
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|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
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|
|
reconfiguration process.
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|
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|
|
2. By default, this project assumes that you are executing directly from
|
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|
|
SRAM.
|
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|
|
2020-05-13 16:18:31 +02:00
|
|
|
CONFIG_LPC43_BOOT_SRAM=y : Executing in SRAM
|
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows
|
2016-11-01 21:42:54 +01:00
|
|
|
|
|
|
|
3. To execute from SPIFI, you would need to set:
|
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|
|
|
|
|
|
CONFIG_LPC43_BOOT_SPIFI=y : Executing from SPIFI
|
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|
|
CONFIG_RAM_SIZE=(128*1024) : SRAM Bank0 size
|
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|
|
CONFIG_RAM_START=0x10000000 : SRAM Bank0 base address
|
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|
|
CONFIG_SPIFI_OFFSET=(512*1024) : SPIFI file system offset
|
|
|
|
|
|
|
|
CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks
|
|
|
|
to the memory pool.
|
|
|
|
|
|
|
|
4. This configuration an also be used create a block device on the SPIFI
|
|
|
|
FLASH. CONFIG_LPC43_SPIFI=y must also be defined to enable SPIFI setup
|
|
|
|
support:
|
|
|
|
|
|
|
|
SPIFI device geometry:
|
|
|
|
|
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|
|
CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many
|
|
|
|
bytes into the device address space. This offset must be an exact
|
|
|
|
multiple of the erase block size (CONFIG_SPIFI_BLKSIZE). Default 0.
|
|
|
|
CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined
|
|
|
|
then the driver will try to determine the correct erase block size by
|
|
|
|
examining that data returned from spifi_initialize (which sometimes
|
|
|
|
seems bad).
|
|
|
|
|
|
|
|
Other SPIFI options
|
|
|
|
|
|
|
|
CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more
|
|
|
|
FAT friendly 512 byte sector size and will manage the read-modify-write
|
|
|
|
operations on the larger erase block.
|
|
|
|
CONFIG_SPIFI_READONLY - Define to support only read-only operations.
|
|
|
|
CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead,
|
|
|
|
use an external library implementation of the SPIFI interface.
|
|
|
|
CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading
|
|
|
|
from the SPI address space after each write.
|
|
|
|
CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
|
|
|
|
probably do not want to enable this unless you want to dig through a
|
|
|
|
*lot* of debug output! Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
|
|
|
|
and CONFIG_DEBUG_FS,
|
|
|
|
|
|
|
|
5. In my experience, there were some missing function pointers in the LPC43xx
|
|
|
|
SPIFI ROM routines and the SPIFI configuration could only be built with
|
|
|
|
CONFIG_SPIFI_LIBRARY=y. The SPIFI library is proprietary and cannot be
|
|
|
|
provided within NuttX open source repository; SPIFI library binaries can
|
|
|
|
be found on the lpcware.com website. In this build sceneario, you must
|
|
|
|
also provide the patch to the external SPIFI library be defining the make
|
|
|
|
variable EXTRA_LIBS in the top-level Make.defs file. Good luck!
|
2017-02-15 02:31:39 +01:00
|
|
|
|
|
|
|
usbnsh:
|
|
|
|
-------
|
|
|
|
|
|
|
|
This is another NSH example. If differs from other 'nsh' configurations
|
|
|
|
in that this configurations uses a USB serial device for console I/O.
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. This configuration does have UART1 output enabled and set up as
|
|
|
|
the system logging device:
|
|
|
|
|
|
|
|
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
|
|
|
|
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART1 will be /dev/ttyS0
|
|
|
|
|
2020-02-23 09:50:23 +01:00
|
|
|
However, there is nothing to generate SYSLOG output in the default
|
2017-02-15 02:31:39 +01:00
|
|
|
configuration so nothing should appear on UART1 unless you enable
|
|
|
|
some debug output or enable the USB monitor.
|
|
|
|
|
|
|
|
NOTE: Using the SYSLOG to get debug output has limitations. Among
|
|
|
|
those are that you cannot get debug output from interrupt handlers.
|
|
|
|
So, in particularly, debug output is not a useful way to debug the
|
|
|
|
USB device controller driver. Instead, use the USB monitor with
|
|
|
|
USB debug off and USB trace on (see below).
|
|
|
|
|
|
|
|
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
|
|
|
|
device will save encoded trace output in in-memory buffer; if the
|
|
|
|
USB monitor is enabled, that trace buffer will be periodically
|
|
|
|
emptied and dumped to the system logging device (UART2 in this
|
|
|
|
configuration):
|
|
|
|
|
|
|
|
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
|
|
|
|
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
|
|
|
|
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
|
|
|
|
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
|
|
|
|
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
|
|
|
|
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
|
|
|
|
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
|
|
|
|
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
|
|
|
|
|
|
|
|
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
|
|
|
|
CONFIG_USBMONITOR_TRACECLASS=y
|
|
|
|
CONFIG_USBMONITOR_TRACETRANSFERS=y
|
|
|
|
CONFIG_USBMONITOR_TRACECONTROLLER=y
|
|
|
|
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
|