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corrected typos and inconsistencies for USB OTG configuration

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This commit is contained in:
Titus von Boxberg 2017-07-15 09:36:29 +02:00
parent 799b2d5671
commit 006fa75171
2 changed files with 3 additions and 3 deletions
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4
configs/stm32f746g-disco/README.txt
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@ -340,11 +340,11 @@ STM32F746G-DISCO-specific Configuration Options
CONFIG_STM32F7_DMA2 DMA2 CONFIG_STM32F7_DMA2 DMA2
CONFIG_STM32F7_ETHMAC Ethernet MAC CONFIG_STM32F7_ETHMAC Ethernet MAC
CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D) CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D)
CONFIG_STM32F7_USBOTGHS USB OTG HS CONFIG_STM32F7_OTGHS USB OTG HS
AHB2 AHB2
---- ----
CONFIG_STM32F7_USBOTGFS USB OTG FS CONFIG_STM32F7_OTGFS USB OTG FS
CONFIG_STM32F7_DCMI DCMI CONFIG_STM32F7_DCMI DCMI
CONFIG_STM32F7_CRYP CRYP CONFIG_STM32F7_CRYP CRYP
CONFIG_STM32F7_HASH HASH CONFIG_STM32F7_HASH HASH

2
configs/stm32f746g-disco/include/board.h
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@ -103,7 +103,7 @@
* 2 <= PLLQ <= 15 * 2 <= PLLQ <= 15
*/ */
#if defined(CONFIG_STM32F7_USBOTHFS) #if defined(CONFIG_STM32F7_OTGFS)
/* Highest SYSCLK with USB OTG FS clock = 48 MHz /* Highest SYSCLK with USB OTG FS clock = 48 MHz
* *
* PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz * PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz