Correction to ARM RAM vectors logic from Paul Y. Zhang
This commit is contained in:
parent
a3efe72f78
commit
007fdfedf6
@ -68,7 +68,7 @@
|
||||
* the table.
|
||||
*/
|
||||
|
||||
#define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS)
|
||||
#define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS + 16)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
|
@ -100,7 +100,7 @@ void up_ramvec_initialize(void)
|
||||
|
||||
/* The vector table must be aligned */
|
||||
|
||||
DEBUGASSERT(((uintptr)g_ram_vectors & ~NVIC_VECTAB_TBLOFF_MASK) == 0);
|
||||
DEBUGASSERT(((uint32_t)g_ram_vectors & ~NVIC_VECTAB_TBLOFF_MASK) == 0);
|
||||
|
||||
/* Copy the ROM vector table at address zero to RAM vector table.
|
||||
*
|
||||
|
Loading…
Reference in New Issue
Block a user