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Correction to ARM RAM vectors logic from Paul Y. Zhang

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This commit is contained in:
Gregory Nutt 2013-04-23 09:32:11 -06:00
parent a3efe72f78
commit 007fdfedf6
2 changed files with 2 additions and 2 deletions
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2
arch/arm/src/armv7-m/ram_vectors.h
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@ -68,7 +68,7 @@
* the table. * the table.
*/ */
#define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS) #define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS + 16)
/************************************************************************************ /************************************************************************************
* Public Data * Public Data

2
arch/arm/src/armv7-m/up_ramvec_initialize.c
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@ -100,7 +100,7 @@ void up_ramvec_initialize(void)
/* The vector table must be aligned */ /* The vector table must be aligned */
DEBUGASSERT(((uintptr)g_ram_vectors & ~NVIC_VECTAB_TBLOFF_MASK) == 0); DEBUGASSERT(((uint32_t)g_ram_vectors & ~NVIC_VECTAB_TBLOFF_MASK) == 0);
/* Copy the ROM vector table at address zero to RAM vector table. /* Copy the ROM vector table at address zero to RAM vector table.
* *