From 00856c8cae4949b4381cbb723b1522b5763721aa Mon Sep 17 00:00:00 2001 From: patacongo Date: Tue, 13 Oct 2009 23:37:06 +0000 Subject: [PATCH] When running from DFU load, need to set NVIC vector address git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2129 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/stm32/stm32_internal.h | 57 ++++++++++++++-------------- arch/arm/src/stm32/stm32_irq.c | 23 ++++++----- arch/arm/src/stm32/stm32_memorymap.h | 5 ++- arch/arm/src/stm32/stm32_start.c | 2 - arch/arm/src/stm32/stm32_vectors.S | 7 ++-- 5 files changed, 46 insertions(+), 48 deletions(-) diff --git a/arch/arm/src/stm32/stm32_internal.h b/arch/arm/src/stm32/stm32_internal.h index ba0011dd54..25cff135fb 100755 --- a/arch/arm/src/stm32/stm32_internal.h +++ b/arch/arm/src/stm32/stm32_internal.h @@ -397,67 +397,76 @@ extern "C" { #define EXTERN extern #endif -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ +/* This symbol references the Cortex-M3 vector table (as positioned by the the linker + * script, ld.script or ld.script.dfu. The standard location for the vector table is + * at the beginning of FLASH at address 0x0800:0000. If we are using the STMicro DFU + * bootloader, then the vector table will be offset to a different location in FLASH + * and we will need to set the NVIC vector location to this alternative location. + */ -/**************************************************************************** +extern uint32 stm32_vectors[]; /* See stm32_vectors.S */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ * Name: stm32_lowsetup * * Description: * Called at the very beginning of _start. Performs low level initialization. * - ****************************************************************************/ + ************************************************************************************/ EXTERN void stm32_lowsetup(void); -/**************************************************************************** +/************************************************************************************ * Name: stm32_clockconfig * * Description: * Called to change to new clock based on settings in board.h * - ****************************************************************************/ + ************************************************************************************/ EXTERN void stm32_clockconfig(void); -/**************************************************************************** +/************************************************************************************ * Name: stm32_configgpio * * Description: * Configure a GPIO pin based on bit-encoded description of the pin. * - ****************************************************************************/ + ************************************************************************************/ EXTERN int stm32_configgpio(uint32 cfgset); -/**************************************************************************** +/************************************************************************************ * Name: stm32_gpiowrite * * Description: * Write one or zero to the selected GPIO pin * - ****************************************************************************/ + ************************************************************************************/ EXTERN void stm32_gpiowrite(uint32 pinset, boolean value); -/**************************************************************************** +/************************************************************************************ * Name: stm32_gpioread * * Description: * Read one or zero from the selected GPIO pin * - ****************************************************************************/ + ************************************************************************************/ EXTERN boolean stm32_gpioread(uint32 pinset); -/**************************************************************************** +/************************************************************************************ * Function: stm32_dumpgpio * * Description: * Dump all GPIO registers associated with the provided base address * - ****************************************************************************/ + ************************************************************************************/ #ifdef CONFIG_DEBUG EXTERN int stm32_dumpgpio(uint32 pinset, const char *msg); @@ -465,17 +474,7 @@ EXTERN int stm32_dumpgpio(uint32 pinset, const char *msg); # define stm32_dumpgpio(p,m) #endif -/**************************************************************************** - * Name: gpio_irqinitialize - * - * Description: - * Initialize all vectors to the unexpected interrupt handler - * - ****************************************************************************/ - -EXTERN int weak_function gpio_irqinitialize(void); - -/**************************************************************************** +/************************************************************************************ * Function: stm32_ethinitialize * * Description: @@ -492,13 +491,13 @@ EXTERN int weak_function gpio_irqinitialize(void); * * Assumptions: * - ****************************************************************************/ + ************************************************************************************/ #if STM32_NTHERNET > 1 EXTERN int stm32_ethinitialize(int intf); #endif -/**************************************************************************** +/************************************************************************************ * The external functions, stm32_spi1/2select and stm32_spi1/2status must be * provided by board-specific logic. They are implementations of the select * and status methods of the SPI interface defined by struct spi_ops_s (see @@ -518,7 +517,7 @@ EXTERN int stm32_ethinitialize(int intf); * mmcsd_spislotinitialize(), for example, will bind the SPI driver to * the SPI MMC/SD driver). * - ****************************************************************************/ + ************************************************************************************/ struct spi_dev_s; enum spi_dev_e; diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index a11fe3cc99..cc5a16dda3 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -280,6 +280,16 @@ void up_irqinitialize(void) putreg32(0, NVIC_IRQ0_31_ENABLE); putreg32(0, NVIC_IRQ32_63_ENABLE); + /* The standard location for the vector table is at the beginning of FLASH + * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then + * the vector table will be offset to a different location in FLASH and we + * will need to set the NVIC vector location to this alternative location. + */ + +#ifdef CONFIG_STM32_DFU + putreg32((uint32)stm32_vectors, NVIC_VECTAB); +#endif + /* Set all interrrupts (and exceptions) to the default priority */ putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY); @@ -308,17 +318,6 @@ void up_irqinitialize(void) current_regs = NULL; - /* Initialize support for GPIO interrupts if included in this build */ - -#ifndef CONFIG_STM32_DISABLE_GPIO_IRQS -#ifdef CONFIG_HAVE_WEAKFUNCTIONS - if (gpio_irqinitialize != NULL) -#endif - { - gpio_irqinitialize(); - } -#endif - /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault * must also be caught because a SVCall may show up as a Hard Fault @@ -346,7 +345,7 @@ void up_irqinitialize(void) irq_attach(STM32_IRQ_RESERVED, stm32_reserved); #endif - stm32_dumpnvic("inital", NR_IRQS); + stm32_dumpnvic("initial", NR_IRQS); #ifndef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/stm32/stm32_memorymap.h b/arch/arm/src/stm32/stm32_memorymap.h index 89cfcafded..2ce9ff516b 100755 --- a/arch/arm/src/stm32/stm32_memorymap.h +++ b/arch/arm/src/stm32/stm32_memorymap.h @@ -123,10 +123,11 @@ #define STM32_ETHERNET_BASE 0x40028000 /* 0x40028000 - 0x40029fff: Ethernet */ /* 0x40030000 - 0x4fffffff: Reserved */ -/* Other registers */ +/* Other registers -- see cortexm3/nvic.h for standard Cortex-M3 registers in this + * address range + */ #define STM32_SCS_BASE 0xe000e000 -#define STM32_NVIC_BASE 0xe000e000 /* 0xe000e00-0xe000efff: Nested Vectored Interrupt Controller */ #define STM32_DEBUGMCU_BASE 0xe0042000 /************************************************************************************ diff --git a/arch/arm/src/stm32/stm32_start.c b/arch/arm/src/stm32/stm32_start.c index 554b94ca4b..85164af841 100644 --- a/arch/arm/src/stm32/stm32_start.c +++ b/arch/arm/src/stm32/stm32_start.c @@ -62,8 +62,6 @@ * Public Data ****************************************************************************/ -extern void stm32_vectors(void); - /**************************************************************************** * Private Functions ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_vectors.S b/arch/arm/src/stm32/stm32_vectors.S index 314710294c..6a8f64c5bb 100644 --- a/arch/arm/src/stm32/stm32_vectors.S +++ b/arch/arm/src/stm32/stm32_vectors.S @@ -47,9 +47,10 @@ /* Memory Map: * - * 0x0000:0000 - Beginning of FLASH. Address of vectors (if not using bootloader) - * 0x0002:0000 - Address of vectors if using bootloader - * 0x0003:ffff - End of flash + * 0x0800:0000 - Beginning of FLASH. Address of vectors (if not using bootloader) + * Mapped to address 0x0000:0000 at boot time. + * 0x0800:3000 - Address of vectors if using bootloader + * 0x0803:ffff - End of flash * 0x2000:0000 - Start of SRAM and start of .data (_sdata) * - End of .data (_edata) abd start of .bss (_sbss) * - End of .bss (_ebss) and bottom of idle stack