From 0098c9ec5ff72cf9b10ea8d94656b1c047425207 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 14 Aug 2013 17:33:31 -0600
Subject: [PATCH] SAMA5:  ports should not be reset state (seems to make no
 difference)

---
 arch/arm/src/sama5/sam_ohci.c              | 16 +++++++++++++++-
 configs/sama5d3x-ek/include/board_384mhz.h |  2 +-
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c
index b7bb025e0f..da26653bef 100644
--- a/arch/arm/src/sama5/sam_ohci.c
+++ b/arch/arm/src/sama5/sam_ohci.c
@@ -124,7 +124,10 @@
 #endif
 
 /* OHCI Setup ******************************************************************/
-/* Frame Interval / Periodic Start */
+/* Frame Interval / Periodic Start.
+ *
+ * At 12Mbps, there are 12000 bit time in each 1Msec frame.
+ */
 
 #define BITS_PER_FRAME          12000
 #define FI                     (BITS_PER_FRAME-1)
@@ -2691,6 +2694,17 @@ FAR struct usbhost_connection_s *sam_ohci_initialize(int controller)
   putreg32(regval, SAM_PMC_SCER);
   irqrestore(flags);
 
+  /* Make all three ports usable.  Zero is the reset value and holds the
+   * ports in reset.
+   * REVISIT:  This will have to change in future.  Should be a configuration
+   * setting
+   */
+
+  regval  = getreg32(SAM_SFR_OHCIICR);
+  regval |= (SFR_OHCIICR_RES0 | SFR_OHCIICR_RES1 | SFR_OHCIICR_RES2);
+  putreg32(regval, SAM_SFR_OHCIICR);
+  irqrestore(flags);
+
   /* Note that no pin pinconfiguration is required.  All USB HS pins have
    * dedicated function
    */
diff --git a/configs/sama5d3x-ek/include/board_384mhz.h b/configs/sama5d3x-ek/include/board_384mhz.h
index 583f618301..ec39bb329d 100644
--- a/configs/sama5d3x-ek/include/board_384mhz.h
+++ b/configs/sama5d3x-ek/include/board_384mhz.h
@@ -123,7 +123,7 @@
  *
  *  USB Clock = PLLACK / (USBDIV + 1) = 48MHz
  *  USBDIV    = PLLACK / 48MHz - 1
- *            = 16
+ *            = 15
  *
  *  The maximum value of USBDIV is 15 corresponding to a divisor of 16.
  *  REVISIT: USBDIV = 15 gives an exact clock of 48MHz.