esp32[c3|c6|h2]: Add SPI slave DMA support
This commit is contained in:
Eren Terzioglu
Xiang Xiao
parent
f5b63cea18
commit
00ff9ef15c
@ -51,6 +51,10 @@
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#include "hal/spi_slave_hal.h"
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#include "periph_ctrl.h"
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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#include "esp_dma.h"
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#endif
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#include "riscv_internal.h"
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/****************************************************************************
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@ -59,6 +63,22 @@
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#define SPI_SLAVE_BUFSIZE (CONFIG_ESPRESSIF_SPI2_SLAVE_BUFSIZE)
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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/* SPI DMA RX/TX number of descriptors */
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#if (SPI_SLAVE_BUFSIZE % ESPRESSIF_DMA_DATALEN_MAX) > 0
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# define SPI_DMA_DESC_NUM (SPI_SLAVE_BUFSIZE / ESPRESSIF_DMA_DATALEN_MAX + 1)
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#else
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# define SPI_DMA_DESC_NUM (SPI_SLAVE_BUFSIZE / ESPRESSIF_DMA_DATALEN_MAX)
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#endif
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#endif /* CONFIG_ESPRESSIF_SPI2_DMA */
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#if defined(CONFIG_ARCH_CHIP_ESP32C6) || defined(CONFIG_ARCH_CHIP_ESP32H2)
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# define SPI2_INTR_SOURCE GSPI2_INTR_SOURCE
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# define ESP_IRQ_SPI2 ESP_IRQ_GSPI2
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#endif
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/* Verify whether SPI has been assigned IOMUX pins.
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* Otherwise, SPI signals will be routed via GPIO Matrix.
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*/
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@ -123,6 +143,9 @@ struct spislave_priv_s
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int refs; /* Reference count */
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int cpuint; /* SPI interrupt ID */
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enum spi_slave_mode_e mode; /* Current SPI Slave hardware mode */
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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int32_t dma_channel; /* Channel assigned by the GDMA driver */
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#endif
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uint8_t nbits; /* Current configured bit width */
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uint32_t tx_length; /* Location of next TX value */
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@ -151,6 +174,15 @@ struct spislave_priv_s
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* Private Function Prototypes
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****************************************************************************/
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/* SPI Slave controller buffer operations */
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#ifndef CONFIG_ESPRESSIF_SPI2_DMA
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static inline void spislave_cpu_tx_fifo_reset(spi_dev_t *hw);
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#else
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static inline void spislave_dma_tx_fifo_reset(spi_dev_t *hw);
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static inline void spislave_dma_rx_fifo_reset(spi_dev_t *hw);
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#endif
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/* SPI Slave controller interrupt handlers */
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static int spislave_cs_interrupt(int irq, void *context, void *arg);
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@ -160,6 +192,12 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg);
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static void spislave_evict_sent_data(struct spislave_priv_s *priv,
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uint32_t sent_bytes);
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static void spislave_setup_rx_dma(struct spislave_priv_s *priv);
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static void spislave_setup_tx_dma(struct spislave_priv_s *priv);
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static void spislave_prepare_next_tx(struct spislave_priv_s *priv);
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static void spislave_dma_init(struct spislave_priv_s *priv);
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#endif
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static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr);
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/* SPI Slave controller operations */
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@ -189,7 +227,7 @@ static const struct spislave_config_s esp_spi2slave_config =
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.mosi_pin = CONFIG_ESPRESSIF_SPI2_MOSIPIN,
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.miso_pin = CONFIG_ESPRESSIF_SPI2_MISOPIN,
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.clk_pin = CONFIG_ESPRESSIF_SPI2_CLKPIN,
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.periph = ETS_SPI2_INTR_SOURCE,
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.periph = SPI2_INTR_SOURCE,
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.irq = ESP_IRQ_SPI2,
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.cs_insig = FSPICS0_IN_IDX,
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.cs_outsig = FSPICS0_OUT_IDX,
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@ -221,6 +259,9 @@ static struct spislave_priv_s esp_spi2slave_priv =
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.config = &esp_spi2slave_config,
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.refs = 0,
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.cpuint = -ENOMEM,
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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.dma_channel = -ENOMEM,
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#endif
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.mode = SPISLAVE_MODE0,
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.nbits = 0,
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.tx_length = 0,
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@ -247,6 +288,15 @@ static struct spislave_priv_s esp_spi2slave_priv =
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};
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#endif /* CONFIG_ESPRESSIF_SPI2 */
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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/* SPI DMA RX/TX description */
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static struct esp_dmadesc_s dma_rxdesc[SPI_DMA_DESC_NUM];
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static struct esp_dmadesc_s dma_txdesc[SPI_DMA_DESC_NUM];
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -266,10 +316,56 @@ static struct spislave_priv_s esp_spi2slave_priv =
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*
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****************************************************************************/
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#ifndef CONFIG_ESPRESSIF_SPI2_DMA
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static inline void spislave_cpu_tx_fifo_reset(spi_dev_t *hw)
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{
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spi_ll_cpu_tx_fifo_reset(hw);
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}
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#endif
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/****************************************************************************
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* Name: spislave_dma_tx_fifo_reset
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*
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* Description:
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* Reset the DMA TX AFIFO, which is used to send data out in SPI Slave
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* DMA-controlled mode transfer.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static inline void spislave_dma_tx_fifo_reset(spi_dev_t *hw)
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{
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spi_ll_dma_tx_fifo_reset(hw);
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}
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#endif
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/****************************************************************************
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* Name: spislave_dma_rx_fifo_reset
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*
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* Description:
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* Reset the RX AFIFO, which is used to receive data in SPI Slave mode
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* transfer.
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*
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* Input Parameters:
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* hw - Beginning address of the peripheral register
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static inline void spislave_dma_rx_fifo_reset(spi_dev_t *hw)
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{
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spi_ll_dma_rx_fifo_reset(hw);
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}
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#endif
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/****************************************************************************
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* Name: spislave_cs_interrupt
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@ -335,6 +431,80 @@ static void spislave_evict_sent_data(struct spislave_priv_s *priv,
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}
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}
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/****************************************************************************
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* Name: spislave_setup_rx_dma
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*
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* Description:
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* Configure the SPI Slave peripheral to perform the next RX data transfer
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* via DMA.
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*
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* Input Parameters:
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* priv - Private SPI Slave controller structure
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static void spislave_setup_rx_dma(struct spislave_priv_s *priv)
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{
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uint32_t length = SPI_SLAVE_BUFSIZE - priv->rx_length;
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esp_dma_setup(priv->dma_channel, false, dma_rxdesc, SPI_DMA_DESC_NUM,
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priv->rx_buffer + priv->rx_length, length);
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spi_ll_slave_reset(priv->ctx.hw);
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/* Clear input FIFO full error */
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spi_ll_infifo_full_clr(priv->ctx.hw);
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/* Enable SPI DMA RX */
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spi_ll_dma_rx_enable(priv->ctx.hw, true);
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esp_dma_enable(priv->dma_channel, false);
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}
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#endif
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/****************************************************************************
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* Name: spislave_setup_tx_dma
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*
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* Description:
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* Configure the SPI Slave peripheral to perform the next TX data transfer
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* via DMA.
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*
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* Input Parameters:
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* priv - Private SPI Slave controller structure
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static void spislave_setup_tx_dma(struct spislave_priv_s *priv)
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{
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esp_dma_setup(priv->dma_channel, true, dma_txdesc, SPI_DMA_DESC_NUM,
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priv->tx_buffer, SPI_SLAVE_BUFSIZE);
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spislave_dma_tx_fifo_reset(priv->ctx.hw);
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spi_ll_slave_reset(priv->ctx.hw);
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/* Clear output FIFO full error */
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spi_ll_outfifo_empty_clr(priv->ctx.hw);
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/* Enable SPI DMA TX */
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spi_ll_dma_tx_enable(priv->ctx.hw, true);
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esp_dma_enable(priv->dma_channel, true);
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}
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#endif
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/****************************************************************************
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* Name: spislave_prepare_next_tx
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*
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@ -354,14 +524,20 @@ static void spislave_prepare_next_tx(struct spislave_priv_s *priv)
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{
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if (priv->tx_length != 0)
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{
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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spislave_setup_tx_dma(priv);
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#else
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spi_slave_hal_prepare_data(&priv->ctx);
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#endif
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priv->is_tx_enabled = true;
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}
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else
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{
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spiwarn("TX buffer empty! Disabling TX for next transaction\n");
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#ifndef CONFIG_ESPRESSIF_SPI2_DMA
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spislave_cpu_tx_fifo_reset(priv->ctx.hw);
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#endif
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priv->is_tx_enabled = false;
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}
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@ -404,6 +580,13 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
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priv->rx_length += transfer_size;
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}
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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if (priv->rx_length < SPI_SLAVE_BUFSIZE)
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{
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spislave_setup_rx_dma(priv);
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}
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#endif
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/* TX process */
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if (transfer_size > 0 && priv->is_tx_enabled)
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@ -431,6 +614,40 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
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return 0;
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}
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/****************************************************************************
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* Name: spislave_dma_init
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*
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* Description:
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* Initialize SPI Slave connection to GDMA engine.
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*
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* Input Parameters:
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* priv - Private SPI Slave controller structure
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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static void spislave_dma_init(struct spislave_priv_s *priv)
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{
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/* Initialize GDMA controller */
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esp_dma_init();
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/* Request a GDMA channel for SPI peripheral */
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priv->dma_channel = esp_dma_request(ESPRESSIF_DMA_PERIPH_M2M, 1, 1,
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true);
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if (priv->dma_channel < 0)
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{
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spierr("Failed to allocate GDMA channel\n");
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DEBUGPANIC();
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}
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}
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#endif
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/****************************************************************************
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* Name: spislave_initialize
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*
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@ -483,13 +700,25 @@ static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr)
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esp_gpio_matrix_in(config->clk_pin, config->clk_insig, 0);
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#endif
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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spislave_dma_init(priv);
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#endif
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esp_gpioirqenable(ESP_PIN2IRQ(config->cs_pin), RISING);
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priv->ctx.rx_lsbfirst = 0;
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priv->ctx.tx_lsbfirst = 0;
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#ifdef CONFIG_ESPRESSIF_SPI2_DMA
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priv->ctx.dmadesc_n = priv->dma_channel;
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priv->ctx.use_dma = 1;
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priv->ctx.dmadesc_rx = (lldesc_t *)dma_rxdesc;
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priv->ctx.dmadesc_tx = (lldesc_t *)dma_txdesc;
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#else
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priv->ctx.dmadesc_n = 0;
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priv->ctx.use_dma = 0;
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#endif
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}
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/****************************************************************************
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@ -606,6 +835,8 @@ static void spislave_unbind(struct spi_slave_ctrlr_s *ctrlr)
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/* Disable the trans_done interrupt */
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spi_ll_disable_intr(priv->ctx.hw, SPI_LL_INTR_TRANS_DONE);
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periph_module_disable(priv->module);
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priv->dev = NULL;
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@ -922,6 +1153,11 @@ int esp_spislave_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr)
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priv->cpuint = -ENOMEM;
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esp_gpioirqdisable(ESP_PIN2IRQ(priv->config->cs_pin));
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/* Disable the trans_done interrupt */
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spi_ll_disable_intr(priv->ctx.hw, SPI_LL_INTR_TRANS_DONE);
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periph_module_disable(priv->module);
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priv->cpuint = -ENOMEM;
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