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drivers/mtd/sst25.c: Appease nxstyle

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YAMAMOTO Takashi 2020-12-05 13:55:23 +09:00 committed by Xiang Xiao
parent d6e1ae5616
commit 012a34aef7
1 changed files with 34 additions and 13 deletions
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45
drivers/mtd/sst25.c
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@ -65,7 +65,9 @@
/************************************************************************************ /************************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ************************************************************************************/
/* Configuration ********************************************************************/ /* Configuration ********************************************************************/
/* Per the data sheet, the SST25 parts can be driven with either SPI mode 0 (CPOL=0 /* Per the data sheet, the SST25 parts can be driven with either SPI mode 0 (CPOL=0
* and CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices * and CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices
* can operate in mode 0 or 1. So you may need to specify CONFIG_SST25_SPIMODE to * can operate in mode 0 or 1. So you may need to specify CONFIG_SST25_SPIMODE to
@ -84,8 +86,11 @@
#endif #endif
/* SST25 Instructions ***************************************************************/ /* SST25 Instructions ***************************************************************/
/* Command Value Description Addr Data */ /* Command Value Description Addr Data */
/* Dummy */ /* Dummy */
#define SST25_READ 0x03 /* Read data bytes 3 0 >=1 */ #define SST25_READ 0x03 /* Read data bytes 3 0 >=1 */
#define SST25_FAST_READ 0x0b /* Higher speed read 3 1 >=1 */ #define SST25_FAST_READ 0x0b /* Higher speed read 3 1 >=1 */
#define SST25_SE 0x20 /* 4Kb Sector erase 3 0 0 */ #define SST25_SE 0x20 /* 4Kb Sector erase 3 0 0 */
@ -107,6 +112,7 @@
#define SST25_DBSY 0x80 /* Disable SO RY/BY# status 0 0 0 */ #define SST25_DBSY 0x80 /* Disable SO RY/BY# status 0 0 0 */
/* SST25 Registers ******************************************************************/ /* SST25 Registers ******************************************************************/
/* Read ID (RDID) register values */ /* Read ID (RDID) register values */
#define SST25_MANUFACTURER 0xbf /* SST manufacturer ID */ #define SST25_MANUFACTURER 0xbf /* SST manufacturer ID */
@ -134,17 +140,24 @@
# define SST25_SR_BP_UPPERQTR (5 << SST25_SR_BP_SHIFT) /* Upper quarter */ # define SST25_SR_BP_UPPERQTR (5 << SST25_SR_BP_SHIFT) /* Upper quarter */
# define SST25_SR_BP_UPPERHALF (6 << SST25_SR_BP_SHIFT) /* Upper half */ # define SST25_SR_BP_UPPERHALF (6 << SST25_SR_BP_SHIFT) /* Upper half */
# define SST25_SR_BP_ALL (7 << SST25_SR_BP_SHIFT) /* All sectors */ # define SST25_SR_BP_ALL (7 << SST25_SR_BP_SHIFT) /* All sectors */
#define SST25_SR_AAI (1 << 6) /* Bit 6: Auto Address increment programming */ #define SST25_SR_AAI (1 << 6) /* Bit 6: Auto Address increment programming */
#define SST25_SR_SRWD (1 << 7) /* Bit 7: Status register write protect */ #define SST25_SR_SRWD (1 << 7) /* Bit 7: Status register write protect */
#define SST25_DUMMY 0xa5 #define SST25_DUMMY 0xa5
/* Chip Geometries ******************************************************************/ /* Chip Geometries ******************************************************************/
/* SST25VF512 capacity is 512Kbit (64Kbit x 8) = 64Kb (8Kb x 8) */ /* SST25VF512 capacity is 512Kbit (64Kbit x 8) = 64Kb (8Kb x 8) */
/* SST25VF010 capacity is 1Mbit (128Kbit x 8) = 128Kb (16Kb x 8 */ /* SST25VF010 capacity is 1Mbit (128Kbit x 8) = 128Kb (16Kb x 8 */
/* SST25VF520 capacity is 2Mbit (256Kbit x 8) = 256Kb (32Kb x 8) */ /* SST25VF520 capacity is 2Mbit (256Kbit x 8) = 256Kb (32Kb x 8) */
/* SST25VF540 capacity is 4Mbit (512Kbit x 8) = 512Kb (64Kb x 8) */ /* SST25VF540 capacity is 4Mbit (512Kbit x 8) = 512Kb (64Kb x 8) */
/* SST25VF080 capacity is 8Mbit (1024Kbit x 8) = 1Mb (128Kb x 8) */ /* SST25VF080 capacity is 8Mbit (1024Kbit x 8) = 1Mb (128Kb x 8) */
/* Not yet supported */ /* Not yet supported */
/* SST25VF016 capacity is 16Mbit (2048Kbit x 8) = 2Mb (256Kb x 8) */ /* SST25VF016 capacity is 16Mbit (2048Kbit x 8) = 2Mb (256Kb x 8) */
@ -616,7 +629,8 @@ static void sst25_bytewrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Wait for any preceding write or erase operation to complete. */ /* Wait for any preceding write or erase operation to complete. */
status = sst25_waitwritecomplete(priv); status = sst25_waitwritecomplete(priv);
DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) == 0); DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK |
SST25_SR_AAI)) == 0);
/* Enable write access to the FLASH */ /* Enable write access to the FLASH */
@ -747,7 +761,6 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
(buffer[0] != SST25_ERASED_STATE || (buffer[0] != SST25_ERASED_STATE ||
buffer[1] != SST25_ERASED_STATE)) buffer[1] != SST25_ERASED_STATE))
{ {
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
@ -792,9 +805,9 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
#if defined(CONFIG_SST25_SECTOR512) && !defined(CONFIG_SST25_READONLY) #if defined(CONFIG_SST25_SECTOR512) && !defined(CONFIG_SST25_READONLY)
static void sst25_cacheflush(struct sst25_dev_s *priv) static void sst25_cacheflush(struct sst25_dev_s *priv)
{ {
/* If the cached is dirty (meaning that it no longer matches the old FLASH contents) /* If the cached is dirty (meaning that it no longer matches the old FLASH
* or was erased (with the cache containing the correct FLASH contents), then write * contents) or was erased (with the cache containing the correct FLASH
* the cached erase block to FLASH. * contents), then write the cached erase block to FLASH.
*/ */
if (IS_DIRTY(priv) || IS_ERASED(priv)) if (IS_DIRTY(priv) || IS_ERASED(priv))
@ -847,7 +860,8 @@ static FAR uint8_t *sst25_cacheread(struct sst25_dev_s *priv, off_t sector)
/* Read the erase block into the cache */ /* Read the erase block into the cache */
sst25_byteread(priv, priv->sector, (esectno << priv->sectorshift), 1 << priv->sectorshift); sst25_byteread(priv, priv->sector, (esectno << priv->sectorshift),
1 << priv->sectorshift);
/* Mark the sector as cached */ /* Mark the sector as cached */
@ -1001,7 +1015,8 @@ static int sst25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
* Name: sst25_bread * Name: sst25_bread
************************************************************************************/ ************************************************************************************/
static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks,
FAR uint8_t *buffer) FAR uint8_t *buffer)
{ {
#ifdef CONFIG_SST25_SECTOR512 #ifdef CONFIG_SST25_SECTOR512
@ -1011,7 +1026,8 @@ static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
/* On this device, we can handle the block read just like the byte-oriented read */ /* On this device, we can handle the block read just like the byte-oriented read */
nbytes = sst25_read(dev, startblock << SST25_SECTOR_SHIFT, nblocks << SST25_SECTOR_SHIFT, buffer); nbytes = sst25_read(dev, startblock << SST25_SECTOR_SHIFT,
nblocks << SST25_SECTOR_SHIFT, buffer);
if (nbytes > 0) if (nbytes > 0)
{ {
return nbytes >> SST25_SECTOR_SHIFT; return nbytes >> SST25_SECTOR_SHIFT;
@ -1026,7 +1042,8 @@ static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
/* On this device, we can handle the block read just like the byte-oriented read */ /* On this device, we can handle the block read just like the byte-oriented read */
nbytes = sst25_read(dev, startblock << priv->sectorshift, nblocks << priv->sectorshift, buffer); nbytes = sst25_read(dev, startblock << priv->sectorshift,
nblocks << priv->sectorshift, buffer);
if (nbytes > 0) if (nbytes > 0)
{ {
return nbytes >> priv->sectorshift; return nbytes >> priv->sectorshift;
@ -1040,7 +1057,8 @@ static ssize_t sst25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
* Name: sst25_bwrite * Name: sst25_bwrite
************************************************************************************/ ************************************************************************************/
static ssize_t sst25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, static ssize_t sst25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks,
FAR const uint8_t *buffer) FAR const uint8_t *buffer)
{ {
#ifdef CONFIG_SST25_READONLY #ifdef CONFIG_SST25_READONLY
@ -1105,7 +1123,8 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
{ {
case MTDIOC_GEOMETRY: case MTDIOC_GEOMETRY:
{ {
FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg); FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)
((uintptr_t)arg);
if (geo) if (geo)
{ {
/* Populate the geometry structure with information need to know /* Populate the geometry structure with information need to know
@ -1226,7 +1245,9 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev)
priv->sector = (FAR uint8_t *)kmm_malloc(1 << priv->sectorshift); priv->sector = (FAR uint8_t *)kmm_malloc(1 << priv->sectorshift);
if (!priv->sector) if (!priv->sector)
{ {
/* Allocation failed! Discard all of that work we just did and return NULL */ /* Allocation failed! Discard all of that work we just did and
* return NULL
*/
ferr("ERROR: Allocation failed\n"); ferr("ERROR: Allocation failed\n");
kmm_free(priv); kmm_free(priv);