imxrt: 1170 MPU config ensure no lockups can occur
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@ -51,6 +51,7 @@
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MPU_RASR_XN; /* Execute-never to prevent instruction fetch */
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putreg32(regval, MPU_RASR);
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#ifdef CONFIG_IMXRT_SEMC
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mpu_configure_region(IMXRT_SEMC0_BASE, 512 * 1024 * 1024,
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/* Instruction access Enabled */
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@ -62,6 +63,7 @@
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/* Not Shareable */
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/* No Subregion disable */
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);
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#endif
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mpu_configure_region(IMXRT_FLEXSPI2_CIPHER_BASE, 512 * 1024 * 1024,
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@ -91,7 +93,7 @@
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/* Instruction access Enabled */
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MPU_RASR_AP_RWRW | /* P:RW U:RW */
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MPU_RASR_AP_RORO | /* P:R0 U:R0 */
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MPU_RASR_TEX_NOR /* Normal */
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/* Not Cacheable */
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/* Not Bufferable */
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