stm32/stm32_qencoder: Fix nxstyle errors
arch/arm/src/stm32/stm32_qencoder.c,
arch/arm/src/stm32/stm32_qencoder.h:
* Fix nxstyle errors.
This commit is contained in:
Nathan Hartman
Matias N
parent
4cbfbd0c74
commit
01fd55a0ac
@ -1,4 +1,4 @@
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/************************************************************************************
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/****************************************************************************
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* arch/arm/src/stm32/stm32_qencoder.c
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*
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* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
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@ -32,11 +32,11 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Included Files
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************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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@ -62,11 +62,11 @@
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#ifdef CONFIG_SENSORS_QENCODER
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/************************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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****************************************************************************/
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/* Timers ***************************************************************************/
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/* Timers *******************************************************************/
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#undef HAVE_32BIT_TIMERS
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#undef HAVE_16BIT_TIMERS
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@ -77,7 +77,7 @@
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# define HAVE_16BIT_TIMERS 1
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/* The width in bits of each timer */
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/* The width in bits of each timer */
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# define TIM1_BITWIDTH 16
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# define TIM2_BITWIDTH 16
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@ -90,13 +90,13 @@
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#elif defined(CONFIG_STM32_STM32F30XX)
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/* If TIM5 is enabled, then we have 32-bit timers */
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/* If TIM5 is enabled, then we have 32-bit timers */
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# if defined(CONFIG_STM32_TIM5_QE)
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# define HAVE_32BIT_TIMERS 1
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# endif
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/* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */
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/* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM2_QE) || \
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defined(CONFIG_STM32_TIM3_QE) || defined(CONFIG_STM32_TIM4_QE) || \
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@ -104,7 +104,7 @@
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# define HAVE_16BIT_TIMERS 1
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# endif
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/* The width in bits of each timer */
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/* The width in bits of each timer */
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# define TIM1_BITWIDTH 16
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# define TIM2_BITWIDTH 16
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@ -117,20 +117,20 @@
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#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
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/* If TIM2 or TIM5 are enabled, then we have 32-bit timers */
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/* If TIM2 or TIM5 are enabled, then we have 32-bit timers */
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# if defined(CONFIG_STM32_TIM2_QE) || defined(CONFIG_STM32_TIM5_QE)
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# define HAVE_32BIT_TIMERS 1
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# endif
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/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
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/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \
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defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE)
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# define HAVE_16BIT_TIMERS 1
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# endif
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/* The width in bits of each timer */
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/* The width in bits of each timer */
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# define TIM1_BITWIDTH 16
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# define TIM2_BITWIDTH 32
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@ -147,7 +147,7 @@
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# define HAVE_MIXEDWIDTH_TIMERS 1
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#endif
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/* Input filter *********************************************************************/
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/* Input filter *************************************************************/
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#ifdef CONFIG_STM32_QENCODER_FILTER
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# if defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS)
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@ -218,8 +218,11 @@
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# error "Unrecognized STM32 chip"
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#endif
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/* Debug ****************************************************************************/
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/* Non-standard debug that may be enabled just for testing the quadrature encoder */
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing the quadrature
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* encoder
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*/
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#ifndef CONFIG_DEBUG_FEATURES
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# undef CONFIG_DEBUG_SENSORS
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@ -235,9 +238,9 @@
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# define qe_dumpgpio(p,m)
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#endif
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/************************************************************************************
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/****************************************************************************
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* Private Types
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************************************************************************************/
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****************************************************************************/
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/* Constant configuration structure that is retained in FLASH */
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@ -273,7 +276,7 @@ struct stm32_lowerhalf_s
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/* STM32 driver-specific fields: */
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FAR const struct stm32_qeconfig_s *config; /* static onfiguration */
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FAR const struct stm32_qeconfig_s *config; /* static configuration */
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bool inuse; /* True: The lower-half driver is in-use */
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@ -282,18 +285,24 @@ struct stm32_lowerhalf_s
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#endif
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};
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/************************************************************************************
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/****************************************************************************
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* Private Function Prototypes
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************************************************************************************/
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****************************************************************************/
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/* Helper functions */
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static uint16_t stm32_getreg16(FAR struct stm32_lowerhalf_s *priv, int offset);
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value);
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static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset);
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static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value);
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static uint16_t stm32_getreg16(FAR struct stm32_lowerhalf_s *priv,
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int offset);
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset,
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uint16_t value);
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static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv,
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int offset);
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static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset,
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uint32_t value);
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#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg);
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv,
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FAR const char *msg);
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#else
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# define stm32_dumpregs(priv,msg)
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#endif
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@ -310,13 +319,16 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg);
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static int stm32_setup(FAR struct qe_lowerhalf_s *lower);
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static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower);
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos);
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static int stm32_position(FAR struct qe_lowerhalf_s *lower,
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FAR int32_t *pos);
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static int stm32_reset(FAR struct qe_lowerhalf_s *lower);
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static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg);
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static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
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unsigned long arg);
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/************************************************************************************
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/****************************************************************************
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* Private Data
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************************************************************************************/
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****************************************************************************/
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/* The lower half callback structure */
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static const struct qe_ops_s g_qecallbacks =
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@ -480,11 +492,11 @@ static struct stm32_lowerhalf_s g_tim8lower =
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#endif
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/************************************************************************************
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/****************************************************************************
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* Private Functions
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_getreg16
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*
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* Description:
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@ -497,14 +509,14 @@ static struct stm32_lowerhalf_s g_tim8lower =
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* Returned Value:
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* The current contents of the specified register
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*
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************************************************************************************/
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****************************************************************************/
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static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset)
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{
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return getreg16(priv->config->base + offset);
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_putreg16
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*
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* Description:
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@ -517,20 +529,21 @@ static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset)
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* Returned Value:
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* None
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*
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************************************************************************************/
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****************************************************************************/
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value)
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static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset,
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uint16_t value)
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{
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putreg16(value, priv->config->base + offset);
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_getreg32
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*
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* Description:
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* Read the value of a 32-bit timer register. This applies only for the STM32 F4
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* 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK
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* with the 16-bit TIM1,8 and F1 registers as well).
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* Read the value of a 32-bit timer register. This applies only for the
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* STM32 F4 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5
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* (but works OK with the 16-bit TIM1,8 and F1 registers as well).
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*
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* Input Parameters:
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* priv - A reference to the lower half status
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@ -539,20 +552,21 @@ static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint1
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* Returned Value:
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* The current contents of the specified register
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*
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************************************************************************************/
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****************************************************************************/
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static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset)
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static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv,
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int offset)
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{
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return getreg32(priv->config->base + offset);
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_putreg32
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*
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* Description:
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* Write a value to a 32-bit timer register. This applies only for the STM32 F4
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* 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK
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* with the 16-bit TIM1,8 and F1 registers).
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* Write a value to a 32-bit timer register. This applies only for the
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* STM32 F4 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5
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* (but works OK with the 16-bit TIM1,8 and F1 registers).
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*
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* Input Parameters:
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* priv - A reference to the lower half status
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@ -561,9 +575,10 @@ static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset)
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* Returned Value:
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* None
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*
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************************************************************************************/
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****************************************************************************/
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static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value)
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static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset,
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uint32_t value)
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{
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putreg32(value, priv->config->base + offset);
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}
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@ -583,7 +598,8 @@ static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint3
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****************************************************************************/
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#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg)
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static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv,
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FAR const char *msg)
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{
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sninfo("%s:\n", msg);
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sninfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
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@ -625,13 +641,13 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
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}
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#endif
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_tim2lower
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*
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* Description:
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* Map a timer number to a device structure
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*
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************************************************************************************/
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****************************************************************************/
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static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
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{
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@ -666,14 +682,14 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
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}
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_interrupt
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*
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* Description:
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* Common timer interrupt handling. NOTE: Only 16-bit timers require timer
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* interrupts.
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*
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************************************************************************************/
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****************************************************************************/
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#ifdef HAVE_16BIT_TIMERS
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static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
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@ -701,7 +717,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
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{
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priv->position -= (int32_t)0x00010000;
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}
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else
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else
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{
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priv->position += (int32_t)0x00010000;
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}
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@ -710,7 +726,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
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}
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#endif
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_setup
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*
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* Description:
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@ -718,7 +734,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
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* should configure and initialize the device so that it is ready for use.
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* The initial position value should be zero. *
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*
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************************************************************************************/
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****************************************************************************/
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static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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{
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@ -741,8 +757,8 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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cr1 = stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET);
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/* Clear the direction bit (0=count up) and select the Counter Mode (0=Edge aligned)
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* (Timers 2-5 and 1-8 only)
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/* Clear the direction bit (0=count up) and select the Counter Mode
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* (0=Edge aligned) (Timers 2-5 and 1-8 only)
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*/
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cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK);
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@ -805,6 +821,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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stm32_putreg32(priv, STM32_GTIM_SMCR_OFFSET, smcr);
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/* TI1 Channel Configuration */
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/* Disable the Channel 1: Reset the CC1E Bit */
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ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
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@ -840,6 +857,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
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/* TI2 Channel Configuration */
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/* Disable the Channel 2: Reset the CC2E Bit */
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ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
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@ -944,15 +962,15 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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return OK;
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_shutdown
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*
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* Description:
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* This method is called when the driver is closed. The lower half driver
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* should stop data collection, free any resources, disable timer hardware, and
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* put the system into the lowest possible power usage state *
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* should stop data collection, free any resources, disable timer hardware,
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* and put the system into the lowest possible power usage state
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*
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************************************************************************************/
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****************************************************************************/
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static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
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{
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@ -1060,13 +1078,13 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
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return OK;
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_position
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*
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* Description:
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* Return the current position measurement.
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*
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************************************************************************************/
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****************************************************************************/
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static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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{
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@ -1082,8 +1100,8 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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do
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{
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/* Don't let another task preempt us until we get the measurement. The timer
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* interrupt may still be processed
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/* Don't let another task preempt us until we get the measurement.
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* The timer interrupt may still be processed
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*/
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sched_lock();
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@ -1105,13 +1123,13 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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return OK;
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}
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/************************************************************************************
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/****************************************************************************
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* Name: stm32_reset
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*
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* Description:
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* Reset the position measurement to zero.
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*
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************************************************************************************/
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****************************************************************************/
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static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
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{
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@ -1122,8 +1140,8 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
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sninfo("Resetting position to zero\n");
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DEBUGASSERT(lower && priv->inuse);
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/* Reset the timer and the counter. Interrupts are disabled to make this atomic
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* (if possible)
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/* Reset the timer and the counter. Interrupts are disabled to make this
|
||||
* atomic (if possible)
|
||||
*/
|
||||
|
||||
flags = enter_critical_section();
|
||||
@ -1141,15 +1159,16 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_ioctl
|
||||
*
|
||||
* Description:
|
||||
* Lower-half logic may support platform-specific ioctl commands
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg)
|
||||
static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
/* No ioctl commands supported */
|
||||
|
||||
@ -1158,32 +1177,35 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long
|
||||
return -ENOTTY;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_qeinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize a quadrature encoder interface. This function must be called from
|
||||
* board-specific logic.
|
||||
* Initialize a quadrature encoder interface. This function must be
|
||||
* called from board-specific logic.
|
||||
*
|
||||
* Input Parameters:
|
||||
* devpath - The full path to the driver to register. E.g., "/dev/qe0"
|
||||
* tim - The timer number to used. 'tim' must be an element of {1,2,3,4,5,8}
|
||||
* tim - The timer number to used. 'tim' must be an element of
|
||||
* {1,2,3,4,5,8}
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; A negated errno value is returned on failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_qeinitialize(FAR const char *devpath, int tim)
|
||||
{
|
||||
FAR struct stm32_lowerhalf_s *priv;
|
||||
int ret;
|
||||
|
||||
/* Find the pre-allocated timer state structure corresponding to this timer */
|
||||
/* Find the pre-allocated timer state structure corresponding to this
|
||||
* timer
|
||||
*/
|
||||
|
||||
priv = stm32_tim2lower(tim);
|
||||
if (!priv)
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32/stm32_qencoder.h
|
||||
*
|
||||
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
|
||||
@ -31,14 +31,14 @@
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_STM32_STM32_QENCODER_H
|
||||
#define __ARCH_ARM_SRC_STM32_STM32_QENCODER_H
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
@ -46,13 +46,14 @@
|
||||
|
||||
#ifdef CONFIG_SENSORS_QENCODER
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
/* Timer devices may be used for different purposes. One special purpose is as
|
||||
* a quadrature encoder input device. If CONFIG_STM32_TIMn is defined then the
|
||||
* CONFIG_STM32_TIMn_QE must also be defined to indicate that timer "n" is intended
|
||||
* to be used for as a quadrature encoder.
|
||||
****************************************************************************/
|
||||
|
||||
/* Timer devices may be used for different purposes. One special purpose is
|
||||
* as a quadrature encoder input device. If CONFIG_STM32_TIMn is defined
|
||||
* then the CONFIG_STM32_TIMn_QE must also be defined to indicate that timer
|
||||
* "n" is intended to be used for as a quadrature encoder.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_STM32_TIM1
|
||||
@ -74,8 +75,8 @@
|
||||
# undef CONFIG_STM32_TIM8_QE
|
||||
#endif
|
||||
|
||||
/* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder (at least for the
|
||||
* STM32 F4)
|
||||
/* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder (at least
|
||||
* for the STM32 F4)
|
||||
*/
|
||||
|
||||
#undef CONFIG_STM32_TIM6_QE
|
||||
@ -115,25 +116,26 @@
|
||||
# define CONFIG_STM32_TIM8_QECLKOUT 28000000
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Name: stm32_qeinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize a quadrature encoder interface. This function must be called from
|
||||
* board-specific logic..
|
||||
* Initialize a quadrature encoder interface. This function must be called
|
||||
* from board-specific logic..
|
||||
*
|
||||
* Input Parameters:
|
||||
* devpath - The full path to the driver to register. E.g., "/dev/qe0"
|
||||
* tim - The timer number to used. 'tim' must be an element of {1,2,3,4,5,8}
|
||||
* tim - The timer number to used. 'tim' must be an element of
|
||||
* {1,2,3,4,5,8}
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; A negated errno value is returned on failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_qeinitialize(FAR const char *devpath, int tim);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user