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stm32/stm32_qencoder: Fix nxstyle errors

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arch/arm/src/stm32/stm32_qencoder.c,
arch/arm/src/stm32/stm32_qencoder.h:

    * Fix nxstyle errors.
This commit is contained in:
Nathan Hartman 2020-10-29 19:02:21 -04:00 committed by Matias N
parent 4cbfbd0c74
commit 01fd55a0ac
2 changed files with 126 additions and 102 deletions
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188
arch/arm/src/stm32/stm32_qencoder.c
View File

@ -1,4 +1,4 @@
/************************************************************************************ /****************************************************************************
* arch/arm/src/stm32/stm32_qencoder.c * arch/arm/src/stm32/stm32_qencoder.c
* *
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. * Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
@ -32,11 +32,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
@ -62,11 +62,11 @@
#ifdef CONFIG_SENSORS_QENCODER #ifdef CONFIG_SENSORS_QENCODER
/************************************************************************************ /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ****************************************************************************/
/* Timers ***************************************************************************/ /* Timers *******************************************************************/
#undef HAVE_32BIT_TIMERS #undef HAVE_32BIT_TIMERS
#undef HAVE_16BIT_TIMERS #undef HAVE_16BIT_TIMERS
@ -77,7 +77,7 @@
# define HAVE_16BIT_TIMERS 1 # define HAVE_16BIT_TIMERS 1
/* The width in bits of each timer */ /* The width in bits of each timer */
# define TIM1_BITWIDTH 16 # define TIM1_BITWIDTH 16
# define TIM2_BITWIDTH 16 # define TIM2_BITWIDTH 16
@ -90,13 +90,13 @@
#elif defined(CONFIG_STM32_STM32F30XX) #elif defined(CONFIG_STM32_STM32F30XX)
/* If TIM5 is enabled, then we have 32-bit timers */ /* If TIM5 is enabled, then we have 32-bit timers */
# if defined(CONFIG_STM32_TIM5_QE) # if defined(CONFIG_STM32_TIM5_QE)
# define HAVE_32BIT_TIMERS 1 # define HAVE_32BIT_TIMERS 1
# endif # endif
/* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */ /* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */
# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM2_QE) || \ # if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM2_QE) || \
defined(CONFIG_STM32_TIM3_QE) || defined(CONFIG_STM32_TIM4_QE) || \ defined(CONFIG_STM32_TIM3_QE) || defined(CONFIG_STM32_TIM4_QE) || \
@ -104,7 +104,7 @@
# define HAVE_16BIT_TIMERS 1 # define HAVE_16BIT_TIMERS 1
# endif # endif
/* The width in bits of each timer */ /* The width in bits of each timer */
# define TIM1_BITWIDTH 16 # define TIM1_BITWIDTH 16
# define TIM2_BITWIDTH 16 # define TIM2_BITWIDTH 16
@ -117,20 +117,20 @@
#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
/* If TIM2 or TIM5 are enabled, then we have 32-bit timers */ /* If TIM2 or TIM5 are enabled, then we have 32-bit timers */
# if defined(CONFIG_STM32_TIM2_QE) || defined(CONFIG_STM32_TIM5_QE) # if defined(CONFIG_STM32_TIM2_QE) || defined(CONFIG_STM32_TIM5_QE)
# define HAVE_32BIT_TIMERS 1 # define HAVE_32BIT_TIMERS 1
# endif # endif
/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */ /* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \ # if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \
defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE) defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE)
# define HAVE_16BIT_TIMERS 1 # define HAVE_16BIT_TIMERS 1
# endif # endif
/* The width in bits of each timer */ /* The width in bits of each timer */
# define TIM1_BITWIDTH 16 # define TIM1_BITWIDTH 16
# define TIM2_BITWIDTH 32 # define TIM2_BITWIDTH 32
@ -147,7 +147,7 @@
# define HAVE_MIXEDWIDTH_TIMERS 1 # define HAVE_MIXEDWIDTH_TIMERS 1
#endif #endif
/* Input filter *********************************************************************/ /* Input filter *************************************************************/
#ifdef CONFIG_STM32_QENCODER_FILTER #ifdef CONFIG_STM32_QENCODER_FILTER
# if defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS) # if defined(CONFIG_STM32_QENCODER_SAMPLE_FDTS)
@ -218,8 +218,11 @@
# error "Unrecognized STM32 chip" # error "Unrecognized STM32 chip"
#endif #endif
/* Debug ****************************************************************************/ /* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the quadrature encoder */
/* Non-standard debug that may be enabled just for testing the quadrature
* encoder
*/
#ifndef CONFIG_DEBUG_FEATURES #ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_SENSORS # undef CONFIG_DEBUG_SENSORS
@ -235,9 +238,9 @@
# define qe_dumpgpio(p,m) # define qe_dumpgpio(p,m)
#endif #endif
/************************************************************************************ /****************************************************************************
* Private Types * Private Types
************************************************************************************/ ****************************************************************************/
/* Constant configuration structure that is retained in FLASH */ /* Constant configuration structure that is retained in FLASH */
@ -273,7 +276,7 @@ struct stm32_lowerhalf_s
/* STM32 driver-specific fields: */ /* STM32 driver-specific fields: */
FAR const struct stm32_qeconfig_s *config; /* static onfiguration */ FAR const struct stm32_qeconfig_s *config; /* static configuration */
bool inuse; /* True: The lower-half driver is in-use */ bool inuse; /* True: The lower-half driver is in-use */
@ -282,18 +285,24 @@ struct stm32_lowerhalf_s
#endif #endif
}; };
/************************************************************************************ /****************************************************************************
* Private Function Prototypes * Private Function Prototypes
************************************************************************************/ ****************************************************************************/
/* Helper functions */ /* Helper functions */
static uint16_t stm32_getreg16(FAR struct stm32_lowerhalf_s *priv, int offset); static uint16_t stm32_getreg16(FAR struct stm32_lowerhalf_s *priv,
static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value); int offset);
static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset); static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset,
static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value); uint16_t value);
static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv,
int offset);
static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset,
uint32_t value);
#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO) #if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg); static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv,
FAR const char *msg);
#else #else
# define stm32_dumpregs(priv,msg) # define stm32_dumpregs(priv,msg)
#endif #endif
@ -310,13 +319,16 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg);
static int stm32_setup(FAR struct qe_lowerhalf_s *lower); static int stm32_setup(FAR struct qe_lowerhalf_s *lower);
static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower); static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower);
static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos); static int stm32_position(FAR struct qe_lowerhalf_s *lower,
FAR int32_t *pos);
static int stm32_reset(FAR struct qe_lowerhalf_s *lower); static int stm32_reset(FAR struct qe_lowerhalf_s *lower);
static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg); static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
unsigned long arg);
/************************************************************************************ /****************************************************************************
* Private Data * Private Data
************************************************************************************/ ****************************************************************************/
/* The lower half callback structure */ /* The lower half callback structure */
static const struct qe_ops_s g_qecallbacks = static const struct qe_ops_s g_qecallbacks =
@ -480,11 +492,11 @@ static struct stm32_lowerhalf_s g_tim8lower =
#endif #endif
/************************************************************************************ /****************************************************************************
* Private Functions * Private Functions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: stm32_getreg16 * Name: stm32_getreg16
* *
* Description: * Description:
@ -497,14 +509,14 @@ static struct stm32_lowerhalf_s g_tim8lower =
* Returned Value: * Returned Value:
* The current contents of the specified register * The current contents of the specified register
* *
************************************************************************************/ ****************************************************************************/
static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset) static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset)
{ {
return getreg16(priv->config->base + offset); return getreg16(priv->config->base + offset);
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_putreg16 * Name: stm32_putreg16
* *
* Description: * Description:
@ -517,20 +529,21 @@ static uint16_t stm32_getreg16(struct stm32_lowerhalf_s *priv, int offset)
* Returned Value: * Returned Value:
* None * None
* *
************************************************************************************/ ****************************************************************************/
static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint16_t value) static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset,
uint16_t value)
{ {
putreg16(value, priv->config->base + offset); putreg16(value, priv->config->base + offset);
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_getreg32 * Name: stm32_getreg32
* *
* Description: * Description:
* Read the value of a 32-bit timer register. This applies only for the STM32 F4 * Read the value of a 32-bit timer register. This applies only for the
* 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK * STM32 F4 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5
* with the 16-bit TIM1,8 and F1 registers as well). * (but works OK with the 16-bit TIM1,8 and F1 registers as well).
* *
* Input Parameters: * Input Parameters:
* priv - A reference to the lower half status * priv - A reference to the lower half status
@ -539,20 +552,21 @@ static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint1
* Returned Value: * Returned Value:
* The current contents of the specified register * The current contents of the specified register
* *
************************************************************************************/ ****************************************************************************/
static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset) static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv,
int offset)
{ {
return getreg32(priv->config->base + offset); return getreg32(priv->config->base + offset);
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_putreg32 * Name: stm32_putreg32
* *
* Description: * Description:
* Write a value to a 32-bit timer register. This applies only for the STM32 F4 * Write a value to a 32-bit timer register. This applies only for the
* 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5 (but works OK * STM32 F4 32-bit registers (CNT, ARR, CRR1-4) in the 32-bit timers TIM2-5
* with the 16-bit TIM1,8 and F1 registers). * (but works OK with the 16-bit TIM1,8 and F1 registers).
* *
* Input Parameters: * Input Parameters:
* priv - A reference to the lower half status * priv - A reference to the lower half status
@ -561,9 +575,10 @@ static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset)
* Returned Value: * Returned Value:
* None * None
* *
************************************************************************************/ ****************************************************************************/
static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value) static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset,
uint32_t value)
{ {
putreg32(value, priv->config->base + offset); putreg32(value, priv->config->base + offset);
} }
@ -583,7 +598,8 @@ static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint3
****************************************************************************/ ****************************************************************************/
#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO) #if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg) static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv,
FAR const char *msg)
{ {
sninfo("%s:\n", msg); sninfo("%s:\n", msg);
sninfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n", sninfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
@ -625,13 +641,13 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
} }
#endif #endif
/************************************************************************************ /****************************************************************************
* Name: stm32_tim2lower * Name: stm32_tim2lower
* *
* Description: * Description:
* Map a timer number to a device structure * Map a timer number to a device structure
* *
************************************************************************************/ ****************************************************************************/
static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim) static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
{ {
@ -666,14 +682,14 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim)
} }
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_interrupt * Name: stm32_interrupt
* *
* Description: * Description:
* Common timer interrupt handling. NOTE: Only 16-bit timers require timer * Common timer interrupt handling. NOTE: Only 16-bit timers require timer
* interrupts. * interrupts.
* *
************************************************************************************/ ****************************************************************************/
#ifdef HAVE_16BIT_TIMERS #ifdef HAVE_16BIT_TIMERS
static int stm32_interrupt(int irq, FAR void *context, FAR void *arg) static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
@ -701,7 +717,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
{ {
priv->position -= (int32_t)0x00010000; priv->position -= (int32_t)0x00010000;
} }
else else
{ {
priv->position += (int32_t)0x00010000; priv->position += (int32_t)0x00010000;
} }
@ -710,7 +726,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
} }
#endif #endif
/************************************************************************************ /****************************************************************************
* Name: stm32_setup * Name: stm32_setup
* *
* Description: * Description:
@ -718,7 +734,7 @@ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg)
* should configure and initialize the device so that it is ready for use. * should configure and initialize the device so that it is ready for use.
* The initial position value should be zero. * * The initial position value should be zero. *
* *
************************************************************************************/ ****************************************************************************/
static int stm32_setup(FAR struct qe_lowerhalf_s *lower) static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
{ {
@ -741,8 +757,8 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
cr1 = stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET); cr1 = stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET);
/* Clear the direction bit (0=count up) and select the Counter Mode (0=Edge aligned) /* Clear the direction bit (0=count up) and select the Counter Mode
* (Timers 2-5 and 1-8 only) * (0=Edge aligned) (Timers 2-5 and 1-8 only)
*/ */
cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK); cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK);
@ -805,6 +821,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
stm32_putreg32(priv, STM32_GTIM_SMCR_OFFSET, smcr); stm32_putreg32(priv, STM32_GTIM_SMCR_OFFSET, smcr);
/* TI1 Channel Configuration */ /* TI1 Channel Configuration */
/* Disable the Channel 1: Reset the CC1E Bit */ /* Disable the Channel 1: Reset the CC1E Bit */
ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET); ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
@ -840,6 +857,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1); stm32_putreg32(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1);
/* TI2 Channel Configuration */ /* TI2 Channel Configuration */
/* Disable the Channel 2: Reset the CC2E Bit */ /* Disable the Channel 2: Reset the CC2E Bit */
ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET); ccer = stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET);
@ -944,15 +962,15 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_shutdown * Name: stm32_shutdown
* *
* Description: * Description:
* This method is called when the driver is closed. The lower half driver * This method is called when the driver is closed. The lower half driver
* should stop data collection, free any resources, disable timer hardware, and * should stop data collection, free any resources, disable timer hardware,
* put the system into the lowest possible power usage state * * and put the system into the lowest possible power usage state
* *
************************************************************************************/ ****************************************************************************/
static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
{ {
@ -1060,13 +1078,13 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_position * Name: stm32_position
* *
* Description: * Description:
* Return the current position measurement. * Return the current position measurement.
* *
************************************************************************************/ ****************************************************************************/
static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
{ {
@ -1082,8 +1100,8 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
do do
{ {
/* Don't let another task preempt us until we get the measurement. The timer /* Don't let another task preempt us until we get the measurement.
* interrupt may still be processed * The timer interrupt may still be processed
*/ */
sched_lock(); sched_lock();
@ -1105,13 +1123,13 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_reset * Name: stm32_reset
* *
* Description: * Description:
* Reset the position measurement to zero. * Reset the position measurement to zero.
* *
************************************************************************************/ ****************************************************************************/
static int stm32_reset(FAR struct qe_lowerhalf_s *lower) static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
{ {
@ -1122,8 +1140,8 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
sninfo("Resetting position to zero\n"); sninfo("Resetting position to zero\n");
DEBUGASSERT(lower && priv->inuse); DEBUGASSERT(lower && priv->inuse);
/* Reset the timer and the counter. Interrupts are disabled to make this atomic /* Reset the timer and the counter. Interrupts are disabled to make this
* (if possible) * atomic (if possible)
*/ */
flags = enter_critical_section(); flags = enter_critical_section();
@ -1141,15 +1159,16 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: stm32_ioctl * Name: stm32_ioctl
* *
* Description: * Description:
* Lower-half logic may support platform-specific ioctl commands * Lower-half logic may support platform-specific ioctl commands
* *
************************************************************************************/ ****************************************************************************/
static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg) static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
unsigned long arg)
{ {
/* No ioctl commands supported */ /* No ioctl commands supported */
@ -1158,32 +1177,35 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long
return -ENOTTY; return -ENOTTY;
} }
/************************************************************************************ /****************************************************************************
* Public Functions * Public Functions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: stm32_qeinitialize * Name: stm32_qeinitialize
* *
* Description: * Description:
* Initialize a quadrature encoder interface. This function must be called from * Initialize a quadrature encoder interface. This function must be
* board-specific logic. * called from board-specific logic.
* *
* Input Parameters: * Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/qe0" * devpath - The full path to the driver to register. E.g., "/dev/qe0"
* tim - The timer number to used. 'tim' must be an element of {1,2,3,4,5,8} * tim - The timer number to used. 'tim' must be an element of
* {1,2,3,4,5,8}
* *
* Returned Value: * Returned Value:
* Zero on success; A negated errno value is returned on failure. * Zero on success; A negated errno value is returned on failure.
* *
************************************************************************************/ ****************************************************************************/
int stm32_qeinitialize(FAR const char *devpath, int tim) int stm32_qeinitialize(FAR const char *devpath, int tim)
{ {
FAR struct stm32_lowerhalf_s *priv; FAR struct stm32_lowerhalf_s *priv;
int ret; int ret;
/* Find the pre-allocated timer state structure corresponding to this timer */ /* Find the pre-allocated timer state structure corresponding to this
* timer
*/
priv = stm32_tim2lower(tim); priv = stm32_tim2lower(tim);
if (!priv) if (!priv)

40
arch/arm/src/stm32/stm32_qencoder.h
View File

@ -1,4 +1,4 @@
/************************************************************************************ /****************************************************************************
* arch/arm/src/stm32/stm32_qencoder.h * arch/arm/src/stm32/stm32_qencoder.h
* *
* Copyright (C) 2012 Gregory Nutt. All rights reserved. * Copyright (C) 2012 Gregory Nutt. All rights reserved.
@ -31,14 +31,14 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_STM32_QENCODER_H #ifndef __ARCH_ARM_SRC_STM32_STM32_QENCODER_H
#define __ARCH_ARM_SRC_STM32_STM32_QENCODER_H #define __ARCH_ARM_SRC_STM32_STM32_QENCODER_H
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
@ -46,13 +46,14 @@
#ifdef CONFIG_SENSORS_QENCODER #ifdef CONFIG_SENSORS_QENCODER
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
/* Timer devices may be used for different purposes. One special purpose is as
* a quadrature encoder input device. If CONFIG_STM32_TIMn is defined then the /* Timer devices may be used for different purposes. One special purpose is
* CONFIG_STM32_TIMn_QE must also be defined to indicate that timer "n" is intended * as a quadrature encoder input device. If CONFIG_STM32_TIMn is defined
* to be used for as a quadrature encoder. * then the CONFIG_STM32_TIMn_QE must also be defined to indicate that timer
* "n" is intended to be used for as a quadrature encoder.
*/ */
#ifndef CONFIG_STM32_TIM1 #ifndef CONFIG_STM32_TIM1
@ -74,8 +75,8 @@
# undef CONFIG_STM32_TIM8_QE # undef CONFIG_STM32_TIM8_QE
#endif #endif
/* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder (at least for the /* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder (at least
* STM32 F4) * for the STM32 F4)
*/ */
#undef CONFIG_STM32_TIM6_QE #undef CONFIG_STM32_TIM6_QE
@ -115,25 +116,26 @@
# define CONFIG_STM32_TIM8_QECLKOUT 28000000 # define CONFIG_STM32_TIM8_QECLKOUT 28000000
#endif #endif
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: stm32_qeinitialize * Name: stm32_qeinitialize
* *
* Description: * Description:
* Initialize a quadrature encoder interface. This function must be called from * Initialize a quadrature encoder interface. This function must be called
* board-specific logic.. * from board-specific logic..
* *
* Input Parameters: * Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/qe0" * devpath - The full path to the driver to register. E.g., "/dev/qe0"
* tim - The timer number to used. 'tim' must be an element of {1,2,3,4,5,8} * tim - The timer number to used. 'tim' must be an element of
* {1,2,3,4,5,8}
* *
* Returned Value: * Returned Value:
* Zero on success; A negated errno value is returned on failure. * Zero on success; A negated errno value is returned on failure.
* *
************************************************************************************/ ****************************************************************************/
int stm32_qeinitialize(FAR const char *devpath, int tim); int stm32_qeinitialize(FAR const char *devpath, int tim);