More PIC32 debug updates
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4083 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
parent
ceaff95d18
commit
02459d0d1f
@ -182,6 +182,10 @@ extern void up_dumpstate(void);
|
||||
|
||||
extern uint32_t *up_doirq(int irq, uint32_t *regs);
|
||||
|
||||
/* Software interrupt 0 handler */
|
||||
|
||||
extern int up_swint0(int irq, FAR void *context);
|
||||
|
||||
/* Signals */
|
||||
|
||||
extern void up_sigdeliver(void);
|
||||
|
@ -326,7 +326,7 @@ int up_swint0(int irq, FAR void *context)
|
||||
case SYS_switch_context:
|
||||
{
|
||||
DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
|
||||
memcpy((uint32_t*)regs[REG_A1], regs, XCPTCONTEXT_SIZE);
|
||||
up_copystate((uint32_t*)regs[REG_A1], regs);
|
||||
current_regs = (uint32_t*)regs[REG_A2];
|
||||
}
|
||||
break;
|
||||
|
@ -127,21 +127,9 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs)
|
||||
|
||||
irq = ((regval) & INT_INTSTAT_VEC_MASK) >> INT_INTSTAT_VEC_SHIFT;
|
||||
|
||||
/* Disable further interrupts from this source until the driver has
|
||||
* cleared the pending interrupt sources.
|
||||
*/
|
||||
|
||||
up_disable_irq(irq);
|
||||
|
||||
/* Deliver the IRQ */
|
||||
|
||||
irq_dispatch(irq, regs);
|
||||
|
||||
/* Unmask the last interrupt (global interrupt below the current interrupt
|
||||
* level are are still disabled)
|
||||
*/
|
||||
|
||||
up_enable_irq(irq);
|
||||
}
|
||||
|
||||
/* If a context switch occurred while processing the interrupt then
|
||||
|
@ -435,6 +435,7 @@ _bev_handler:
|
||||
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
|
||||
la t0, pic32mx_dobev /* Call up_dobev(regs) */
|
||||
jalr ra, t0
|
||||
nop
|
||||
di /* Disable interrupts */
|
||||
RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
|
||||
EXCPT_EPILOGUE v0 /* Return to the context returned by up_dobev() */
|
||||
@ -457,6 +458,7 @@ _int_handler:
|
||||
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
|
||||
la t0, pic32mx_decodeirq /* Call pic32mx_decodeirq(regs) */
|
||||
jalr ra, t0
|
||||
nop
|
||||
di /* Disable interrupts */
|
||||
RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
|
||||
EXCPT_EPILOGUE v0 /* Return to the context returned by pic32mx_decodeirq() */
|
||||
@ -480,6 +482,7 @@ _nmi_handler:
|
||||
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
|
||||
la t0, pic32mx_donmi /* Call up_donmi(regs) */
|
||||
jalr ra, t0
|
||||
nop
|
||||
di /* Disable interrupts */
|
||||
RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
|
||||
EXCPT_EPILOGUE v0 /* Return to the context returned by pic32mx_donmi() */
|
||||
|
@ -143,12 +143,17 @@ void up_irqinitialize(void)
|
||||
putreg32(INT_INTCON_MVEC, PIC32MX_INT_INTCONCLR);
|
||||
#endif
|
||||
|
||||
/* Initialize GPIO change notifiction handling */
|
||||
/* Initialize GPIO change notification handling */
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
pic32mx_gpioirqinitialize();
|
||||
#endif
|
||||
|
||||
/* Attach and enable software interrupts */
|
||||
|
||||
irq_attach(PIC32MX_IRQ_CS0, up_swint0);
|
||||
up_enable_irq(PIC32MX_IRQSRC_CS0);
|
||||
|
||||
/* currents_regs is non-NULL only while processing an interrupt */
|
||||
|
||||
current_regs = NULL;
|
||||
@ -194,14 +199,14 @@ void up_disable_irq(int irq)
|
||||
/* Use IEC0 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC0CLR;
|
||||
bitno -= PIC32MX_IRQSRC0_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC0_FIRST;
|
||||
}
|
||||
else if (irq <= PIC32MX_IRQSRC1_LAST)
|
||||
{
|
||||
/* Use IEC1 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC1CLR;
|
||||
bitno -= PIC32MX_IRQSRC1_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC1_FIRST;
|
||||
}
|
||||
#ifdef PIC32MX_IRQSRC2_FIRST
|
||||
else if (irq <= PIC32MX_IRQSRC2_LAST)
|
||||
@ -209,7 +214,7 @@ void up_disable_irq(int irq)
|
||||
/* Use IEC2 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC2CLR;
|
||||
bitno -= PIC32MX_IRQSRC2_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC2_FIRST;
|
||||
}
|
||||
#endif
|
||||
else
|
||||
@ -248,14 +253,14 @@ void up_enable_irq(int irq)
|
||||
/* Use IEC0 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC0SET;
|
||||
bitno -= PIC32MX_IRQSRC0_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC0_FIRST;
|
||||
}
|
||||
else if (irq <= PIC32MX_IRQSRC1_LAST)
|
||||
{
|
||||
/* Use IEC1 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC1SET;
|
||||
bitno -= PIC32MX_IRQSRC1_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC1_FIRST;
|
||||
}
|
||||
#ifdef PIC32MX_IRQSRC2_FIRST
|
||||
else if (irq <= PIC32MX_IRQSRC2_LAST)
|
||||
@ -263,7 +268,7 @@ void up_enable_irq(int irq)
|
||||
/* Use IEC2 */
|
||||
|
||||
regaddr = PIC32MX_INT_IEC2SET;
|
||||
bitno -= PIC32MX_IRQSRC2_FIRST;
|
||||
bitno = irq - PIC32MX_IRQSRC2_FIRST;
|
||||
}
|
||||
#endif
|
||||
else
|
||||
|
Loading…
Reference in New Issue
Block a user