Tiva GPIO clean-up by Calvin Maguranis

This commit is contained in:
Gregory Nutt 2015-02-20 13:40:25 -06:00
parent 1c9144c5a6
commit 0260620fdc
6 changed files with 83 additions and 225 deletions

View File

@ -456,19 +456,8 @@
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
extern "C"
{
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_TIVA_IRQ_H */

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@ -58,57 +58,6 @@
* Private Types
****************************************************************************/
/* NOTE: this is duplicated in tiva_gpio.c */
static const uintptr_t g_gpiobase[TIVA_NPORTS] =
{
#if TIVA_NPORTS > 0
TIVA_GPIOA_BASE
#endif
#if TIVA_NPORTS > 1
, TIVA_GPIOB_BASE
#endif
#if TIVA_NPORTS > 2
, TIVA_GPIOC_BASE
#endif
#if TIVA_NPORTS > 3
, TIVA_GPIOD_BASE
#endif
#if TIVA_NPORTS > 4
, TIVA_GPIOE_BASE
#endif
#if TIVA_NPORTS > 5
, TIVA_GPIOF_BASE
#endif
#if TIVA_NPORTS > 6
, TIVA_GPIOG_BASE
#endif
#if TIVA_NPORTS > 7
, TIVA_GPIOH_BASE
#endif
#if TIVA_NPORTS > 8
, TIVA_GPIOJ_BASE
#endif
#if TIVA_NPORTS > 9
, TIVA_GPIOK_BASE
#endif
#if TIVA_NPORTS > 10
, TIVA_GPIOL_BASE
#endif
#if TIVA_NPORTS > 11
, TIVA_GPIOM_BASE
#endif
#if TIVA_NPORTS > 12
, TIVA_GPION_BASE
#endif
#if TIVA_NPORTS > 13
, TIVA_GPIOP_BASE
#endif
#if TIVA_NPORTS > 14
, TIVA_GPIOQ_BASE
#endif
};
static const char g_portchar[TIVA_NPORTS] =
{
#if TIVA_NPORTS > 0
@ -162,20 +111,6 @@ static const char g_portchar[TIVA_NPORTS] =
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: tiva_gpiobaseaddress
*
* Description:
* Given a GPIO enumeration value, return the base address of the
* associated GPIO registers.
*
****************************************************************************/
static inline uintptr_t tiva_gpiobaseaddress(int port)
{
return port < TIVA_NPORTS ? g_gpiobase[port] : 0;
}
/****************************************************************************
* Name: tiva_gpioport
*

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@ -222,7 +222,7 @@ static const uintptr_t g_gpiobase[TIVA_NPORTS] =
*
****************************************************************************/
static uintptr_t tiva_gpiobaseaddress(unsigned int port)
uintptr_t tiva_gpiobaseaddress(unsigned int port)
{
uintptr_t gpiobase = 0;
if (port < TIVA_NPORTS)
@ -959,6 +959,49 @@ bool tiva_gpioread(uint32_t pinset)
* corresponding input pin when these are configured as inputs. All bits
* are cleared by a reset."
*/
return (getreg32(base + TIVA_GPIO_DATA_OFFSET + (1 << (pinno + 2))) != 0);
}
/****************************************************************************
* Name: tiva_gpio_lockport
*
* Description:
* Certain pins require to be unlocked from the NMI to use for normal GPIO
* use. See table 10-10 in datasheet for pins with special considerations.
*
****************************************************************************/
void tiva_gpio_lockport(uint32_t pinset, bool lock)
{
unsigned int port;
unsigned int pinno;
uintptr_t base;
/* Decode the basics */
port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
pinno = (pinset & GPIO_PIN_MASK);
/* Get the base address associated with the GPIO port */
base = tiva_gpiobaseaddress(port);
/* allow access to the TIVA_GPIO_CR_OFFSET register */
modifyreg32(base + TIVA_GPIO_LOCK_OFFSET, 0, GPIO_LOCK_UNLOCK);
/* lock or unlock the pin */
if (lock)
{
modifyreg32(base + TIVA_GPIO_CR_OFFSET, (1 << pinno), 0);
}
else
{
modifyreg32(base + TIVA_GPIO_CR_OFFSET, 0, (1 << pinno));
}
/* Restrict acess to the TIVA_GPIO_CR_OFFSET register */
modifyreg32(base + TIVA_GPIO_LOCK_OFFSET, GPIO_LOCK_UNLOCK, GPIO_LOCK_LOCKED);
}

View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/tiva_gpio.h
*
* Copyright (C) 2009-2010, 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -223,6 +223,8 @@ extern "C"
* Public Function Prototypes
************************************************************************************/
uintptr_t tiva_gpiobaseaddress(unsigned int port);
/************************************************************************************
* Name: tiva_configgpio
*
@ -263,6 +265,18 @@ bool tiva_gpioread(uint32_t pinset);
int tiva_dumpgpio(uint32_t pinset, const char *msg);
/****************************************************************************
* Name: tiva_gpio_lockport
*
* Description:
* Certain pins require to be unlocked from the NMI to use for normal GPIO
* use. See table 10-10 in datasheet for pins with special considerations.
*
****************************************************************************/
void tiva_gpio_lockport(uint32_t pinset, bool lock);
# ifdef CONFIG_TIVA_GPIO_IRQS
/************************************************************************************
* Name: gpio_irqinitialize
*
@ -271,38 +285,40 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg);
*
************************************************************************************/
int weak_function gpio_irqinitialize(void);
int weak_function tiva_gpioirqinitialize(void);
/****************************************************************************
* Name: gpio_irqattach
* Name: tiva_gpioirqattach
*
* Description:
* Attach the interrupt handler 'isr' to the GPIO IRQ 'irq'
*
****************************************************************************/
int gpio_irqattach(int irq, xcpt_t isr);
#define gpio_irqdetach(isr) gpio_irqattach(isr, NULL)
int tiva_gpioirqattach(int irq, xcpt_t isr);
# define tiva_gpioirqdetach(isr) tiva_gpioirqattach(isr, NULL)
/****************************************************************************
* Name: gpio_irqenable
* Name: tiva_gpioirqenable
*
* Description:
* Enable the GPIO IRQ specified by 'irq'
*
****************************************************************************/
void gpio_irqenable(int irq);
void tiva_gpioirqenable(int irq);
/****************************************************************************
* Name: gpio_irqdisable
* Name: tiva_gpioirqdisable
*
* Description:
* Disable the GPIO IRQ specified by 'irq'
*
****************************************************************************/
void gpio_irqdisable(int irq);
void tiva_gpioirqdisable(int irq);
# endif
#if defined(__cplusplus)
}

View File

@ -63,108 +63,6 @@
static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS];
/* A table that maps a GPIO group to a GPIO base address. Overly complicated
* because we support disabling interrupt support for arbitrary ports. This
* must carefully match the IRQ numbers assigned in arch/arm/include/lm3s/irq.h
*/
#define COMMA
static const uintptr_t g_gpiobase[] =
{
#ifdef CONFIG_TIVA_GPIOA_IRQS
COMMA TIVA_GPIOA_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOB_IRQS
COMMA TIVA_GPIOB_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOC_IRQS
COMMA TIVA_GPIOC_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOD_IRQS
COMMA TIVA_GPIOD_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOE_IRQS
COMMA TIVA_GPIOE_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOF_IRQS
COMMA TIVA_GPIOF_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOG_IRQS
COMMA TIVA_GPIOG_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOH_IRQS
COMMA TIVA_GPIOH_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOJ_IRQS
COMMA TIVA_GPIOJ_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOK_IRQS
COMMA TIVA_GPIOK_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOL_IRQS
COMMA TIVA_GPIOL_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOM_IRQS
COMMA TIVA_GPIOM_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPION_IRQS
COMMA TIVA_GPION_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOP_IRQS
COMMA TIVA_GPIOP_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOQ_IRQS
COMMA TIVA_GPIOQ_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOR_IRQS
COMMA TIVA_GPIOR_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOS_IRQS
COMMA TIVA_GPIOS_BASE
#undef COMMA
#define COMMA ,
#endif
#ifdef CONFIG_TIVA_GPIOT_IRQS
COMMA TIVA_GPIOT_BASE
#undef COMMA
#define COMMA ,
#endif
};
#define GPIO_NADDRS (sizeof(g_gpiobase)/sizeof(uintptr_t))
/****************************************************************************
* Public Data
****************************************************************************/
@ -174,31 +72,7 @@ static const uintptr_t g_gpiobase[] =
****************************************************************************/
/****************************************************************************
* Name: tiva_gpiobaseaddress
*
* Input:
* gpioirq - A pin number in the range of 0 to NR_GPIO_IRQS.
*
* Description:
* Given a GPIO enumeration value, return the base address of the
* associated GPIO registers. NOTE that range checking was provided by
* callee
*
****************************************************************************/
static uintptr_t tiva_gpiobaseaddress(unsigned int gpioirq)
{
unsigned int ndx = gpioirq >> 3;
if (ndx < GPIO_NADDRS)
{
return g_gpiobase[ndx];
}
return 0;
}
/****************************************************************************
* Name: tiva_gpio*handler
* Name: tiva_gpiohandler
*
* Description:
* Handle interrupts on each enabled GPIO port
@ -371,14 +245,14 @@ static int tiva_gpiothandler(int irq, FAR void *context)
****************************************************************************/
/****************************************************************************
* Name: gpio_irqinitialize
* Name: tiva_gpioirqinitialize
*
* Description:
* Initialize all vectors to the unexpected interrupt handler
*
****************************************************************************/
int gpio_irqinitialize(void)
int tiva_gpioirqinitialize(void)
{
int i;
@ -470,14 +344,14 @@ int gpio_irqinitialize(void)
}
/****************************************************************************
* Name: gpio_irqattach
* Name: tiva_gpioirqattach
*
* Description:
* Attach in GPIO interrupt to the provide 'isr'
*
****************************************************************************/
int gpio_irqattach(int irq, xcpt_t isr)
int tiva_gpioirqattach(int irq, xcpt_t isr)
{
irqstate_t flags;
int gpioirq = irq - NR_IRQS;
@ -495,7 +369,7 @@ int gpio_irqattach(int irq, xcpt_t isr)
if (isr == NULL)
{
#ifndef CONFIG_ARCH_NOINTC
gpio_irqdisable(gpioirq);
tiva_gpioirqdisable(gpioirq);
#endif
isr = irq_unexpected_isr;
}
@ -510,14 +384,14 @@ int gpio_irqattach(int irq, xcpt_t isr)
}
/****************************************************************************
* Name: gpio_irqenable
* Name: tiva_gpioirqenable
*
* Description:
* Enable the GPIO IRQ specified by 'irq'
*
****************************************************************************/
void gpio_irqenable(int irq)
void tiva_gpioirqenable(int irq)
{
irqstate_t flags;
int gpioirq = irq - NR_IRQS;
@ -549,14 +423,14 @@ void gpio_irqenable(int irq)
}
/****************************************************************************
* Name: gpio_irqdisable
* Name: tiva_gpioirqdisable
*
* Description:
* Disable the GPIO IRQ specified by 'irq'
*
****************************************************************************/
void gpio_irqdisable(int irq)
void tiva_gpioirqdisable(int irq)
{
irqstate_t flags;
int gpioirq = irq - NR_IRQS;
@ -586,3 +460,4 @@ void gpio_irqdisable(int irq)
irqrestore(flags);
}
}

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@ -418,10 +418,10 @@ void up_irqinitialize(void)
#ifdef CONFIG_TIVA_GPIO_IRQS
#ifdef CONFIG_HAVE_WEAKFUNCTIONS
if (gpio_irqinitialize != NULL)
if (tiva_gpioirqinitialize != NULL)
#endif
{
gpio_irqinitialize();
tiva_gpioirqinitialize();
}
#endif