Tiva GPIO clean-up by Calvin Maguranis
This commit is contained in:
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1c9144c5a6
commit
0260620fdc
@ -456,19 +456,8 @@
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_TIVA_IRQ_H */
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@ -58,57 +58,6 @@
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* Private Types
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****************************************************************************/
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/* NOTE: this is duplicated in tiva_gpio.c */
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static const uintptr_t g_gpiobase[TIVA_NPORTS] =
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{
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#if TIVA_NPORTS > 0
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TIVA_GPIOA_BASE
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#endif
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#if TIVA_NPORTS > 1
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, TIVA_GPIOB_BASE
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#endif
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#if TIVA_NPORTS > 2
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, TIVA_GPIOC_BASE
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#endif
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#if TIVA_NPORTS > 3
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, TIVA_GPIOD_BASE
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#endif
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#if TIVA_NPORTS > 4
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, TIVA_GPIOE_BASE
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#endif
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#if TIVA_NPORTS > 5
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, TIVA_GPIOF_BASE
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#endif
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#if TIVA_NPORTS > 6
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, TIVA_GPIOG_BASE
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#endif
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#if TIVA_NPORTS > 7
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, TIVA_GPIOH_BASE
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#endif
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#if TIVA_NPORTS > 8
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, TIVA_GPIOJ_BASE
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#endif
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#if TIVA_NPORTS > 9
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, TIVA_GPIOK_BASE
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#endif
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#if TIVA_NPORTS > 10
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, TIVA_GPIOL_BASE
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#endif
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#if TIVA_NPORTS > 11
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, TIVA_GPIOM_BASE
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#endif
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#if TIVA_NPORTS > 12
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, TIVA_GPION_BASE
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#endif
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#if TIVA_NPORTS > 13
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, TIVA_GPIOP_BASE
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#endif
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#if TIVA_NPORTS > 14
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, TIVA_GPIOQ_BASE
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#endif
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};
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static const char g_portchar[TIVA_NPORTS] =
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{
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#if TIVA_NPORTS > 0
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@ -162,20 +111,6 @@ static const char g_portchar[TIVA_NPORTS] =
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tiva_gpiobaseaddress
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*
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* Description:
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* Given a GPIO enumeration value, return the base address of the
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* associated GPIO registers.
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*
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****************************************************************************/
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static inline uintptr_t tiva_gpiobaseaddress(int port)
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{
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return port < TIVA_NPORTS ? g_gpiobase[port] : 0;
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}
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/****************************************************************************
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* Name: tiva_gpioport
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*
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@ -222,7 +222,7 @@ static const uintptr_t g_gpiobase[TIVA_NPORTS] =
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*
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****************************************************************************/
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static uintptr_t tiva_gpiobaseaddress(unsigned int port)
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uintptr_t tiva_gpiobaseaddress(unsigned int port)
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{
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uintptr_t gpiobase = 0;
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if (port < TIVA_NPORTS)
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@ -959,6 +959,49 @@ bool tiva_gpioread(uint32_t pinset)
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* corresponding input pin when these are configured as inputs. All bits
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* are cleared by a reset."
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*/
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return (getreg32(base + TIVA_GPIO_DATA_OFFSET + (1 << (pinno + 2))) != 0);
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}
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/****************************************************************************
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* Name: tiva_gpio_lockport
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*
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* Description:
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* Certain pins require to be unlocked from the NMI to use for normal GPIO
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* use. See table 10-10 in datasheet for pins with special considerations.
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*
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****************************************************************************/
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void tiva_gpio_lockport(uint32_t pinset, bool lock)
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{
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unsigned int port;
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unsigned int pinno;
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uintptr_t base;
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/* Decode the basics */
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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pinno = (pinset & GPIO_PIN_MASK);
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/* Get the base address associated with the GPIO port */
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base = tiva_gpiobaseaddress(port);
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/* allow access to the TIVA_GPIO_CR_OFFSET register */
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modifyreg32(base + TIVA_GPIO_LOCK_OFFSET, 0, GPIO_LOCK_UNLOCK);
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/* lock or unlock the pin */
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if (lock)
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{
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modifyreg32(base + TIVA_GPIO_CR_OFFSET, (1 << pinno), 0);
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}
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else
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{
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modifyreg32(base + TIVA_GPIO_CR_OFFSET, 0, (1 << pinno));
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}
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/* Restrict acess to the TIVA_GPIO_CR_OFFSET register */
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modifyreg32(base + TIVA_GPIO_LOCK_OFFSET, GPIO_LOCK_UNLOCK, GPIO_LOCK_LOCKED);
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}
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@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/arm/src/tiva/tiva_gpio.h
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*
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* Copyright (C) 2009-2010, 2013-2015 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -223,6 +223,8 @@ extern "C"
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* Public Function Prototypes
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************************************************************************************/
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uintptr_t tiva_gpiobaseaddress(unsigned int port);
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/************************************************************************************
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* Name: tiva_configgpio
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*
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@ -263,6 +265,18 @@ bool tiva_gpioread(uint32_t pinset);
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int tiva_dumpgpio(uint32_t pinset, const char *msg);
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/****************************************************************************
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* Name: tiva_gpio_lockport
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*
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* Description:
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* Certain pins require to be unlocked from the NMI to use for normal GPIO
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* use. See table 10-10 in datasheet for pins with special considerations.
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*
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****************************************************************************/
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void tiva_gpio_lockport(uint32_t pinset, bool lock);
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# ifdef CONFIG_TIVA_GPIO_IRQS
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/************************************************************************************
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* Name: gpio_irqinitialize
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*
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@ -271,38 +285,40 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg);
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*
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************************************************************************************/
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int weak_function gpio_irqinitialize(void);
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int weak_function tiva_gpioirqinitialize(void);
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/****************************************************************************
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* Name: gpio_irqattach
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* Name: tiva_gpioirqattach
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*
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* Description:
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* Attach the interrupt handler 'isr' to the GPIO IRQ 'irq'
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*
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****************************************************************************/
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int gpio_irqattach(int irq, xcpt_t isr);
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#define gpio_irqdetach(isr) gpio_irqattach(isr, NULL)
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int tiva_gpioirqattach(int irq, xcpt_t isr);
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# define tiva_gpioirqdetach(isr) tiva_gpioirqattach(isr, NULL)
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/****************************************************************************
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* Name: gpio_irqenable
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* Name: tiva_gpioirqenable
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*
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* Description:
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* Enable the GPIO IRQ specified by 'irq'
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*
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****************************************************************************/
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void gpio_irqenable(int irq);
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void tiva_gpioirqenable(int irq);
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/****************************************************************************
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* Name: gpio_irqdisable
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* Name: tiva_gpioirqdisable
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*
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* Description:
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* Disable the GPIO IRQ specified by 'irq'
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*
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****************************************************************************/
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void gpio_irqdisable(int irq);
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void tiva_gpioirqdisable(int irq);
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# endif
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#if defined(__cplusplus)
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}
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@ -63,108 +63,6 @@
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static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS];
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/* A table that maps a GPIO group to a GPIO base address. Overly complicated
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* because we support disabling interrupt support for arbitrary ports. This
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* must carefully match the IRQ numbers assigned in arch/arm/include/lm3s/irq.h
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*/
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#define COMMA
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static const uintptr_t g_gpiobase[] =
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{
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#ifdef CONFIG_TIVA_GPIOA_IRQS
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COMMA TIVA_GPIOA_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOB_IRQS
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COMMA TIVA_GPIOB_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOC_IRQS
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COMMA TIVA_GPIOC_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOD_IRQS
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COMMA TIVA_GPIOD_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOE_IRQS
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COMMA TIVA_GPIOE_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOF_IRQS
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COMMA TIVA_GPIOF_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOG_IRQS
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COMMA TIVA_GPIOG_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOH_IRQS
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COMMA TIVA_GPIOH_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOJ_IRQS
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COMMA TIVA_GPIOJ_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOK_IRQS
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COMMA TIVA_GPIOK_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOL_IRQS
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COMMA TIVA_GPIOL_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOM_IRQS
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COMMA TIVA_GPIOM_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPION_IRQS
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COMMA TIVA_GPION_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOP_IRQS
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COMMA TIVA_GPIOP_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOQ_IRQS
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COMMA TIVA_GPIOQ_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOR_IRQS
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COMMA TIVA_GPIOR_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOS_IRQS
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COMMA TIVA_GPIOS_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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#ifdef CONFIG_TIVA_GPIOT_IRQS
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COMMA TIVA_GPIOT_BASE
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#undef COMMA
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#define COMMA ,
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#endif
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};
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#define GPIO_NADDRS (sizeof(g_gpiobase)/sizeof(uintptr_t))
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/****************************************************************************
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* Public Data
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****************************************************************************/
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@ -174,31 +72,7 @@ static const uintptr_t g_gpiobase[] =
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****************************************************************************/
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/****************************************************************************
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* Name: tiva_gpiobaseaddress
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*
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* Input:
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* gpioirq - A pin number in the range of 0 to NR_GPIO_IRQS.
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*
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* Description:
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* Given a GPIO enumeration value, return the base address of the
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* associated GPIO registers. NOTE that range checking was provided by
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* callee
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*
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****************************************************************************/
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static uintptr_t tiva_gpiobaseaddress(unsigned int gpioirq)
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{
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unsigned int ndx = gpioirq >> 3;
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if (ndx < GPIO_NADDRS)
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{
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return g_gpiobase[ndx];
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}
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return 0;
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}
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/****************************************************************************
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* Name: tiva_gpio*handler
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* Name: tiva_gpiohandler
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*
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* Description:
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* Handle interrupts on each enabled GPIO port
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@ -371,14 +245,14 @@ static int tiva_gpiothandler(int irq, FAR void *context)
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****************************************************************************/
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/****************************************************************************
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* Name: gpio_irqinitialize
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* Name: tiva_gpioirqinitialize
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*
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* Description:
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* Initialize all vectors to the unexpected interrupt handler
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*
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****************************************************************************/
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int gpio_irqinitialize(void)
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int tiva_gpioirqinitialize(void)
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{
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int i;
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@ -470,14 +344,14 @@ int gpio_irqinitialize(void)
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}
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/****************************************************************************
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* Name: gpio_irqattach
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* Name: tiva_gpioirqattach
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*
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* Description:
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* Attach in GPIO interrupt to the provide 'isr'
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*
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****************************************************************************/
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int gpio_irqattach(int irq, xcpt_t isr)
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int tiva_gpioirqattach(int irq, xcpt_t isr)
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{
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irqstate_t flags;
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int gpioirq = irq - NR_IRQS;
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@ -495,7 +369,7 @@ int gpio_irqattach(int irq, xcpt_t isr)
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if (isr == NULL)
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{
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#ifndef CONFIG_ARCH_NOINTC
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gpio_irqdisable(gpioirq);
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tiva_gpioirqdisable(gpioirq);
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#endif
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isr = irq_unexpected_isr;
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}
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@ -510,14 +384,14 @@ int gpio_irqattach(int irq, xcpt_t isr)
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}
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/****************************************************************************
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* Name: gpio_irqenable
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* Name: tiva_gpioirqenable
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*
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* Description:
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* Enable the GPIO IRQ specified by 'irq'
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*
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****************************************************************************/
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void gpio_irqenable(int irq)
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void tiva_gpioirqenable(int irq)
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{
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irqstate_t flags;
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int gpioirq = irq - NR_IRQS;
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@ -549,14 +423,14 @@ void gpio_irqenable(int irq)
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}
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/****************************************************************************
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* Name: gpio_irqdisable
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* Name: tiva_gpioirqdisable
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*
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* Description:
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* Disable the GPIO IRQ specified by 'irq'
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*
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****************************************************************************/
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void gpio_irqdisable(int irq)
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void tiva_gpioirqdisable(int irq)
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{
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irqstate_t flags;
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int gpioirq = irq - NR_IRQS;
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@ -586,3 +460,4 @@ void gpio_irqdisable(int irq)
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irqrestore(flags);
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}
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}
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@ -418,10 +418,10 @@ void up_irqinitialize(void)
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#ifdef CONFIG_TIVA_GPIO_IRQS
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#ifdef CONFIG_HAVE_WEAKFUNCTIONS
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if (gpio_irqinitialize != NULL)
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if (tiva_gpioirqinitialize != NULL)
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#endif
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{
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gpio_irqinitialize();
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tiva_gpioirqinitialize();
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}
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#endif
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