Add watchdog driver support to RP2040
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0322a61510
95
arch/arm/include/rp2040/watchdog.h
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95
arch/arm/include/rp2040/watchdog.h
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@ -0,0 +1,95 @@
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/****************************************************************************
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* arch/arm/include/rp2040/watchdog.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H
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#define __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/timers/watchdog.h>
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#ifndef __ASSEMBLY__
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#ifdef CONFIG_WATCHDOG
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IOCTL Commands ***********************************************************/
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/* The watchdog driver uses a standard character driver framework. However,
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* since the watchdog driver is a device control interface and not a data
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* transfer interface, the majority of the functionality is implemented in
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* driver ioctl calls.
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*
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* See nuttx/timers/watchdog.h for the IOCTLs handled by the upper half.
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*
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* These are detected and handled by the "lower half" watchdog timer driver.
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*
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* WDIOC_SET_SCRATCHn - save a 32-bit "arg" value in a scratch register
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* that will be preserved over soft resets. A hard
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* reset sets all scratch values to zero.
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*
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* WDIOC_GET_SCRATCHn - fetch a 32-bit value from a scratch register
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* into a uint32_t pointed to by "arg".
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*/
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#define WDIOC_SET_SCRATCH0 _WDIOC(0x180)
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#define WDIOC_SET_SCRATCH1 _WDIOC(0x181)
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#define WDIOC_SET_SCRATCH2 _WDIOC(0x182)
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#define WDIOC_SET_SCRATCH3 _WDIOC(0x183)
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#define WDIOC_SET_SCRATCH4 _WDIOC(0x184)
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#define WDIOC_SET_SCRATCH5 _WDIOC(0x185)
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#define WDIOC_SET_SCRATCH6 _WDIOC(0x186)
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#define WDIOC_SET_SCRATCH7 _WDIOC(0x187)
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#define WDIOC_SET_SCRATCH(n) _WDIOC(0x180 + (n))
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#define WDIOC_GET_SCRATCH0 _WDIOC(0x1f0)
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#define WDIOC_GET_SCRATCH1 _WDIOC(0x1f1)
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#define WDIOC_GET_SCRATCH2 _WDIOC(0x1f2)
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#define WDIOC_GET_SCRATCH3 _WDIOC(0x1f3)
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#define WDIOC_GET_SCRATCH4 _WDIOC(0x1f4)
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#define WDIOC_GET_SCRATCH5 _WDIOC(0x1f5)
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#define WDIOC_GET_SCRATCH6 _WDIOC(0x1f6)
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#define WDIOC_GET_SCRATCH7 _WDIOC(0x1f7)
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#define WDIOC_GET_SCRATCH(n) _WDIOC(0x1f0 + (n))
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#endif /* CONFIG_WATCHDOG */
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_INCLUDE_RP2040_WATCHDOG_H */
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@ -82,6 +82,10 @@ ifeq ($(CONFIG_IEEE80211_INFINEON_CYW43439),y)
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CHIP_CSRCS += rp2040_cyw43439.c
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endif
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ifeq ($(CONFIG_WATCHDOG),y)
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CHIP_CSRCS += rp2040_wdt.c
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endif
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ifeq ($(CONFIG_RP2040_FLASH_FILE_SYSTEM),y)
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CHIP_CSRCS += rp2040_flash_mtd.c
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CHIP_ASRCS += rp2040_flash_initialize.S
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@ -65,18 +65,19 @@
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/* Register definitions *****************************************************/
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#define RP2040_WATCHDOG_CTRL (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_CTRL_OFFSET)
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#define RP2040_WATCHDOG_LOAD (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_LOAD_OFFSET)
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#define RP2040_WATCHDOG_REASON (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_REASON_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH0 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH1 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH1_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH2 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH2_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH3 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH3_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH4 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH4_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH5 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH5_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH6 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH6_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH7 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH7_OFFSET)
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#define RP2040_WATCHDOG_TICK (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_TICK_OFFSET)
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#define RP2040_WATCHDOG_CTRL (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_CTRL_OFFSET)
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#define RP2040_WATCHDOG_LOAD (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_LOAD_OFFSET)
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#define RP2040_WATCHDOG_REASON (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_REASON_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH0 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH1 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH1_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH2 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH2_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH3 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH3_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH4 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH4_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH5 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH5_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH6 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH6_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH7 (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH7_OFFSET)
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#define RP2040_WATCHDOG_SCRATCH(n) (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_SCRATCH0_OFFSET + 4 * n)
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#define RP2040_WATCHDOG_TICK (RP2040_WATCHDOG_BASE + RP2040_WATCHDOG_TICK_OFFSET)
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/* Register bit definitions *************************************************/
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281
arch/arm/src/rp2040/rp2040_wdt.c
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281
arch/arm/src/rp2040/rp2040_wdt.c
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/****************************************************************************
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* arch/arm/src/rp2040/rp2040_wdt.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "rp2040_wdt.h"
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#include <sys/types.h>
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#include <stdbool.h>
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#include <string.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/chip/watchdog.h>
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#include <hardware/rp2040_watchdog.h>
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#include <hardware/rp2040_psm.h>
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#include <arch/rp2040/watchdog.h>
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#include <nuttx/arch.h>
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#include <nuttx/clock.h>
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#include <nuttx/timers/watchdog.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define WD_RESETS_BITS (RP2040_PSM_CLOCKS \
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| RP2040_PSM_RESETS \
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| RP2040_PSM_BUSFABRIC \
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| RP2040_PSM_ROM \
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| RP2040_PSM_SRAM0 \
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| RP2040_PSM_SRAM1 \
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| RP2040_PSM_SRAM2 \
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| RP2040_PSM_SRAM3 \
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| RP2040_PSM_SRAM4 \
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| RP2040_PSM_SRAM5 \
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| RP2040_PSM_XIP \
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| RP2040_PSM_VREG_AND_CHIP_RESET \
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| RP2040_PSM_SIO \
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| RP2040_PSM_PROC0 \
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| RP2040_PSM_PROC1)
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#define WD_ENABLE_BITS (RP2040_WATCHDOG_CTRL_ENABLE \
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| RP2040_WATCHDOG_CTRL_PAUSE_DBG0 \
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| RP2040_WATCHDOG_CTRL_PAUSE_DBG1 \
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| RP2040_WATCHDOG_CTRL_PAUSE_JTAG)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This structure provides the private representation of the "lower-half"
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* driver state structure. This structure must be cast-compatible with the
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* well-known watchdog_lowerhalf_s structure.
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*/
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typedef struct rp2040_watchdog_lowerhalf_s
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{
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const struct watchdog_ops_s *ops; /* Lower half operations */
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uint32_t timeout; /* The current timeout */
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uint32_t lastreset; /* The last reset time */
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bool started; /* True: Timer has been started */
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xcpt_t handler; /* User Handler */
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void *upper; /* Pointer to watchdog_upperhalf_s */
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} watchdog_lowerhalf_t;
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* "Lower half" driver methods **********************************************/
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static int my_wdt_start (struct watchdog_lowerhalf_s *lower);
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static int my_wdt_stop (struct watchdog_lowerhalf_s *lower);
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static int my_wdt_keepalive (struct watchdog_lowerhalf_s *lower);
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static int my_wdt_getstatus (struct watchdog_lowerhalf_s *lower,
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struct watchdog_status_s *status);
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static int my_wdt_settimeout (struct watchdog_lowerhalf_s *lower,
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uint32_t timeout);
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static int my_wdt_ioctl (struct watchdog_lowerhalf_s *lower,
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int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* "Lower half" driver methods */
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static const struct watchdog_ops_s g_rp2040_wdg_ops =
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{
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.start = my_wdt_start,
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.stop = my_wdt_stop,
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.keepalive = my_wdt_keepalive,
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.getstatus = my_wdt_getstatus,
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.settimeout = my_wdt_settimeout,
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.capture = NULL,
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.ioctl = my_wdt_ioctl,
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};
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static watchdog_lowerhalf_t g_rp2040_watchdog_lowerhalf =
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{
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.ops = &g_rp2040_wdg_ops,
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: my_wdt_start
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****************************************************************************/
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int my_wdt_start(struct watchdog_lowerhalf_s *lower)
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{
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watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
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/* Convert millisecond input to microseconds
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* Extra times 2 per errata RP2040-E1
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*/
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putreg32(priv->timeout * 2000, RP2040_WATCHDOG_LOAD);
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modreg32(WD_ENABLE_BITS, WD_ENABLE_BITS, RP2040_WATCHDOG_CTRL);
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modreg32(WD_RESETS_BITS, WD_RESETS_BITS, RP2040_PSM_WDSEL);
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return OK;
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}
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/****************************************************************************
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* Name: my_wdt_stop
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****************************************************************************/
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int my_wdt_stop(struct watchdog_lowerhalf_s *lower)
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{
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modreg32(0, RP2040_WATCHDOG_CTRL_ENABLE, RP2040_WATCHDOG_CTRL);
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return OK;
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}
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/****************************************************************************
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* Name: my_wdt_keepalive
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****************************************************************************/
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int my_wdt_keepalive(struct watchdog_lowerhalf_s *lower)
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{
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watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
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/* Convert millisecond input to microseconds
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* Extra times 2 per errata RP2040-E1
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*/
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putreg32(priv->timeout * 2000, RP2040_WATCHDOG_LOAD);
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return OK;
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}
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/****************************************************************************
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* Name: my_wdt_getstatus
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****************************************************************************/
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int my_wdt_getstatus(struct watchdog_lowerhalf_s *lower,
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struct watchdog_status_s *status)
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{
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watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
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uint32_t ctrl = getreg32(RP2040_WATCHDOG_CTRL);
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status->flags = (ctrl & RP2040_WATCHDOG_CTRL_ENABLE) ? WDFLAGS_ACTIVE
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: 0;
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status->timeout = priv->timeout;
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/* Convert microseconds to output microseconds.
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* Extra divide by 2 per errata RP2040-E1.
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*/
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status->timeleft = (ctrl & RP2040_WATCHDOG_CTRL_TIME_MASK) / 2000;
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/* WARNING: On (at least) version 2 RP2040 chips, the timeleft does
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* not seem to be reliable.
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*/
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return OK;
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}
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/****************************************************************************
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* Name: my_wdt_settimeout
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****************************************************************************/
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int my_wdt_settimeout (struct watchdog_lowerhalf_s *lower, uint32_t timeout)
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{
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watchdog_lowerhalf_t *priv = (watchdog_lowerhalf_t *)lower;
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priv->timeout = timeout > (0x7fffff / 1000) ? 0x7fffff : timeout;
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/* Convert millisecond input to microseconds
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* Extra times 2 per errata RP2040-E1
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*/
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putreg32(priv->timeout * 2000, RP2040_WATCHDOG_LOAD);
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return OK;
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}
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/****************************************************************************
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* Name: my_wdt_ioctl
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****************************************************************************/
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int my_wdt_ioctl(struct watchdog_lowerhalf_s *lower,
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int cmd,
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unsigned long arg)
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{
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if (cmd >= WDIOC_SET_SCRATCH0 && cmd <= WDIOC_SET_SCRATCH7)
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{
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int n = cmd - WDIOC_SET_SCRATCH0;
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putreg32((uint32_t) arg, RP2040_WATCHDOG_SCRATCH(n));
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return OK;
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}
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if (cmd >= WDIOC_GET_SCRATCH0 && cmd <= WDIOC_GET_SCRATCH7)
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{
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int n = cmd - WDIOC_GET_SCRATCH0;
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*((uint32_t *)arg) = getreg32((uint32_t) RP2040_WATCHDOG_SCRATCH(n));
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return OK;
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}
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return -ENOTTY;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rp2040_wdt_init
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****************************************************************************/
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int rp2040_wdt_init(void)
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{
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watchdog_lowerhalf_t *lower = &g_rp2040_watchdog_lowerhalf;
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int ret = OK;
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lower->upper = watchdog_register(CONFIG_WATCHDOG_DEVPATH,
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(struct watchdog_lowerhalf_s *) lower);
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if (lower->upper == NULL)
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{
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ret = -EEXIST;
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goto errout;
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}
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modreg32(0, RP2040_WATCHDOG_CTRL_ENABLE, RP2040_WATCHDOG_CTRL);
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errout:
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return ret;
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}
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58
arch/arm/src/rp2040/rp2040_wdt.h
Normal file
58
arch/arm/src/rp2040/rp2040_wdt.h
Normal file
@ -0,0 +1,58 @@
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/****************************************************************************
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* arch/arm/src/rp2040/rp2040_wdt.h
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*
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||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_RP2040_RP2040_WDT_H
|
||||
#define __ARCH_ARM_SRC_RP2040_RP2040_WDT_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_wdt_init
|
||||
****************************************************************************/
|
||||
|
||||
int rp2040_wdt_init(void);
|
||||
|
||||
#undef EXTERN
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_RP2040_RP2040_WDT_H */
|
@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Adafruit Feather RP2040.
|
||||
See https://www.adafruit.com/product/4884 for information
|
||||
about Adafruit Feather RP2040.
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
|
||||
- I2C
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -23,15 +22,23 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- Pico Display Pack (ST7789 LCD)
|
||||
- RGB leds and buttons are not supported yet.
|
||||
- Pico Audio Pack (PCM5100A I2S DAC)
|
||||
- I2S interface is realized by PIO.
|
||||
- WS2812 smart pixel support
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
@ -4,16 +4,15 @@ README
|
||||
This directory contains the port of NuttX to the Adafruit KB2040.
|
||||
See https://www.adafruit.com/product/5302 for information about Adafruit KB2040.
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
|
||||
- I2C
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -22,15 +21,23 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- Pico Display Pack (ST7789 LCD)
|
||||
- RGB leds and buttons are not supported yet.
|
||||
- Pico Audio Pack (PCM5100A I2S DAC)
|
||||
- I2S interface is realized by PIO.
|
||||
- WS2812 smart pixel support
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Adafruit QT Py RP2040.
|
||||
See https://learn.adafruit.com/adafruit-qt-py-2040 for information
|
||||
about Adafruit QT Py RP2040.
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 5 (UART1 RX) and GPIO 20 (UART1 TX) are used for the console.
|
||||
- I2C
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -23,9 +22,17 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- WS2812 smart pixel support
|
||||
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
@ -76,6 +76,10 @@
|
||||
#include "rp2040_ws2812.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WATCHDOG
|
||||
# include "rp2040_wdt.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RP2040_ROMFS_ROMDISK_DEVNAME)
|
||||
# include <rp2040_romfsimg.h>
|
||||
#endif
|
||||
@ -584,6 +588,18 @@ int rp2040_common_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WATCHDOG
|
||||
/* Configure watchdog timer */
|
||||
|
||||
ret = rp2040_wdt_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR,
|
||||
"ERROR: Failed to initialize watchdog drivers: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_FLASH_FILE_SYSTEM
|
||||
|
||||
mtd_dev = rp2040_flash_mtd_initialize();
|
||||
|
@ -8,16 +8,15 @@ for information about Pimoroni Tiny 2040.
|
||||
The Pimoroni Tiny 2040 has two buttons (RESET and BOOT) allowing to boot
|
||||
from ROM without disconnecting the device.
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
|
||||
- I2C (not tested on Tiny 2040)
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -26,9 +25,17 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- WS2812 smart pixel support
|
||||
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Raspberry Pi Pico.
|
||||
See https://www.raspberrypi.org/products/raspberry-pi-pico/ for information
|
||||
about Raspberry Pi Pico W
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
|
||||
- I2C
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -23,16 +22,24 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
- WiFi wireless communication
|
||||
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- Pico Display Pack (ST7789 LCD)
|
||||
- RGB leds and buttons are not supported yet.
|
||||
- Pico Audio Pack (PCM5100A I2S DAC)
|
||||
- I2S interface is realized by PIO.
|
||||
- WS2812 smart pixel support
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
@ -5,16 +5,15 @@ This directory contains the port of NuttX to the Raspberry Pi Pico.
|
||||
See https://www.raspberrypi.org/products/raspberry-pi-pico/ for information
|
||||
about Raspberry Pi Pico.
|
||||
|
||||
Currently only the following devices are supported.
|
||||
|
||||
Supported:
|
||||
NuttX supports the following RP2040 capabilities:
|
||||
- UART (console port)
|
||||
- GPIO 0 (UART0 TX) and GPIO 1 (UART0 RX) are used for the console.
|
||||
- I2C
|
||||
- SPI
|
||||
- SPI (master only)
|
||||
- DMAC
|
||||
- PWM
|
||||
- ADC
|
||||
- Watchdog
|
||||
- USB device
|
||||
- MSC, CDC/ACM serial and these composite device are supported.
|
||||
- CDC/ACM serial device can be used for the console.
|
||||
@ -23,15 +22,23 @@ Currently only the following devices are supported.
|
||||
- SRAM Boot
|
||||
- If Pico SDK is available, nuttx.uf2 file which can be used in
|
||||
BOOTSEL mode will be created.
|
||||
- Persistent flash filesystem in unused flash ROM
|
||||
|
||||
NuttX also provide support for these external devices:
|
||||
|
||||
- BMP180 sensor at I2C0 (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- INA219 sensor / module (don't forget to define I2C0 GPIOs at "I2C0 GPIO pin assign" in Board Selection menu)
|
||||
- Pico Display Pack (ST7789 LCD)
|
||||
- RGB leds and buttons are not supported yet.
|
||||
- Pico Audio Pack (PCM5100A I2S DAC)
|
||||
- I2S interface is realized by PIO.
|
||||
- WS2812 smart pixel support
|
||||
|
||||
Not supported:
|
||||
- All other devices
|
||||
There is currently no direct user mode access to these RP2040 hardware features:
|
||||
- SPI Slave Mode
|
||||
- SSI
|
||||
- RTC
|
||||
- Timers
|
||||
|
||||
Installation
|
||||
============
|
||||
|
Loading…
Reference in New Issue
Block a user