esp32s2: Add RNG driver support and board profile example
This commit is contained in:
Alan C. Assis
Xiang Xiao
parent
3819d93b4e
commit
03738622a1
@ -77,6 +77,10 @@ ifeq ($(CONFIG_ESP32S2_UART),y)
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CMN_CSRCS += esp32s2_serial.c
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endif
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ifeq ($(CONFIG_ESP32S2_RNG),y)
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CMN_CSRCS += esp32s2_rng.c
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endif
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ifeq ($(CONFIG_ESP32S2_TIMER),y)
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CHIP_CSRCS += esp32s2_tim.c
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ifeq ($(CONFIG_TIMER),y)
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228
arch/xtensa/src/esp32s2/esp32s2_rng.c
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228
arch/xtensa/src/esp32s2/esp32s2_rng.c
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/****************************************************************************
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* arch/xtensa/src/esp32s2/esp32s2_rng.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include <debug.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <nuttx/fs/fs.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/semaphore.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/drivers/drivers.h>
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#include <arch/xtensa/core_macros.h>
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#include "xtensa.h"
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#include "xtensa_attr.h"
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#include "hardware/wdev_reg.h"
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#include "esp32s2_clockconfig.h"
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#if defined(CONFIG_ESP32S2_RNG)
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#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef MIN
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int esp32s2_rng_initialize(void);
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static ssize_t esp32s2_rng_read(struct file *filep, char *buffer,
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size_t buflen);
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct rng_dev_s
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{
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uint8_t *rd_buf;
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sem_t rd_sem; /* semaphore for read RNG data */
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct rng_dev_s g_rngdev;
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static const struct file_operations g_rngops =
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{
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.read = esp32s2_rng_read, /* read */
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};
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/****************************************************************************
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* Private functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32s2_random
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****************************************************************************/
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uint32_t IRAM_ATTR esp_random(void)
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{
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/* The PRNG which implements WDEV_RANDOM register gets 2 bits
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* of extra entropy from a hardware randomness source every APB clock cycle
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* (provided WiFi or BT are enabled). To make sure entropy is not drained
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* faster than it is added, this function needs to wait for at least 16 APB
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* clock cycles after reading previous word. This implementation may
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* actually wait a bit longer due to extra time spent in arithmetic and
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* branch statements.
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*
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* As a (probably unnecessary) precaution to avoid returning the
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* RNG state as-is, the result is XORed with additional
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* WDEV_RND_REG reads while waiting.
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*/
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uint32_t cpu_to_apb_freq_ratio = esp_clk_cpu_freq() / esp_clk_apb_freq();
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static uint32_t last_ccount = 0;
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uint32_t ccount;
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uint32_t result = 0;
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do
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{
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ccount = XTHAL_GET_CCOUNT();
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result ^= getreg32(WDEV_RND_REG);
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}
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while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
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last_ccount = ccount;
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return result ^ getreg32(WDEV_RND_REG);
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}
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static int esp32s2_rng_initialize(void)
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{
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_info("Initializing RNG\n");
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memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
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nxsem_init(&g_rngdev.rd_sem, 0, 1);
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nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
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return OK;
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}
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/****************************************************************************
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* Name: esp32s2_rng_read
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****************************************************************************/
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static ssize_t esp32s2_rng_read(struct file *filep, char *buffer,
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size_t buflen)
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{
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struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
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ssize_t read_len;
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uint8_t *rd_buf = (uint8_t *)buffer;
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if (nxsem_wait(&priv->rd_sem) != OK)
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{
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return -EBUSY;
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}
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read_len = buflen;
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/* Wait until the buffer is filled */
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while (buflen > 0)
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{
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uint32_t word = esp_random();
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uint32_t to_copy = MIN(sizeof(word), buflen);
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memcpy(rd_buf, &word, to_copy);
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rd_buf += to_copy;
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buflen -= to_copy;
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}
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/* Release rd_sem for next read */
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nxsem_post(&priv->rd_sem);
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return read_len;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: devrandom_register
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*
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* Description:
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* Initialize the RNG hardware and register the /dev/random driver.
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* Must be called BEFORE devurandom_register.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_DEV_RANDOM
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void devrandom_register(void)
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{
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esp32s2_rng_initialize();
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register_driver("/dev/random", &g_rngops, 0444, NULL);
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}
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#endif
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/****************************************************************************
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* Name: devurandom_register
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*
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* Description:
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* Register /dev/urandom
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_DEV_URANDOM_ARCH
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void devurandom_register(void)
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{
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#ifndef CONFIG_DEV_RANDOM
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esp32s2_rng_initialize();
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#endif
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register_driver("dev/urandom", &g_rngops, 0444, NULL);
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}
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#endif
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#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
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#endif /* CONFIG_ESP32S2_RNG */
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34
arch/xtensa/src/esp32s2/hardware/wdev_reg.h
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34
arch/xtensa/src/esp32s2/hardware/wdev_reg.h
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@ -0,0 +1,34 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s2/hardware/wdev_reg.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_WDEV_REG_H
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#define __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_WDEV_REG_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "esp32s2_soc.h"
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/* Hardware random number generator register */
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#define WDEV_RND_REG 0x60035110
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#endif /* __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_WDEV_REG_H */
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@ -0,0 +1,48 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_LEDS is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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CONFIG_ARCH="xtensa"
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CONFIG_ARCH_BOARD="esp32s2-saola-1"
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CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y
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CONFIG_ARCH_CHIP="esp32s2"
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CONFIG_ARCH_CHIP_ESP32S2=y
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CONFIG_ARCH_CHIP_ESP32S2WROVER=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_XTENSA=y
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILTIN=y
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CONFIG_ESP32S2_DATA_CACHE_0KB=y
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CONFIG_ESP32S2_RNG=y
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CONFIG_ESP32S2_UART0=y
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CONFIG_EXAMPLES_RANDOM=y
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CONFIG_FS_PROCFS=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_IDLETHREAD_STACKSIZE=3072
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CONFIG_INTELHEX_BINARY=y
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2011
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CONFIG_SYSTEM_NSH=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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