SAMA5D3x-EK: Add support board-specific PWM testing
This commit is contained in:
parent
231a43bd8d
commit
041565d69f
@ -2380,7 +2380,7 @@ config SAMA5_PWM_CLKA
|
||||
|
||||
config SAMA5_PWM_CLKA_FREQUENCY
|
||||
int "CLKA frequency"
|
||||
default 100
|
||||
default 1000
|
||||
depends on SAMA5_PWM_CLKA
|
||||
---help---
|
||||
If the CLKA source is enabled, then you must also provide the
|
||||
@ -2396,7 +2396,7 @@ config SAMA5_PWM_CLKB
|
||||
|
||||
config SAMA5_PWM_CLKB_FREQUENCY
|
||||
int "CLKB frequency"
|
||||
default 100
|
||||
default 1000
|
||||
depends on SAMA5_PWM_CLKB
|
||||
---help---
|
||||
If the CLKB source is enabled, then you must also provide the
|
||||
@ -2439,7 +2439,7 @@ config SAMA5_PWM_CHAN0_MCKDIV
|
||||
|
||||
config SAMA5_PWM_CHAN0_OUTPUTH
|
||||
bool "Configure OUTPUT H pin"
|
||||
default n
|
||||
default y
|
||||
|
||||
config SAMA5_PWM_CHAN0_OUTPUTL
|
||||
bool "Configure OUTPUT L pin"
|
||||
@ -2486,7 +2486,7 @@ config SAMA5_PWM_CHAN1_MCKDIV
|
||||
|
||||
config SAMA5_PWM_CHAN1_OUTPUTH
|
||||
bool "Configure OUTPUT H pin"
|
||||
default n
|
||||
default y
|
||||
|
||||
config SAMA5_PWM_CHAN1_OUTPUTL
|
||||
bool "Configure OUTPUT L pin"
|
||||
@ -2533,7 +2533,7 @@ config SAMA5_PWM_CHAN2_MCKDIV
|
||||
|
||||
config SAMA5_PWM_CHAN2_OUTPUTH
|
||||
bool "Configure OUTPUT H pin"
|
||||
default n
|
||||
default y
|
||||
|
||||
config SAMA5_PWM_CHAN2_OUTPUTL
|
||||
bool "Configure OUTPUT L pin"
|
||||
@ -2580,7 +2580,7 @@ config SAMA5_PWM_CHAN3_MCKDIV
|
||||
|
||||
config SAMA5_PWM_CHAN3_OUTPUTH
|
||||
bool "Configure OUTPUT H pin"
|
||||
default n
|
||||
default y
|
||||
|
||||
config SAMA5_PWM_CHAN3_OUTPUTL
|
||||
bool "Configure OUTPUT L pin"
|
||||
|
@ -1076,18 +1076,22 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||
fsrc = BOARD_MCK_FREQUENCY >> chan->divlog2;
|
||||
break;
|
||||
|
||||
#ifdef CONFIG_SAMA5_PWM_CLKA
|
||||
case PWM_CLKSRC_CLKA:
|
||||
regval = PWM_CMR_CPRE_CLKA;
|
||||
fsrc = CLKA_FREQUENCY;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SAMA5_PWM_CLKB
|
||||
case PWM_CLKSRC_CLKB:
|
||||
regval = PWM_CMR_CPRE_CLKB;
|
||||
fsrc = CLKB_FREQUENCY;
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
pwmdbg("ERROR: Bad clock source value: %d\n", chan->clksrc);
|
||||
pwmdbg("ERROR: Invalid or unsupported clock source value: %d\n", chan->clksrc);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user