diff --git a/arch/arm/src/imxrt/imxrt_usdhc.c b/arch/arm/src/imxrt/imxrt_usdhc.c
index 2289f40ffa..0ad3ddb51b 100644
--- a/arch/arm/src/imxrt/imxrt_usdhc.c
+++ b/arch/arm/src/imxrt/imxrt_usdhc.c
@@ -2753,33 +2753,33 @@ FAR struct sdio_dev_s *imxrt_usdhc_initialize(int slotno)
 #ifndef CONFIG_SDIO_MUXBUS
   /* Data width 1, 4 or 8 */
 
-  (void)imxrt_config_gpio(PIN_USDHC1_D0 | PINSET_USDHC1_DATAX);
+  (void)imxrt_config_gpio(PIN_USDHC1_D0);
 
   /* Data width 4 or 8 */
 
 #ifndef CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY
-  (void)imxrt_config_gpio(PIN_USDHC1_D1 | PINSET_USDHC1_DATAX);
-  (void)imxrt_config_gpio(PIN_USDHC1_D2 | PINSET_USDHC1_DATAX);
-  (void)imxrt_config_gpio(PIN_USDHC1_D3 | PINSET_USDHC1_DATAX);
+  (void)imxrt_config_gpio(PIN_USDHC1_D1);
+  (void)imxrt_config_gpio(PIN_USDHC1_D2);
+  (void)imxrt_config_gpio(PIN_USDHC1_D3);
 
   /* Data width 8 (not supported) */
 
 #if 0
-  (void)imxrt_config_gpio(PIN_USDHC1_D4 | PINSET_USDHC1_DATAX);
-  (void)imxrt_config_gpio(PIN_USDHC1_D5 | PINSET_USDHC1_DATAX);
-  (void)imxrt_config_gpio(PIN_USDHC1_D6 | PINSET_USDHC1_DATAX);
-  (void)imxrt_config_gpio(PIN_USDHC1_D7 | PINSET_USDHC1_DATAX);
+  (void)imxrt_config_gpio(PIN_USDHC1_D4);
+  (void)imxrt_config_gpio(PIN_USDHC1_D5);
+  (void)imxrt_config_gpio(PIN_USDHC1_D6);
+  (void)imxrt_config_gpio(PIN_USDHC1_D7);
 #endif
 #endif
 
   /* Clocking and CMD pins (all data widths) */
 
-  (void)imxrt_config_gpio(PIN_USDHC1_DCLK | PINSET_USDHC1_CLK);
-  (void)imxrt_config_gpio(PIN_USDHC1_CMD | PINSET_USDHC1_CMD);
+  (void)imxrt_config_gpio(PIN_USDHC1_DCLK);
+  (void)imxrt_config_gpio(PIN_USDHC1_CMD);
 #endif
 
 #if defined(CONFIG_MMCSD_HAVE_CARDDETECT) && defined(PIN_USDHC1_CD)
-  (void)imxrt_config_gpio(PIN_USDHC1_CD | PINSET_USDHC1_CD);
+  (void)imxrt_config_gpio(PIN_USDHC1_CD);
 
   /* Daisy chain select the CD pin */
 
diff --git a/configs/imxrt1050-evk/include/board.h b/configs/imxrt1050-evk/include/board.h
index a674e623dd..9cfd9ddb2c 100644
--- a/configs/imxrt1050-evk/include/board.h
+++ b/configs/imxrt1050-evk/include/board.h
@@ -175,19 +175,20 @@
  * are square with minimal ringing.
  */
 
-#define PINSET_USDHC1_DATAX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
+#define USDHC1_DATAX_IOMUX  (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
                              IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
-#define PINSET_USDHC1_CMD   (PINSET_USDHC1_DATAX)
-#define PINSET_USDHC1_CLK   (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_SPEED_MAX)
-#define PINSET_USDHC1_CD    (0)
+#define USDHC1_CMD_IOMUX    (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
+                             IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
+#define USDHC1_CLK_IOMUX    (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_SPEED_MAX)
+#define USDHC1_CD_IOMUX     (0)
 
-#define PIN_USDHC1_D0       GPIO_USDHC1_DATA0
-#define PIN_USDHC1_D1       GPIO_USDHC1_DATA1
-#define PIN_USDHC1_D2       GPIO_USDHC1_DATA2
-#define PIN_USDHC1_D3       GPIO_USDHC1_DATA3
-#define PIN_USDHC1_DCLK     GPIO_USDHC1_CLK
-#define PIN_USDHC1_CMD      GPIO_USDHC1_CMD
-#define PIN_USDHC1_CD       GPIO_USDHC1_CD_2
+#define PIN_USDHC1_D0       (GPIO_USDHC1_DATA0 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D1       (GPIO_USDHC1_DATA1 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D2       (GPIO_USDHC1_DATA2 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D3       (GPIO_USDHC1_DATA3 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_DCLK     (GPIO_USDHC1_CLK   | USDHC1_CLK_IOMUX)
+#define PIN_USDHC1_CMD      (GPIO_USDHC1_CMD   | USDHC1_CMD_IOMUX)
+#define PIN_USDHC1_CD       (GPIO_USDHC1_CD_2  | USDHC1_CD_IOMUX)
 
 /* 386 KHz for initial inquiry stuff */
 
diff --git a/configs/imxrt1060-evk/include/board.h b/configs/imxrt1060-evk/include/board.h
index e1b435cb6e..e852102c3e 100644
--- a/configs/imxrt1060-evk/include/board.h
+++ b/configs/imxrt1060-evk/include/board.h
@@ -165,18 +165,20 @@
 
 /* Pin drive characteristics - drive strength in particular may need tuning for specific boards */
 
-#define PADCTL_USDHC1_DATAX (PADCTL_SRE|PADCTL_DSE_60OHM|PADCTL_HYS)
-#define PADCTL_USDHC1_CMD    PADCTL_USDHC1_DATAX
-#define PADCTL_USDHC1_CLK   (PADCTL_SRE|PADCTL_DSE_60OHM|PADCTL_SPEED_MAX)
-#define PADCTL_USDHC1_CD    (0)
+#define USDHC1_DATAX_IOMUX  (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
+                             IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
+#define USDHC1_CMD_IOMUX    (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
+                             IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
+#define USDHC1_CLK_IOMUX    (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_SPEED_MAX)
+#define USDHC1_CD_IOMUX     (0)
 
-#define PIN_USDHC1_D0 GPIO_USDHC1_DATA0
-#define PIN_USDHC1_D1 GPIO_USDHC1_DATA1
-#define PIN_USDHC1_D2 GPIO_USDHC1_DATA2
-#define PIN_USDHC1_D3 GPIO_USDHC1_DATA3
-#define PIN_USDHC1_DCLK GPIO_USDHC1_CLK
-#define PIN_USDHC1_CMD GPIO_USDHC1_CMD
-#define PIN_USDHC1_CD GPIO_USDHC1_CD_2
+#define PIN_USDHC1_D0       (GPIO_USDHC1_DATA0 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D1       (GPIO_USDHC1_DATA1 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D2       (GPIO_USDHC1_DATA2 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_D3       (GPIO_USDHC1_DATA3 | USDHC1_DATAX_IOMUX)
+#define PIN_USDHC1_DCLK     (GPIO_USDHC1_CLK   | USDHC1_CLK_IOMUX)
+#define PIN_USDHC1_CMD      (GPIO_USDHC1_CMD   | USDHC1_CMD_IOMUX)
+#define PIN_USDHC1_CD       (GPIO_USDHC1_CD_2  | USDHC1_CD_IOMUX)
 
 /* 386 KHz for initial inquiry stuff */