boards/arm/stm32/stm32f429i-disco/src/stm32_ili93414ws.c: Appease nxstyle
This commit is contained in:
YAMAMOTO Takashi
Xiang Xiao
parent
7b31315879
commit
048e1aab9c
@ -109,8 +109,7 @@
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# define ILI93414WS_BAUD_DIVISOR 256
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#endif
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/*
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* Permitted clock delay for a pixel transmission from the LCD gram.
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/* Permitted clock delay for a pixel transmission from the LCD gram.
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* Calculated by cpu clock / (spi clock / baud divisor)
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*/
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@ -126,9 +125,10 @@
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#define ILI93414WS_SPI_SR (ILI93414WS_SPI_BASE + STM32_SPI_SR_OFFSET)
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#define ILI93414WS_SPI_DR (ILI93414WS_SPI_BASE + STM32_SPI_DR_OFFSET)
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/* Activates the usage of the spi interface structure if several active devices
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* connected on the SPI5 bus, e.g. LCD Display, MEMS. This will perform locking
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* of the spi bus by SPI_LOCK at each selection of the SPI5 device.
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/* Activates the usage of the spi interface structure if several active
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* devices connected on the SPI5 bus, e.g. LCD Display, MEMS. This will
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* perform locking of the spi bus by SPI_LOCK at each selection of the SPI5
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* device.
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*/
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#ifdef CONFIG_STM32_SPI5
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@ -474,20 +474,19 @@ static int stm32_ili93414ws_sendblock(FAR struct ili93414ws_lcd_s *lcd,
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{
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/* 8-bit spi mode */
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const uint8_t *src = (const uint8_t*)wd;
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uint8_t word;
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const uint8_t *src = (const uint8_t *)wd;
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uint8_t word;
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while (nwords-- > 0)
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{
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word = *src++;
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stm32_ili93414ws_sndword((uint16_t)word);
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}
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}
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/* Wait until transmit is not busy after the last word is transmitted, marked
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* by the BSY flag in the cr1 register. This is necessary if entering in halt
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* mode or disable the spi periphery.
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/* Wait until transmit is not busy after the last word is transmitted,
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* marked by the BSY flag in the cr1 register. This is necessary if
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* entering in halt mode or disable the spi periphery.
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*/
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while ((getreg16(ILI93414WS_SPI_SR) & SPI_SR_BSY) != 0);
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@ -526,9 +525,9 @@ static uint16_t stm32_ili93414ws_recvword(void)
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* immediately after enabling it. If the pixel data stream is interrupted
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* during receiving, a synchronized transfer can not ensure. Especially on
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* higher frequency it can happen that the interrupted driver isn't fast
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* enough to stop transmitting by disabling the spi device. So pixels lost but
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* not recognized by the driver. This results in a big lock because the driver
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* wants to receive missing pixel data.
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* enough to stop transmitting by disabling the spi device. So pixels lost
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* but not recognized by the driver. This results in a big lock because
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* the driver wants to receive missing pixel data.
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* The critical section here ensures that the spi device is disabled fast
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* enough during a pixel is transmitted.
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*/
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@ -541,9 +540,10 @@ static uint16_t stm32_ili93414ws_recvword(void)
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/* Enable spi device followed by disable the spi device.
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*
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* Ensure that the spi is disabled within 8 or 16 spi clock cycles depending
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* on the configured spi bit mode. This is necessary to prevent that the next
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* data word is transmitted by the slave before the RX buffer is cleared.
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* Ensure that the spi is disabled within 8 or 16 spi clock cycles
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* depending on the configured spi bit mode. This is necessary to prevent
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* that the next data word is transmitted by the slave before the RX
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* buffer is cleared.
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* Otherwise the RX buffer will be overwritten.
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*
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* Physically the spi clock is disabled after the current 8/16 clock cycles
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@ -562,12 +562,13 @@ static uint16_t stm32_ili93414ws_recvword(void)
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leave_critical_section(flags);
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/* Waits until the RX buffer is filled with the received data word signalized
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* by the spi hardware through the RXNE flag.
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/* Waits until the RX buffer is filled with the received data word
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* signalized by the spi hardware through the RXNE flag.
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* A busy loop is preferred against interrupt driven receiving method here
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* because this happened fairly often. Also we have to ensure to avoid a big
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* lock if the lcd driver doesn't send data anymore.
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* A latency of CPU clock / SPI clock * 16 SPI clocks should be enough here.
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* because this happened fairly often. Also we have to ensure to avoid a
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* big lock if the lcd driver doesn't send data anymore.
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* A latency of CPU clock / SPI clock * 16 SPI clocks should be enough
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* here.
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*/
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for (n = 0; n < ILI93414WS_RECV_CLK * 16; n++)
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@ -634,9 +635,11 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
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/* Discard the first 8 bit dummy */
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/* 00000000 RRRRRR00 */
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w1 = stm32_ili93414ws_recvword();
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/* GGGGGG00 BBBBBB00 */
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w2 = stm32_ili93414ws_recvword();
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*dest++ = (((w1 << 8) & 0xf800) |
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@ -696,7 +699,10 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
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while (nwords--)
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{
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uint8_t r, g, b;
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uint8_t r;
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uint8_t g;
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uint8_t b;
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r = (uint8_t)(stm32_ili93414ws_recvword() >> 3);
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g = (uint8_t)(stm32_ili93414ws_recvword() >> 2);
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b = (uint8_t)(stm32_ili93414ws_recvword() >> 3);
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@ -708,7 +714,7 @@ static int stm32_ili93414ws_recvblock(FAR struct ili93414ws_lcd_s *lcd,
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{
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/* 8-bit mode */
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uint8_t *dest = (uint8_t*)wd;
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uint8_t *dest = (uint8_t *)wd;
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while (nwords--)
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{
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@ -792,19 +798,18 @@ static void stm32_ili93414ws_spiconfig(FAR struct ili9341_lcd_s *lcd)
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FAR struct ili93414ws_lcd_s *priv = (FAR struct ili93414ws_lcd_s *)lcd;
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irqstate_t flags;
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uint16_t clrbitscr1 = SPI_CR1_CPHA|SPI_CR1_CPOL|SPI_CR1_BR_MASK|
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SPI_CR1_CRCEN|SPI_CR1_LSBFIRST|SPI_CR1_RXONLY|
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uint16_t clrbitscr1 = SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_BR_MASK |
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SPI_CR1_CRCEN | SPI_CR1_LSBFIRST | SPI_CR1_RXONLY |
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SPI_CR1_DFF;
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uint16_t setbitscr1 = SPI_CR1_BIDIOE|SPI_CR1_BIDIMODE|SPI_CR1_MSTR|
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SPI_CR1_SSI|SPI_CR1_SSM|ILI93414WS_SPI_BR;
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uint16_t setbitscr1 = SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE | SPI_CR1_MSTR |
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SPI_CR1_SSI | SPI_CR1_SSM | ILI93414WS_SPI_BR;
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uint16_t clrbitscr2 = SPI_CR2_TXEIE|SPI_CR2_RXNEIE|SPI_CR2_ERRIE|
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SPI_CR2_FRF|SPI_CR2_SSOE;
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uint16_t clrbitscr2 = SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE |
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SPI_CR2_FRF | SPI_CR2_SSOE;
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uint16_t setbitscr2 = 0;
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flags = enter_critical_section();
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/* Disable spi */
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@ -817,8 +822,8 @@ static void stm32_ili93414ws_spiconfig(FAR struct ili9341_lcd_s *lcd)
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#ifdef ILI93414WS_SPI
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/* Backup cr1 and cr2 register to be sure they will be usable
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* by default spi interface. Disable spi device here is necessary at the time
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* restoring the register during deselection.
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* by default spi interface. Disable spi device here is necessary at the
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* time restoring the register during deselection.
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*/
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priv->cr2 = getreg16(ILI93414WS_SPI_CR2);
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@ -887,7 +892,8 @@ static inline void stm32_ili93414ws_cmddata(
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*
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****************************************************************************/
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static int stm32_ili93414ws_backlight(FAR struct ili9341_lcd_s *lcd, int level)
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static int stm32_ili93414ws_backlight(FAR struct ili9341_lcd_s *lcd,
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int level)
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{
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return OK;
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}
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@ -1104,7 +1110,7 @@ static int stm32_ili93414ws_recvparam(FAR struct ili9341_lcd_s *lcd,
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#endif
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lcdinfo("param=%04x\n", param);
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return stm32_ili93414ws_recvblock(priv, (uint16_t*)param, 1);
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return stm32_ili93414ws_recvblock(priv, (uint16_t *)param, 1);
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}
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/****************************************************************************
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@ -1147,8 +1153,8 @@ static int stm32_ili93414ws_recvgram(FAR struct ili9341_lcd_s *lcd,
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*
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* Returned Value:
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* On success, this function returns a reference to the LCD control object
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* for the specified ILI9341 LCD Single chip driver connected as 4 wire serial
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* (spi). NULL is returned on any failure.
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* for the specified ILI9341 LCD Single chip driver connected as 4 wire
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* serial (spi). NULL is returned on any failure.
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*
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****************************************************************************/
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@ -1194,7 +1200,7 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void)
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/* Enable spi bus */
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regval= getreg32(STM32_RCC_APB2ENR);
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regval = getreg32(STM32_RCC_APB2ENR);
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regval |= RCC_APB2ENR_SPI5EN;
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putreg32(regval, STM32_RCC_APB2ENR);
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@ -1217,7 +1223,6 @@ FAR struct ili9341_lcd_s *stm32_ili93414ws_initialize(void)
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priv->dev.recvgram = stm32_ili93414ws_recvgram;
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priv->dev.backlight = stm32_ili93414ws_backlight;
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/* Configure to bidirectional transfer mode */
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lcdinfo("Configure spi device %d to bidirectional transfer mode\n",
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