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@ -10,22 +10,48 @@ comment "ESP32-S2 Configuration Options"
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choice
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prompt "ESP32-S2 Chip Selection"
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default ARCH_CHIP_ESP32S2WROVER
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depends on ARCH_CHIP_ESP32S2
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config ARCH_CHIP_ESP32S2WROVER
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bool "ESP32-S2-WROVER"
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select ESP32S2_ESP32S2DXWDXX
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select ESP32S2_FLASH_4M
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select ESP32S2_PSRAM_8M
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select ESP32S2_PSRAM_2M
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---help---
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Generic module with an embedded ESP32-S2
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endchoice # ESP32S2 Chip Selection
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endchoice # ESP32-S2 Chip Selection
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choice
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prompt "Instruction CACHE Size"
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choice ESP32S2_DEFAULT_CPU_FREQ
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prompt "CPU Frequency"
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default ESP32S2_DEFAULT_CPU_FREQ_240
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---help---
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CPU frequency to be set on application startup.
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config ESP32S2_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32S2_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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config ESP32S2_DEFAULT_CPU_FREQ_240
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bool "240 MHz"
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endchoice # CPU Frequency
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config ESP32S2_DEFAULT_CPU_FREQ_MHZ
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int
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default 80 if ESP32S2_DEFAULT_CPU_FREQ_80
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default 160 if ESP32S2_DEFAULT_CPU_FREQ_160
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default 240 if ESP32S2_DEFAULT_CPU_FREQ_240
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menu "Cache Configuration"
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choice ESP32S2_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S2_INSTRUCTION_CACHE_8KB
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depends on ARCH_CHIP_ESP32S2
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---help---
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Instruction cache size to be set on application startup.
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If you use 8KB instruction cache rather than 16KB instruction cache,
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then the other 8KB will be managed by heap allocator.
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config ESP32S2_INSTRUCTION_CACHE_8KB
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bool "8KB"
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@ -37,12 +63,41 @@ config ESP32S2_INSTRUCTION_CACHE_16KB
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---help---
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Use 16KB of SRAM as Instruction Cache
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endchoice # ESP32S2 Instruction CACHE size
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endchoice # Instruction cache size
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choice
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prompt "Data CACHE Size"
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default ESP32S2_DATA_CACHE_8KB
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depends on ARCH_CHIP_ESP32S2
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config ESP32S2_INSTRUCTION_CACHE_SIZE
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hex
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default 0x2000 if ESP32S2_INSTRUCTION_CACHE_8KB
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default 0x4000 if ESP32S2_INSTRUCTION_CACHE_16KB
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choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S2_INSTRUCTION_CACHE_LINE_32B
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---help---
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Instruction cache line size to be set on application startup.
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config ESP32S2_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S2_INSTRUCTION_CACHE_16KB
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config ESP32S2_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S2_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S2_INSTRUCTION_CACHE_LINE_32B
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choice ESP32S2_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S2_DATA_CACHE_0KB
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---help---
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Data cache size to be set on application startup.
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If you use 0KB data cache, the other 16KB will be added to the heap.
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If you use 8KB data cache rather than 16KB data cache, the other 8KB
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will be added to the heap.
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config ESP32S2_DATA_CACHE_0KB
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bool "No DATA CACHE"
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@ -59,11 +114,34 @@ config ESP32S2_DATA_CACHE_16KB
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---help---
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Use 16KB of SRAM as Data Cache
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endchoice # ESP32S2 Data CACHE size
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endchoice # Data cache size
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config ESP32S2_SINGLE_CPU
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bool
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default y
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config ESP32S2_DATA_CACHE_SIZE
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hex
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default 0x0 if ESP32S2_DATA_CACHE_0KB
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default 0x2000 if ESP32S2_DATA_CACHE_8KB
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default 0x4000 if ESP32S2_DATA_CACHE_16KB
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choice ESP32S2_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S2_DATA_CACHE_LINE_32B
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---help---
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Data cache line size to be set on application startup.
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config ESP32S2_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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config ESP32S2_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S2_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S2_DATA_CACHE_LINE_16B
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default 32 if ESP32S2_DATA_CACHE_LINE_32B
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endmenu # Cache Configuration
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config ESP32S2_FLASH_2M
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bool
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@ -77,7 +155,7 @@ config ESP32S2_FLASH_8M
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bool
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default n
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config ESP32S2_FLASH_16M
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config ESP32S2_PSRAM_2M
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bool
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default n
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@ -97,16 +175,6 @@ config ESP32S2_FLASH_DETECT
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---help---
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Auto detect flash size when flashing.
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config ESP32S2_PSRAM_8M
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bool
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default n
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config ESP32S2_ESP32S2SXWDXX
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bool
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default n
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select ESP32S2_SINGLE_CPU
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select ARCH_HAVE_I2CRESET
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choice ESP32S2_FLASH_MODE
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prompt "SPI FLASH mode"
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default ESP32S2_FLASH_MODE_DIO
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@ -127,7 +195,7 @@ choice ESP32S2_FLASH_MODE
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config ESP32S2_FLASH_MODE_QOUT
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bool "Quad Output (QOUT)"
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endchoice # ESP32S2_FLASH_MODE
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endchoice # SPI FLASH mode
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choice ESP32S2_FLASH_FREQ
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prompt "SPI FLASH frequency"
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@ -147,44 +215,7 @@ choice ESP32S2_FLASH_FREQ
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config ESP32S2_FLASH_FREQ_20M
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bool "20 MHz"
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endchoice # ESP32S2_FLASH_FREQ
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choice ESP32S2_DEFAULT_CPU_FREQ
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prompt "CPU frequency"
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default ESP32S2_DEFAULT_CPU_FREQ_240
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---help---
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CPU frequency to be set on application startup.
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config ESP32S2_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32S2_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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config ESP32S2_DEFAULT_CPU_FREQ_240
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bool "240 MHz"
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endchoice # CPU frequency
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config ESP32S2_DEFAULT_CPU_FREQ_MHZ
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int
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default 80 if ESP32S2_DEFAULT_CPU_FREQ_80
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default 160 if ESP32S2_DEFAULT_CPU_FREQ_160
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default 240 if ESP32S2_DEFAULT_CPU_FREQ_240
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choice
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prompt "On-board Crystal Frequency"
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default ESP32S2_XTAL_40MZ
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config ESP32S2_XTAL_40MZ
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bool "40MHz"
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config ESP32S2_XTAL_26MHz
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bool "26MHz"
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endchoice # On-board Crystal Frequency
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config ESP32S2_RT_TIMER
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bool "Real-time Timer"
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select ESP32S2_TIMER
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default n
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endchoice # SPI FLASH frequency
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config ESP32S2_RUN_IRAM
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bool "Run from IRAM"
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@ -207,112 +238,16 @@ config ESP32S2_WDT
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bool
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default n
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config ESP32S2_BT
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bool "Bluetooth"
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default n
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depends on EXPERIMENTAL
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---help---
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No yet implemented
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config ESP32S2_EFUSE
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bool "EFUSE support"
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default n
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---help---
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Enable ESP32S2 efuse support.
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config ESP32S2_I2C
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bool
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default n
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config ESP32S2_I2S0
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bool "I2S 0"
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default n
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depends on EXPERIMENTAL
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---help---
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No yet implemented
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config ESP32S2_LEDC
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bool "LED PWM (LEDC)"
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default n
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depends on EXPERIMENTAL
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---help---
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No yet implemented
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config ESP32S2_PCNT
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bool "Pulse Count Module (PCNT)"
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default n
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depends on EXPERIMENTAL
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---help---
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No yet implemented
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config ESP32S2_RMT
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bool "Remote Control Module (RMT)"
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default n
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depends on EXPERIMENTAL
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---help---
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No yet implemented
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config ESP32S2_RNG
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bool "Random Number Generator (RNG)"
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default n
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select ARCH_HAVE_RNG
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---help---
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ESP32S2 supports a RNG that passed on Dieharder test suite.
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config ESP32S2_SPI
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bool
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default n
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ESP32-S2 supports a RNG that passed on Dieharder test suite.
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config ESP32S2_SPIFLASH
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bool "SPI Flash"
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default n
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select MTD
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select MTD_BYTE_WRITE
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select MTD_PARTITION
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config ESP32S2_SPI2
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bool "SPI 2"
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default n
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select ESP32S2_SPI
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select ESP32S2_GPIO_IRQ
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select SPI
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config ESP32S2_SPI3
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bool "SPI 3"
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default n
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select ESP32S2_SPI
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select ESP32S2_GPIO_IRQ
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select SPI
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config ESP32S2_SPIRAM
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bool "SPI RAM Support"
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default n
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select ARCH_HAVE_HEAP2
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select XTENSA_IMEM_USE_SEPARATE_HEAP
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if ESP32S2_SPIRAM && SMP
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choice
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prompt "How does SPIRAM share cache?"
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default ESP32S2_MEMMAP_SPIRAM_CACHE_EVENODD
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---help---
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Selects the cache mode to CPU access the external memory.
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config ESP32S2_MEMMAP_SPIRAM_CACHE_EVENODD
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bool "Pro CPU uses even 32 byte ranges, App uses odd ones"
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config ESP32S2_MEMMAP_SPIRAM_CACHE_LOWHIGH
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bool "Pro CPU uses low 2MB ranges, App uses high ones"
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endchoice # CPU frequency
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endif
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config XTENSA_TIMER1
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bool "Xtensa Timer 1"
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default n
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config XTENSA_TIMER2
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bool "Xtensa Timer 2"
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default n
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config ESP32S2_TIMER0
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bool "64-bit Timer 0 (Group 0 Timer 0)"
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@ -383,39 +318,15 @@ config ESP32S2_UART1
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select UART1_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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config ESP32S2_WIRELESS
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bool "Wireless"
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default n
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select NET
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select ARCH_PHY_INTERRUPT
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select ESP32S2_RNG
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|
|
|
select ESP32S2_RT_TIMER
|
|
|
|
|
select ESP32S2_TIMER0
|
|
|
|
|
---help---
|
|
|
|
|
Enable Wireless support
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C0
|
|
|
|
|
bool "I2C 0"
|
|
|
|
|
default n
|
|
|
|
|
select ESP32S2_I2C
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C1
|
|
|
|
|
bool "I2C 1"
|
|
|
|
|
default n
|
|
|
|
|
select ESP32S2_I2C
|
|
|
|
|
|
|
|
|
|
config ESP32S2_AES_ACCELERATOR
|
|
|
|
|
bool "AES Accelerator"
|
|
|
|
|
config ESP32S2_RT_TIMER
|
|
|
|
|
bool "Real-time Timer"
|
|
|
|
|
select ESP32S2_TIMER
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
endmenu # ESP32S2 Peripheral Selection
|
|
|
|
|
endmenu # ESP32-S2 Peripheral Selection
|
|
|
|
|
|
|
|
|
|
menu "Memory Configuration"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_BT_RESERVE_DRAM
|
|
|
|
|
int "Reserved BT DRAM"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config ESP32S2_TRACEMEM_RESERVE_DRAM
|
|
|
|
|
int "Reserved trace memory DRAM"
|
|
|
|
|
default 0
|
|
|
|
|
@ -429,9 +340,9 @@ endmenu # Memory Configuration
|
|
|
|
|
config ESP32S2_GPIO_IRQ
|
|
|
|
|
bool "GPIO pin interrupts"
|
|
|
|
|
---help---
|
|
|
|
|
Enable support for interrupting GPIO pins
|
|
|
|
|
Enable support for interrupting GPIO pins.
|
|
|
|
|
|
|
|
|
|
menu "UART configuration"
|
|
|
|
|
menu "UART Configuration"
|
|
|
|
|
depends on ESP32S2_UART
|
|
|
|
|
|
|
|
|
|
if ESP32S2_UART0
|
|
|
|
|
@ -486,135 +397,9 @@ config ESP32S2_UART1_CTSPIN
|
|
|
|
|
|
|
|
|
|
endif # ESP32S2_UART1
|
|
|
|
|
|
|
|
|
|
endmenu # UART configuration
|
|
|
|
|
endmenu # UART Configuration
|
|
|
|
|
|
|
|
|
|
menu "I2C configuration"
|
|
|
|
|
depends on ESP32S2_I2C
|
|
|
|
|
|
|
|
|
|
if ESP32S2_I2C0
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C0_SCLPIN
|
|
|
|
|
int "I2C0 SCL Pin"
|
|
|
|
|
default 22
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C0_SDAPIN
|
|
|
|
|
int "I2C0 SDA Pin"
|
|
|
|
|
default 23
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
endif # ESP32S2_I2C0
|
|
|
|
|
|
|
|
|
|
if ESP32S2_I2C1
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C1_SCLPIN
|
|
|
|
|
int "I2C1 SCL Pin"
|
|
|
|
|
default 26
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_I2C1_SDAPIN
|
|
|
|
|
int "I2C1 SDA Pin"
|
|
|
|
|
default 25
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
endif # ESP32S2_I2C1
|
|
|
|
|
|
|
|
|
|
endmenu # I2C configuration
|
|
|
|
|
|
|
|
|
|
menu "SPI configuration"
|
|
|
|
|
depends on ESP32S2_SPI
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI_SWCS
|
|
|
|
|
bool "SPI software CS"
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
Use SPI software CS.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI_UDCS
|
|
|
|
|
bool "User defined CS"
|
|
|
|
|
default n
|
|
|
|
|
depends on ESP32S2_SPI_SWCS
|
|
|
|
|
---help---
|
|
|
|
|
Use user defined CS.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI2_DMA
|
|
|
|
|
bool "SPI2 use DMA"
|
|
|
|
|
default y
|
|
|
|
|
depends on ESP32S2_SPI2
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI3_DMA
|
|
|
|
|
bool "SPI3 use DMA"
|
|
|
|
|
default y
|
|
|
|
|
depends on ESP32S2_SPI3
|
|
|
|
|
|
|
|
|
|
config SPI_DMADESC_NUM
|
|
|
|
|
int "SPI master DMA description number"
|
|
|
|
|
default 2
|
|
|
|
|
|
|
|
|
|
config SPI_SLAVE_BUFSIZE
|
|
|
|
|
int "SPI slave buffer size"
|
|
|
|
|
default 2048
|
|
|
|
|
depends on SPI_SLAVE
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI_DMATHRESHOLD
|
|
|
|
|
int "SPI DMA threshold"
|
|
|
|
|
default 64
|
|
|
|
|
depends on ESP32S2_SPI2_DMA || ESP32S2_SPI3_DMA
|
|
|
|
|
---help---
|
|
|
|
|
When SPI DMA is enabled, DMA transfers whose size are below the
|
|
|
|
|
defined threshold will be performed by polling logic.
|
|
|
|
|
|
|
|
|
|
if ESP32S2_SPI2
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI2_CSPIN
|
|
|
|
|
int "SPI2 CS Pin"
|
|
|
|
|
default 15
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI2_CLKPIN
|
|
|
|
|
int "SPI2 CLK Pin"
|
|
|
|
|
default 14
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI2_MOSIPIN
|
|
|
|
|
int "SPI2 MOSI Pin"
|
|
|
|
|
default 13
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI2_MISOPIN
|
|
|
|
|
int "SPI2 MISO Pin"
|
|
|
|
|
default 12
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
endif # ESP32S2_SPI2
|
|
|
|
|
|
|
|
|
|
if ESP32S2_SPI3
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI3_CSPIN
|
|
|
|
|
int "SPI3 CS Pin"
|
|
|
|
|
default 5
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI3_CLKPIN
|
|
|
|
|
int "SPI3 CLK Pin"
|
|
|
|
|
default 18
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI3_MOSIPIN
|
|
|
|
|
int "SPI3 MOSI Pin"
|
|
|
|
|
default 23
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPI3_MISOPIN
|
|
|
|
|
int "SPI3 MISO Pin"
|
|
|
|
|
default 19
|
|
|
|
|
range 0 39
|
|
|
|
|
|
|
|
|
|
endif # ESP32S2_SPI3
|
|
|
|
|
|
|
|
|
|
endmenu # ESP32S2_SPI
|
|
|
|
|
|
|
|
|
|
menu "SPI Flash configuration"
|
|
|
|
|
menu "SPI Flash Configuration"
|
|
|
|
|
depends on ESP32S2_SPIFLASH
|
|
|
|
|
|
|
|
|
|
if ESP32S2_HAVE_OTA_PARTITION
|
|
|
|
|
@ -655,219 +440,9 @@ config ESP32S2_OTA_SCRATCH_DEVPATH
|
|
|
|
|
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
comment "General storage MTD configuration"
|
|
|
|
|
endmenu # SPI Flash Configuration
|
|
|
|
|
|
|
|
|
|
config ESP32S2_STORAGE_MTD_OFFSET
|
|
|
|
|
hex "Storage MTD base address in SPI Flash"
|
|
|
|
|
default 0x180000 if !ESP32S2_HAVE_OTA_PARTITION
|
|
|
|
|
default 0x250000 if ESP32S2_HAVE_OTA_PARTITION
|
|
|
|
|
---help---
|
|
|
|
|
MTD base address in SPI Flash.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_STORAGE_MTD_SIZE
|
|
|
|
|
hex "Storage MTD size in SPI Flash"
|
|
|
|
|
default 0x100000
|
|
|
|
|
---help---
|
|
|
|
|
MTD size in SPI Flash.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIFLASH_DEBUG
|
|
|
|
|
bool "Debug SPI Flash"
|
|
|
|
|
default n
|
|
|
|
|
depends on DEBUG_FS_INFO
|
|
|
|
|
---help---
|
|
|
|
|
Enable this option, read and write of SPI Flash
|
|
|
|
|
will show input arguments and result.
|
|
|
|
|
|
|
|
|
|
endmenu # SPI Flash configuration
|
|
|
|
|
|
|
|
|
|
menu "SPI RAM Config"
|
|
|
|
|
depends on ESP32S2_SPIRAM
|
|
|
|
|
|
|
|
|
|
choice ESP32S2_SPIRAM_TYPE
|
|
|
|
|
prompt "Type of SPI RAM chip in use"
|
|
|
|
|
default ESP32S2_SPIRAM_TYPE_AUTO
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_TYPE_AUTO
|
|
|
|
|
bool "Auto-detect"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_TYPE_ESPPSRAM32
|
|
|
|
|
bool "ESP-PSRAM32 or IS25WP032"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_TYPE_ESPPSRAM64
|
|
|
|
|
bool "ESP-PSRAM64 or LY68L6400"
|
|
|
|
|
endchoice #ESP32S2_SPIRAM_TYPE
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_SIZE
|
|
|
|
|
int
|
|
|
|
|
default -1 if ESP32S2_SPIRAM_TYPE_AUTO
|
|
|
|
|
default 4194304 if ESP32S2_SPIRAM_TYPE_ESPPSRAM32
|
|
|
|
|
default 8388608 if ESP32S2_SPIRAM_TYPE_ESPPSRAM64
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
choice ESP32S2_SPIRAM_SPEED
|
|
|
|
|
prompt "Set RAM clock speed"
|
|
|
|
|
default ESP32S2_SPIRAM_SPEED_40M
|
|
|
|
|
---help---
|
|
|
|
|
Select the speed for the SPI RAM chip.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_SPEED_40M
|
|
|
|
|
bool "40MHz clock speed"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_SPEED_80M
|
|
|
|
|
bool "80MHz clock speed"
|
|
|
|
|
|
|
|
|
|
endchoice # ESP32S2_SPIRAM_SPEED
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_BOOT_INIT
|
|
|
|
|
bool "Initialize SPI RAM during startup"
|
|
|
|
|
depends on ESP32S2_SPIRAM
|
|
|
|
|
default "y"
|
|
|
|
|
---help---
|
|
|
|
|
If this is enabled, the SPI RAM will be enabled during initial
|
|
|
|
|
boot. Unless you have specific requirements, you'll want to leave
|
|
|
|
|
this enabled so memory allocated during boot-up can also be
|
|
|
|
|
placed in SPI RAM.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_IGNORE_NOTFOUND
|
|
|
|
|
bool "Ignore PSRAM when not found"
|
|
|
|
|
default "n"
|
|
|
|
|
depends on ESP32S2_SPIRAM_BOOT_INIT && !BOOT_SDRAM_DATA
|
|
|
|
|
---help---
|
|
|
|
|
Normally, if psram initialization is enabled during compile time
|
|
|
|
|
but not found at runtime, it is seen as an error making the CPU
|
|
|
|
|
panic. If this is enabled, booting will complete but no PSRAM
|
|
|
|
|
will be available.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_2T_MODE
|
|
|
|
|
bool "Enable SPI PSRAM 2T mode"
|
|
|
|
|
depends on ESP32S2_SPIRAM
|
|
|
|
|
default "n"
|
|
|
|
|
---help---
|
|
|
|
|
Enable this option to fix single bit errors inside 64Mbit PSRAM.
|
|
|
|
|
Some 64Mbit PSRAM chips have a hardware issue in the RAM which
|
|
|
|
|
causes bit errors at multiple fixed bit positions.
|
|
|
|
|
Note: If this option is enabled, the 64Mbit PSRAM chip will appear
|
|
|
|
|
to be 32Mbit in size.
|
|
|
|
|
Applications will not be affected unless the use the esp_himem
|
|
|
|
|
APIs, which are not supported in 2T mode.
|
|
|
|
|
|
|
|
|
|
config ESP32S2_SPIRAM_BANKSWITCH_ENABLE
|
|
|
|
|
bool "Enable bank switching for >4MiB external RAM"
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
The ESP32S2 only supports 4MiB of external RAM in its address
|
|
|
|
|
space. The hardware does support larger memories, but these
|
|
|
|
|
have to be bank-switched in and out of this address space.
|
|
|
|
|
Enabling this allows you to reserve some MMU pages for this,
|
|
|
|
|
which allows the use of the esp_himem api to manage these
|
|
|
|
|
banks.
|
|
|
|
|
#Note that this is limited to 62 banks, as
|
|
|
|
|
#esp_spiram_writeback_cache needs some kind of mapping of
|
|
|
|
|
#some banks below that mark to work. We cannot at this
|
|
|
|
|
#moment guarantee this to exist when himem is enabled.
|
|
|
|
|
If spiram 2T mode is enabled, the size of 64Mbit psram will
|
|
|
|
|
be changed as 32Mbit, so himem will be unusable.
|
|
|
|
|
|
|
|
|
|
config SPIRAM_BANKSWITCH_RESERVE
|
|
|
|
|
int "Amount of 32K pages to reserve for bank switching"
|
|
|
|
|
depends on ESP32S2_SPIRAM_BANKSWITCH_ENABLE
|
|
|
|
|
default 8
|
|
|
|
|
range 1 62
|
|
|
|
|
---help---
|
|
|
|
|
Select the amount of banks reserved for bank switching. Note
|
|
|
|
|
that the amount of RAM allocatable with malloc will decrease
|
|
|
|
|
by 32K for each page reserved here.
|
|
|
|
|
Note that this reservation is only actually done if your
|
|
|
|
|
program actually uses the himem API. Without any himem
|
|
|
|
|
calls, the reservation is not done and the original amount
|
|
|
|
|
of memory will be available.
|
|
|
|
|
|
|
|
|
|
endmenu #SPI RAM Config
|
|
|
|
|
|
|
|
|
|
menu "Wi-Fi configuration"
|
|
|
|
|
depends on ESP32S2_WIRELESS
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "ESP32-S2 Wi-Fi mode"
|
|
|
|
|
default ESP32S2_WIFI_STATION
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_STATION
|
|
|
|
|
bool "Station mode"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_SOFTAP
|
|
|
|
|
bool "SoftAP mode"
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_STATION_SOFTAP_COEXISTENCE
|
|
|
|
|
bool "Station + SoftAP coexistence"
|
|
|
|
|
|
|
|
|
|
endchoice # ESP32S2 Wi-Fi mode
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_STATIC_RXBUF_NUM
|
|
|
|
|
int "Wi-Fi static RX buffer number"
|
|
|
|
|
default 10
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_DYNAMIC_RXBUF_NUM
|
|
|
|
|
int "Wi-Fi dynamic RX buffer number"
|
|
|
|
|
default 32
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_DYNAMIC_TXBUF_NUM
|
|
|
|
|
int "Wi-Fi dynamic TX buffer number"
|
|
|
|
|
default 32
|
|
|
|
|
|
|
|
|
|
config ESP32S2_WIFI_TX_AMPDU
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bool "Wi-Fi TX AMPDU"
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default y
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config ESP32S2_WIFI_RX_AMPDU
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bool "Wi-Fi RX AMPDU"
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default y
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config ESP32S2_WIFI_RXBA_AMPDU_WZ
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int "Wi-Fi RX BA AMPDU windown size"
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default 6
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config ESP32S2_WLAN_PKTBUF_NUM
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int "WLAN netcard packet buffer number per netcard"
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default 16
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config ESP32S2_WIFI_CONNECT_TIMEOUT
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int "Connect timeout by second"
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default 10
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---help---
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Max waiting time of connecting to AP.
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config ESP32S2_WIFI_SCAN_RESULT_SIZE
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int "Scan result buffer"
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default 4096
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---help---
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Maximum scan result buffer size.
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config ESP32S2_WIFI_SAVE_PARAM
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bool "Save Wi-Fi Parameters"
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default n
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---help---
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If you enable this option, Wi-Fi adapter parameters will be saved
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into the file system instead of computing them each time.
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These parameters mainly contains:
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- SSID
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- Password
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- BSSID
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- PMK(compute when connecting)
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- Author mode
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- MAC address
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- Wi-Fi hardware configuration parameters
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config ESP32S2_WIFI_FS_MOUNTPT
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string "Wi-Fi parameters mount point"
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default "/mnt/esp/wifi"
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depends on ESP32S2_WIFI_SAVE_PARAM
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---help---
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Mount point of Wi-Fi storage file system.
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endmenu # ESP32S2_WIRELESS
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menu "Real-Time Timer"
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menu "Real-Time Timer Configuration"
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depends on ESP32S2_RT_TIMER
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config ESP32S2_RT_TIMER_TASK_NAME
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@ -882,10 +457,10 @@ config ESP32S2_RT_TIMER_TASK_STACK_SIZE
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int "Timer task stack size"
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default 2048
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endmenu # Real-Time Timer
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endmenu # Real-Time Timer Configuration
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if ESP32S2_TIMER
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menu "Timer/counter Configuration"
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menu "Timer/Counter Configuration"
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depends on ESP32S2_TIMER
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config ESP32S2_ONESHOT
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bool "One-shot wrapper"
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@ -901,8 +476,7 @@ config ESP32S2_FREERUN
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Enable a wrapper around the low level timer/counter functions to
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support freerun timer.
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endmenu # Timer/counter Configuration
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endif # ESP32S2_TIMER
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endmenu # Timer/Counter Configuration
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config ESP32S2_HAVE_OTA_PARTITION
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bool
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@ -1001,13 +575,4 @@ source "arch/xtensa/src/esp32s2/Kconfig.security"
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endmenu # Application Image Configuration
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menu "AES accelerate"
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depends on ESP32S2_AES_ACCELERATOR
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config ESP32S2_AES_ACCELERATOR_TEST
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bool "AES driver test"
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default n
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endmenu # ESP32S2_AES_ACCELERATOR
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endif # ARCH_CHIP_ESP32S2
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Gustavo Henrique Nihei
Alan Carvalho de Assis