LPC43 update

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5001 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-08-03 14:57:30 +00:00
parent 8788a658e9
commit 052432c15b
7 changed files with 25 additions and 7 deletions

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@ -901,6 +901,16 @@ Where <subdir> is one of the following:
CONFIG_BOOT_SRAM=y : Executing in SRAM
CONFIG_LPC32_CODEREDW=y : Code Red under Windows
To execute from SRAM, you would need to set:
CONFIG_BOOT_SPIFI=y : Executing from SPIFI
CONFIG_DRAM_SIZE=(128*1024) : SRAM Bank0 size
CONFIG_DRAM_START=0x10000000 : SRAM Bank0 base address
CONFIG_SPIFI_OFFSET=(128*1024) : SPIFI file system offset
CONFIG_MM_REGIONS should also be increased if you want to other SRAM banks
to the memory pool.
This configuration has some special options that can be used to
create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
must also be defined to enable SPIFI setup support:
@ -923,7 +933,7 @@ Where <subdir> is one of the following:
CONFIG_SPIFI_READONLY - Define to support only read-only operations.
CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead,
use an external library implementation of the SPIFI interface.
CONFIG_SPIFI_VERIFY - Verify all spi_program() operations by reading
CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading
from the SPI address space after each write.
CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
probably do not want to enable this unless you want to dig through a

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@ -193,7 +193,7 @@
#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY
#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL
#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY
#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY
#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL
#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY
@ -266,6 +266,14 @@
#define PINCONF_U1_TXD PINCONF_U1_TXD_1
#define PINCONF_U1_RXD PINCONF_U1_RXD_1
#define PINCONF_U2_TXD PINCONF_U2_TXD_1
#define PINCONF_U2_RXD PINCONF_U2_RXD_1
#define PINCONF_U2_DIR PINCONF_U2_DIR_1
#define PINCONF_U3_TXD PINCONF_U3_TXD_2
#define PINCONF_U3_RXD PINCONF_U3_RXD_2
#define PINCONF_U3_DIR PINCONF_U3_DIR_2
/****************************************************************************
* Public Types
****************************************************************************/

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@ -104,7 +104,7 @@ ifeq ($(CONFIG_BOOT_SRAM),y)
LDSCRIPT = ramconfig.ld
endif
ifeq ($(CONFIG_BOOT_SPIFI),y)
LDSCRIPT = spiconfig.ld
LDSCRIPT = spificonfig.ld
endif
ifeq ($(CONFIG_BOOT_FLASHA),y)
LDSCRIPT = flashaconfig.ld

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@ -696,7 +696,7 @@ CONFIG_MMCSD_HAVECARDDETECT=n
# CONFIG_SPIFI_READONLY - Define to support only read-only operations.
# CONFIG_SPIFI_LIBRARY - Don't use the LPC43xx ROM routines but, instead,
# use an external library implementation of the SPIFI interface.
# CONFIG_SPIFI_VERIFY - Verify all spi_program() operations by reading
# CONFIG_SPIFI_VERIFY - Verify all spifi_program() operations by reading
# from the SPI address space after each write.
# CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
# probably do not want to enable this unless you want to dig through a

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@ -104,7 +104,7 @@ ifeq ($(CONFIG_BOOT_SRAM),y)
LDSCRIPT = ramconfig.ld
endif
ifeq ($(CONFIG_BOOT_SPIFI),y)
LDSCRIPT = spiconfig.ld
LDSCRIPT = spificonfig.ld
endif
ifeq ($(CONFIG_BOOT_FLASHA),y)
LDSCRIPT = flashaconfig.ld

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@ -1,5 +1,5 @@
/****************************************************************************
* configs/lpc4330-xplorer/scripts/spiconfig.ld
* configs/lpc4330-xplorer/scripts/spificonfig.ld
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

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@ -77,7 +77,7 @@ CSRCS += $(SPIFI_LIB)/spifi_rom_api.c
#CSRCS += $(SPIFI_LIB)/numonyx.c
CSRCS += $(SPIFI_LIB)/spansion.c
#CSRCS += $(SPIFI_LIB)/sst.c
#CSRCS += $(SPIFI_LIB)/winbond.c
CSRCS += $(SPIFI_LIB)/winbond.c
endif
AOBJS = $(ASRCS:.S=$(OBJEXT))