arch/risc-v: Minor style change
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
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0f0f85979e
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052c071867
@ -107,16 +107,16 @@ exception_common:
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#if CONFIG_ARCH_INTERRUPTSTACK > 15
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/* Load mhartid (cpuid) */
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csrr s0, mhartid
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csrr s0, mhartid
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/* Switch to interrupt stack */
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#if IRQ_NSTACKS > 1
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li t0, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
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mul t0, s0, t0
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la s0, g_intstacktop
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sub sp, s0, t0
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li t0, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
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mul t0, s0, t0
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la s0, g_intstacktop
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sub sp, s0, t0
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#else
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la sp, g_intstacktop
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la sp, g_intstacktop
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#endif
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/* Call interrupt handler in C */
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@ -353,9 +353,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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CURRENT_REGS[REG_EPC] = (uintptr_t)riscv_sigdeliver;
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int_ctx = CURRENT_REGS[REG_INT_CTX];
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int_ctx &= ~MSTATUS_MPIE;
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int_ctx &= ~MSTATUS_MPIE;
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#ifndef CONFIG_BUILD_FLAT
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int_ctx |= MSTATUS_MPPM;
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int_ctx |= MSTATUS_MPPM;
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#endif
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CURRENT_REGS[REG_INT_CTX] = int_ctx;
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@ -426,12 +426,12 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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* here.
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*/
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tcb->xcp.regs[REG_EPC] = (uintptr_t)riscv_sigdeliver;
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tcb->xcp.regs[REG_EPC] = (uintptr_t)riscv_sigdeliver;
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int_ctx = tcb->xcp.regs[REG_INT_CTX];
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int_ctx &= ~MSTATUS_MPIE;
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int_ctx = tcb->xcp.regs[REG_INT_CTX];
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int_ctx &= ~MSTATUS_MPIE;
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tcb->xcp.regs[REG_INT_CTX] = int_ctx;
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tcb->xcp.regs[REG_INT_CTX] = int_ctx;
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}
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}
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}
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