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16z: Fix option bits; adjust system clock frequency

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This commit is contained in:
Gregory Nutt 2014-01-23 12:06:57 -06:00
parent fd2dc48a74
commit 0540e4a9e7
7 changed files with 120 additions and 25 deletions
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52
configs/16z/include/board.h
View File

@ -1,5 +1,5 @@
/****************************************************************************
* board/board.h
* configs/16z/include/board.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
****************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
#ifndef __CONFIGS_16Z_INCLUDE_BOARD_H
#define __CONFIGS_16Z_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
@ -44,14 +44,54 @@
* Definitions
****************************************************************************/
/* The 16Z board has a 19.6608MHz crystal. The ZNEO clocking will be
/* The 16Z board has a 18.432MHz crystal. The ZNEO clocking will be
* configured to use this crystal frequency directly as the clock source
*/
#define BOARD_XTAL_FREQUENCY 19660800 /* 19.6608MHz */
#define BOARD_XTAL_FREQUENCY 18432000 /* 18.432MHz */
#define BOARD_CLKSRC 1 /* Clock source = external crystal */
#define BOARD_SYSTEM_FREQUENCY BOARD_XTAL_FREQUENCY
/* Flash option bits
*
* "Each time the option bits are programmed or erased, the device must be
* Reset for the change to take place. During any reset operation .., the
* option bits are automatically read from the Program memory and written
* to Option Configuration registers. ... Option Bit Control Register are
* loaded before the device exits Reset and the ZNEO CPU begins code
* execution. The Option Configuration registers are not part of the
* Register file and are not accessible for read or write access."
*
* "The FLASH3 value of 0x7f is very important because it enables the
* J-port, otherwise used for 16-bit data.
*
* "... in 16z there are some unusual hardware connections. ZNEO
* communicates with 16-bit memory via 8-bit bus and using the 16-bit
* control signals BHE and BLE."
*/
#ifndef __ASSEMBLY__
# define BOARD_FLOPTION0 (Z16F_FLOPTION0_MAXPWR | Z16F_FLOPTION0_WDTRES | \
Z16F_FLOPTION0_WDTA0 | Z16F_FLOPTION0_VBOA0 | \
Z16F_FLOPTION0_DBGUART | Z16F_FLOPTION0_FWP | \
Z16F_FLOPTION0_RP)
# define BOARD_FLOPTION1 (Z16F_FLOPTION1_RESVD | Z16F_FLOPTION1_MCEN | \
Z16F_FLOPTION1_OFFH | Z16F_FLOPTION1_OFFL)
# define BOARD_FLOPTION2 Z16F_FLOPTION2_RESVD
# define BOARD_FLOPTION3 (Z16F_FLOPTION3_RESVD | Z16F_FLOPTION3_NORMAL)
/* The same settings, pre-digested for assembly language */
#else
# define BOARD_FLOPTION0 %ff
# define BOARD_FLOPTION1 %ff
# define BOARD_FLOPTION2 %ff
# define BOARD_FLOPTION3 %7f
#endif
/* LEDs
*
* The 16z board has 7 LEDs, five of which are controllable via software:
@ -134,4 +174,4 @@ extern "C" {
}
#endif
#endif /* __ARCH_BOARD_BOARD_H */
#endif /* __CONFIGS_16Z_INCLUDE_BOARD_H */

4
configs/16z/nsh/nsh.linkcmd
View File

@ -41,7 +41,7 @@ RANGE ROM $000000 : $007FFF
RANGE RAM $FFB000 : $FFBFFF
RANGE IODATA $FFC000 : $FFFFFF
RANGE EROM $008000 : $01FFFF
RANGE ERAM $800000 : $FFFFFF
RANGE ERAM $020000 : $EFFFFF
CHANGE NEAR_TEXT=NEAR_DATA
CHANGE FAR_TEXT=FAR_DATA
@ -70,7 +70,7 @@ define _near_heapbot = top of RAM
define _far_heapbot = top of ERAM
define _SYS_CLK_SRC = 1
define _SYS_CLK_FREQ = 19660800
define _SYS_CLK_FREQ = 18432000
define __EXTCT_INIT_PARAM = $40
define __EXTCS0_INIT_PARAM = $9001

4
configs/16z/ostest/ostest.linkcmd
View File

@ -41,7 +41,7 @@ RANGE ROM $000000 : $007FFF
RANGE RAM $FFB000 : $FFBFFF
RANGE IODATA $FFC000 : $FFFFFF
RANGE EROM $008000 : $01FFFF
RANGE ERAM $800000 : $FFFFFF
RANGE ERAM $020000 : $EFFFFF
CHANGE NEAR_TEXT=NEAR_DATA
CHANGE FAR_TEXT=FAR_DATA
@ -70,7 +70,7 @@ define _near_heapbot = top of RAM
define _far_heapbot = top of ERAM
define _SYS_CLK_SRC = 1
define _SYS_CLK_FREQ = 19660800
define _SYS_CLK_FREQ = 18432000
define __EXTCT_INIT_PARAM = $40
define __EXTCS0_INIT_PARAM = $9001

16
configs/16z/src/z16f_lowinit.c
View File

@ -51,6 +51,10 @@
* Private Functions
***************************************************************************/
/***************************************************************************
* Name: z16f_extcsinit
***************************************************************************/
static void z16f_extcsinit(void)
{
putreg8(0x40, Z16F_EXTCT); /* 8-bit External Bus Interface is enabled (Port E). */
@ -68,6 +72,10 @@ static void z16f_extcsinit(void)
putreg8(0x15, Z16F_EXTCS5L); /* Post Read: 1 wait state; Chip select: 5 wait states */
}
/***************************************************************************
* Name: z16f_gpioinit
***************************************************************************/
static void z16f_gpioinit(void)
{
/* NOTE: Here we assume that all ports are in the default reset state */
@ -249,8 +257,12 @@ static void z16f_gpioinit(void)
* Public Functions
***************************************************************************/
/***************************************************************************
* Name: z16f_lowinit
***************************************************************************/
void z16f_lowinit(void)
{
z16f_extcsinit();
z16f_gpioinit();
z16f_extcsinit(); /* Configure external memory */
z16f_gpioinit(); /* Configure board GPIOs */
}

4
configs/Kconfig
View File

@ -142,6 +142,10 @@ config ARCH_BOARD_EFM32LG_DK3650
This is Energy Micro's development kit for the Leopard
Gecko MCU, which is an ARM Cortex-M3 device.
This port is uses the Energy Micro headers and peripheral drivers
as out of tree sources. In order to compile this, you need to set
ARCH_CHIP_EFM32_EMLIB_PATH to point to the external sources.
config ARCH_BOARD_EKKLM3S9B96
bool "TI/Stellaris EKK-LM3S9B96"
depends on ARCH_CHIP_LM3S9B96

4
configs/README.txt
View File

@ -235,6 +235,10 @@ configs/efm32-dk3650
This is Energy Micro's development kit for the Leopard Gecko MCU, which
is an ARM Cortex-M3 device.
This port is uses the Energy Micro headers and peripheral drivers as out
of tree sources. In order to compile this, you need to set
CONFIG_ARCH_CHIP_EFM32_EMLIB_PATH to point to the external sources.
configs/ekk-lm3s9b96
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
an EKK-LM3S9B96 which is a Cortex-M3.

61
configs/z16f2800100zcog/include/board.h
View File

@ -1,5 +1,5 @@
/****************************************************************************
* board/board.h
* configs/z16f2800100zcog/board.h
*
* Copyright (C) 2008, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,13 +33,15 @@
*
****************************************************************************/
#ifndef __ARCH_BOARD_BOARD_H
#define __ARCH_BOARD_BOARD_H
#ifndef __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H
#define __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "chip.h"
/****************************************************************************
* Definitions
****************************************************************************/
@ -51,6 +53,39 @@
#define BOARD_CLKSRC 1 /* Clock source = external crystal */
#define BOARD_SYSTEM_FREQUENCY BOARD_XTAL_FREQUENCY
/* Flash option bits
*
* "Each time the option bits are programmed or erased, the device must be
* Reset for the change to take place. During any reset operation .., the
* option bits are automatically read from the Program memory and written
* to Option Configuration registers. ... Option Bit Control Register are
* loaded before the device exits Reset and the ZNEO CPU begins code
* execution. The Option Configuration registers are not part of the
* Register file and are not accessible for read or write access."
*/
#ifndef __ASSEMBLY__
# define BOARD_FLOPTION0 (Z16F_FLOPTION0_MAXPWR | Z16F_FLOPTION0_WDTRES | \
Z16F_FLOPTION0_WDTA0 | Z16F_FLOPTION0_VBOA0 | \
Z16F_FLOPTION0_DBGUART | Z16F_FLOPTION0_FWP | \
Z16F_FLOPTION0_RP)
# define BOARD_FLOPTION1 (Z16F_FLOPTION1_RESVD | Z16F_FLOPTION1_MCEN | \
Z16F_FLOPTION1_OFFH | Z16F_FLOPTION1_OFFL)
# define BOARD_FLOPTION2 Z16F_FLOPTION2_RESVD
# define BOARD_FLOPTION3 (Z16F_FLOPTION3_RESVD | Z16F_FLOPTION3_NORMAL | \
Z16F_FLOPTION3_ROMLESS)
/* The same settings, pre-digested for assembly language */
#else
# define BOARD_FLOPTION0 %ff
# define BOARD_FLOPTION1 %ff
# define BOARD_FLOPTION2 %ff
# define BOARD_FLOPTION3 %ff
#endif
/* LED pattern definitions
*
@ -62,15 +97,15 @@
* - Green LED D4 connected to chip port PA2_DE0
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_IDLE 4
#define LED_INIRQ 5
#define LED_SIGNAL 6
#define LED_ASSERTION 7
#define LED_PANIC 8
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_IDLE 4
#define LED_INIRQ 5
#define LED_SIGNAL 6
#define LED_ASSERTION 7
#define LED_PANIC 8
/****************************************************************************
* Public Functions
@ -89,4 +124,4 @@ extern "C" {
}
#endif
#endif /* __ARCH_BOARD_BOARD_H */
#endif /* __CONFIGS_Z16F2800100ZCOG_INCLUDE_BOARD_H */