Make sure that there is one space between while and condition
This commit is contained in:
parent
303cc1902b
commit
056aed1274
@ -67,7 +67,7 @@
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void up_lowputs(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_lowputc(*str++);
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}
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@ -1738,7 +1738,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
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/* Wait until the kernel of the PMECC is not busy */
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while((nand_getreg(SAM_HSMC_PMECCSR) & HSMC_PMECCSR_BUSY) != 0);
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while ((nand_getreg(SAM_HSMC_PMECCSR) & HSMC_PMECCSR_BUSY) != 0);
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return OK;
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}
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#endif
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@ -148,7 +148,7 @@ int up_progmem_erasepage(uint16_t page)
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putreg32(page * STM32_FLASH_PAGESIZE, STM32_FLASH_AR);
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modifyreg32(STM32_FLASH_CR, 0, FLASH_CR_STRT);
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while(getreg32(STM32_FLASH_SR) & FLASH_SR_BSY) up_waste();
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while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY) up_waste();
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modifyreg32(STM32_FLASH_CR, FLASH_CR_PER, 0);
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@ -232,7 +232,7 @@ int up_progmem_write(uint32_t addr, const void *buf, size_t count)
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putreg16(*hword, addr);
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while(getreg32(STM32_FLASH_SR) & FLASH_SR_BSY) up_waste();
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while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY) up_waste();
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/* Verify */
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@ -129,14 +129,14 @@ void stm32_pwr_setvos(uint16_t vos)
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* 4. Poll VOSF bit of in PWR_CSR register. Wait until it is reset to 0.
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*/
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while((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
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while ((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
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regval = stm32_pwr_getreg(STM32_PWR_CR_OFFSET);
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regval &= ~PWR_CR_VOS_MASK;
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regval |= (vos & PWR_CR_VOS_MASK);
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stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval);
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while((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
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while ((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
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}
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#endif
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@ -548,7 +548,7 @@ static void stm32_stdclockconfig(void)
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/* Wait for PLL2 ready */
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while((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0);
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while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0);
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/* Setup PLL3 for MII/RMII clock on MCO */
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@ -457,7 +457,7 @@ static void stm32_stdclockconfig(void)
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/* Wait for PLL2 ready */
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while((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0);
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while ((getreg32(STM32_RCC_CR) & RCC_CR_PLL2RDY) == 0);
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/* Setup PLL3 for MII/RMII clock on MCO */
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@ -686,14 +686,14 @@ static void stm32_stdclockconfig(void)
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regval = getreg32(STM32_PWR_CR);
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regval |= PWR_CR_ODEN;
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putreg32(regval, STM32_PWR_CR);
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while((getreg32(STM32_PWR_CSR) & PWR_CSR_ODRDY) == 0)
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while ((getreg32(STM32_PWR_CSR) & PWR_CSR_ODRDY) == 0)
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{
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}
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regval = getreg32(STM32_PWR_CR);
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regval |= PWR_CR_ODSWEN;
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putreg32(regval, STM32_PWR_CR);
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while((getreg32(STM32_PWR_CSR) & PWR_CSR_ODSWRDY) == 0)
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while ((getreg32(STM32_PWR_CSR) & PWR_CSR_ODSWRDY) == 0)
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{
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}
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@ -217,7 +217,7 @@ static ssize_t tiva_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
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/* wait until write has finished */
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while(getreg32(TIVA_FLASH_FMC) & FLASH_FMC_WRITE);
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while (getreg32(TIVA_FLASH_FMC) & FLASH_FMC_WRITE);
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}
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return nblocks;
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@ -67,7 +67,7 @@
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void up_lowputs(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_lowputc(*str++);
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}
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@ -68,7 +68,7 @@
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void up_puts(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_putc(*str++);
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}
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@ -69,7 +69,7 @@
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void up_puts(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_putc(*str++);
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}
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@ -67,7 +67,7 @@
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void up_lowputs(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_lowputc(*str++);
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}
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@ -68,7 +68,7 @@
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void up_puts(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_putc(*str++);
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}
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@ -125,11 +125,12 @@ static inline void pic32mx_waitstates(void)
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residual = BOARD_CPU_CLOCK;
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nwaits = 0;
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while(residual > MAX_FLASH_HZ)
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while (residual > MAX_FLASH_HZ)
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{
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nwaits++;
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residual -= MAX_FLASH_HZ;
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}
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DEBUGASSERT(nwaits < 8);
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/* Set the FLASH wait states -- clearing all other bits! */
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@ -151,9 +151,10 @@ void rtos_stop_running(void)
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nuttx_arch_exit();
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while(1) {
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arch_hlt();
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}
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while (1)
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{
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arch_hlt();
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}
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}
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int rtos_vnet_init(struct rgmp_vnet *vnet)
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@ -67,7 +67,7 @@
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void up_lowputs(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_lowputc(*str++);
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}
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@ -68,7 +68,7 @@
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void up_puts(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_putc(*str++);
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}
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@ -67,7 +67,7 @@
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void up_lowputs(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_lowputc(*str++);
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}
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@ -68,7 +68,7 @@
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void up_puts(const char *str)
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{
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while(*str)
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while (*str)
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{
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up_putc(*str++);
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}
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@ -203,7 +203,7 @@ static void fb_ssd1783_send_cmdlist(const struct ssd1783_cmdlist *p)
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{
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int i=0;
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while(p->is_cmd != END)
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while (p->is_cmd != END)
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{
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uint16_t sendcmd = p->data;
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if (p->is_cmd == DATA)
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@ -93,7 +93,7 @@ static uint8_t g_line[LCD_NCHARS]; /* The content of lines 2 */
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static void up_lcddelay(uint16_t count)
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{
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uint32_t counter = (uint16_t)count << 8;
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while(counter--)
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while (counter--)
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{
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asm("\tnop\n\tnop\n\tnop\n" : :); /* 3 NOPs */
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}
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@ -357,11 +357,11 @@ static void getfilename(int fd, char *name)
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{
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ret = readbyte(fd, &ch);
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}
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while(ch == ' ' && ret == 1);
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while (ch == ' ' && ret == 1);
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/* Concatenate the filename */
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while(ret == 1 && ch > ' ')
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while (ret == 1 && ch > ' ')
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{
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*name++ = ch;
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ret = readbyte(fd, &ch);
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@ -484,7 +484,7 @@ int main(int argc, char **argv, char **envp)
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int oflags;
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int ret;
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while((opt = getopt(argc, argv, ":dt:b:hl:")) != -1)
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while ((opt = getopt(argc, argv, ":dt:b:hl:")) != -1)
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{
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switch(opt)
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{
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@ -204,9 +204,10 @@ struct vsn_sif_s vsn_sif;
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void sif_sem_wait(void)
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{
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while( sem_wait( &vsn_sif.exclusive_access ) != 0 ) {
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while (sem_wait( &vsn_sif.exclusive_access ) != 0)
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{
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ASSERT(errno == EINTR);
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}
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}
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}
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@ -688,7 +689,7 @@ int sif_main(int argc, char *argv[])
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cc1101_setchannel(cc, 0); /* AV Test Hex, receive on that channel */
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cc1101_receive(cc); /* Enter RX mode */
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while(1)
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while (1)
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{
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fflush(stdout);
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sta = cc1101_read(cc, buf, 64);
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@ -157,9 +157,11 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
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stm32_gpiowrite(GPIO_CC1101_CS, !selected);
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/* Wait for MISO to go low, indicates that Quart has stabilized */
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if (selected) {
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while( stm32_gpioread(GPIO_SPI2_MISO) ) up_waste();
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}
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if (selected)
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{
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while (stm32_gpioread(GPIO_SPI2_MISO) ) up_waste();
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}
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}
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}
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@ -2909,7 +2909,7 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
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elapsed = clock_systimer() - start;
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}
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while( elapsed < TICK_PER_SEC ); /* On successful reception while 'breaks', see above. */
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while (elapsed < TICK_PER_SEC); /* On successful reception while 'breaks', see above. */
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/* We get here when the above loop completes, either (1) we could not
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* communicate properly with the card due to errors (and the loop times
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@ -111,7 +111,7 @@
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#define WRITE_NAND(d,a) \
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do { \
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*(volatile uint8_t *)((uintptr_t)a) = (uint8_t)d; \
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} while(0)
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} while (0)
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/****************************************************************************
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* Private Types
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@ -626,7 +626,7 @@ static void * cc3000_worker(FAR void *arg)
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/* We have started release our creator*/
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sem_post(&priv->readysem);
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while(1)
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while (1)
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{
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PROBE(0,1);
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CHECK_GUARD(priv);
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@ -741,7 +741,7 @@ static void * cc3000_worker(FAR void *arg)
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} /* end if */
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cc3000_devgive(priv);
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} /* while(1) */
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} /* while (1) */
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return OK;
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}
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@ -209,7 +209,7 @@ static void *unsoliced_thread_func(void *parameter)
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spiconf.done = sem_open(buff,O_RDONLY);
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DEBUGASSERT(spiconf.done != (sem_t *)-1);
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while(spiconf.run)
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while (spiconf.run)
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{
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memset(&spiconf.rx_buffer,0,sizeof(spiconf.rx_buffer));
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nbytes = mq_receive(spiconf.queue, &spiconf.rx_buffer,
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@ -938,7 +938,7 @@ void SimpleLinkWaitEvent(uint16_t usOpcode, void *pRetParams)
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hci_event_handler(pRetParams, 0, 0);
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}
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}
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while(tSLInformation.usRxEventOpcode != 0);
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while (tSLInformation.usRxEventOpcode != 0);
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nllvdbg("Done for usOpcode 0x%x\n",usOpcode);
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}
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@ -996,7 +996,7 @@ void SimpleLinkWaitData(uint8_t *pBuf, uint8_t *from, uint8_t *fromlen)
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}
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}
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}
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while(*tSLInformation.pucReceivedData == HCI_TYPE_EVNT);
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while (*tSLInformation.pucReceivedData == HCI_TYPE_EVNT);
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nllvdbg("Done for Data 0x%x\n",usOpcode);
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}
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@ -82,7 +82,7 @@
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#endif
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#ifdef CONFIG_WL_NRF24L01_CHECK_PARAMS
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# define CHECK_ARGS(cond) do { if (!(cond)) return -EINVAL; } while(0)
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# define CHECK_ARGS(cond) do { if (!(cond)) return -EINVAL; } while (0)
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#else
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# define CHECK_ARGS(cond)
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#endif
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@ -1719,7 +1719,7 @@ ssize_t nrf24l01_recv(struct nrf24l01_dev_s *dev, uint8_t *buffer,
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static void binarycvt(char *deststr, const uint8_t *srcbin, size_t srclen)
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{
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int i = 0;
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while(i < srclen)
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while (i < srclen)
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{
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sprintf(deststr + i*2, "%02x", srcbin[i]);
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++i;
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@ -70,7 +70,7 @@
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static int inode_namelen(FAR const char *name)
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{
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const char *tmp = name;
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while(*tmp && *tmp != '/') tmp++;
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while (*tmp && *tmp != '/') tmp++;
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return tmp - name;
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}
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@ -80,7 +80,7 @@ static int inode_namelen(FAR const char *name)
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static void inode_namecpy(char *dest, const char *src)
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{
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while(*src && *src != '/') *dest++ = *src++;
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while (*src && *src != '/') *dest++ = *src++;
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*dest='\0';
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}
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@ -495,7 +495,7 @@ int uip_backlogdelete(FAR struct uip_conn *conn, FAR struct uip_conn *blconn);
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do { \
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(f) |= UIP_NEWDATA; \
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(conn)->tcpstateflags &= ~UIP_STOPPED; \
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} while(0)
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} while (0)
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/* Get the current maximum segment size that can be sent on the current
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* connection.
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@ -411,7 +411,7 @@ extern void uip_send(struct uip_driver_s *dev, const void *buf, int len);
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do { \
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addr = HTONL((uint32_t)(addr0) << 24 | (uint32_t)(addr1) << 16 | \
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(uint32_t)(addr2) << 8 | (uint32_t)(addr3)); \
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} while(0)
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} while (0)
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/* Convert an IPv4 address of the form uint16_t[2] to an in_addr_t */
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@ -454,7 +454,7 @@ extern void uip_send(struct uip_driver_s *dev, const void *buf, int len);
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((uint16_t*)(addr))[5] = HTONS((addr5)); \
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((uint16_t*)(addr))[6] = HTONS((addr6)); \
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((uint16_t*)(addr))[7] = HTONS((addr7)); \
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} while(0)
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} while (0)
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/* Copy an IP address to another IP address.
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*
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@ -475,12 +475,12 @@ extern void uip_send(struct uip_driver_s *dev, const void *buf, int len);
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# define uip_ipaddr_copy(dest, src) \
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do { \
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(dest) = (in_addr_t)(src); \
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} while(0)
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} while (0)
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# define uiphdr_ipaddr_copy(dest, src) \
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do { \
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((uint16_t*)(dest))[0] = ((uint16_t*)(src))[0]; \
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((uint16_t*)(dest))[1] = ((uint16_t*)(src))[1]; \
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} while(0)
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} while (0)
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#else /* !CONFIG_NET_IPv6 */
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# define uip_ipaddr_copy(dest, src) memcpy(&dest, &src, sizeof(uip_ip6addr_t))
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# define uiphdr_ipaddr_copy(dest, src) uip_ipaddr_copy(dest, src)
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@ -565,6 +565,6 @@ extern bool uip_ipaddr_maskcmp(uip_ipaddr_t addr1, uip_ipaddr_t addr2,
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#define uip_ipaddr_mask(dest, src, mask) \
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do { \
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(in_addr_t)(dest) = (in_addr_t)(src) & (in_addr_t)(mask); \
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} while(0)
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} while (0)
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#endif /* __INCLUDE_NUTTX_NET_UIP_UIP_H */
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@ -74,7 +74,7 @@ static uint16_t chksum(uint16_t sum, const uint8_t *data, uint16_t len)
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dataptr = data;
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last_byte = data + len - 1;
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while(dataptr < last_byte)
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while (dataptr < last_byte)
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{
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/* At least two more bytes */
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||||
|
@ -113,7 +113,7 @@ int wd_cancel (WDOG_ID wdid)
|
||||
prev = NULL;
|
||||
curr = (wdog_t*)g_wdactivelist.head;
|
||||
|
||||
while((curr) && (curr != wdid))
|
||||
while ((curr) && (curr != wdid))
|
||||
{
|
||||
prev = curr;
|
||||
curr = curr->next;
|
||||
|
Loading…
Reference in New Issue
Block a user