arch/arm/src/stm32h7: Ported the QEncoder from F7 to H7.
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@ -4229,4 +4229,181 @@ config STM32H7_ETHMAC_REGDEBUG
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endmenu # Ethernet MAC configuration
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menu "QEncoder Driver"
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depends on SENSORS_QENCODER
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depends on STM32H7_TIM1 || STM32H7_TIM2 || STM32H7_TIM3 || STM32H7_TIM4 || STM32H7_TIM5 || STM32H7_TIM8
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config STM32H7_TIM1_QE
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bool "TIM1"
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default n
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depends on STM32H7_TIM1
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---help---
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Reserve TIM1 for use by QEncoder.
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if STM32H7_TIM1_QE
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config STM32H7_TIM1_QEPSC
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int "TIM1 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_TIM2_QE
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bool "TIM2"
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default n
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depends on STM32H7_TIM2
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---help---
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Reserve TIM2 for use by QEncoder.
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if STM32H7_TIM2_QE
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config STM32H7_TIM2_QEPSC
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int "TIM2 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_TIM3_QE
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bool "TIM3"
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default n
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depends on STM32H7_TIM3
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---help---
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Reserve TIM3 for use by QEncoder.
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if STM32H7_TIM3_QE
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config STM32H7_TIM3_QEPSC
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int "TIM3 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_TIM4_QE
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bool "TIM4"
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default n
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depends on STM32H7_TIM4
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---help---
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Reserve TIM4 for use by QEncoder.
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if STM32H7_TIM4_QE
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config STM32H7_TIM4_QEPSC
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int "TIM4 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_TIM5_QE
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bool "TIM5"
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default n
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depends on STM32H7_TIM5
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---help---
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Reserve TIM5 for use by QEncoder.
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if STM32H7_TIM5_QE
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config STM32H7_TIM5_QEPSC
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int "TIM5 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_TIM8_QE
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bool "TIM8"
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default n
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depends on STM32H7_TIM8
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---help---
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Reserve TIM8 for use by QEncoder.
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if STM32H7_TIM8_QE
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config STM32H7_TIM8_QEPSC
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int "TIM8 pulse prescaler"
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default 1
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---help---
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This prescaler divides the number of recorded encoder pulses,
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limiting the count rate at the expense of resolution.
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endif
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config STM32H7_QENCODER_FILTER
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bool "Enable filtering on STM32 QEncoder input"
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default y
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choice
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depends on STM32H7_QENCODER_FILTER
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prompt "Input channel sampling frequency"
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default STM32H7_QENCODER_SAMPLE_FDTS_4
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config STM32H7_QENCODER_SAMPLE_FDTS
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bool "fDTS"
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config STM32H7_QENCODER_SAMPLE_CKINT
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bool "fCK_INT"
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config STM32H7_QENCODER_SAMPLE_FDTS_2
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bool "fDTS/2"
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config STM32H7_QENCODER_SAMPLE_FDTS_4
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bool "fDTS/4"
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config STM32H7_QENCODER_SAMPLE_FDTS_8
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bool "fDTS/8"
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config STM32H7_QENCODER_SAMPLE_FDTS_16
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bool "fDTS/16"
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config STM32H7_QENCODER_SAMPLE_FDTS_32
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bool "fDTS/32"
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endchoice
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choice
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depends on STM32H7_QENCODER_FILTER
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prompt "Input channel event count"
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default STM32H7_QENCODER_SAMPLE_EVENT_6
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config STM32H7_QENCODER_SAMPLE_EVENT_1
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depends on STM32H7_QENCODER_SAMPLE_FDTS
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bool "1"
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config STM32H7_QENCODER_SAMPLE_EVENT_2
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depends on STM32H7_QENCODER_SAMPLE_CKINT
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bool "2"
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config STM32H7_QENCODER_SAMPLE_EVENT_4
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depends on STM32H7_QENCODER_SAMPLE_CKINT
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bool "4"
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config STM32H7_QENCODER_SAMPLE_EVENT_5
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depends on STM32H7_QENCODER_SAMPLE_FDTS_16 || STM32H7_QENCODER_SAMPLE_FDTS_32
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bool "5"
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config STM32H7_QENCODER_SAMPLE_EVENT_6
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depends on !STM32H7_QENCODER_SAMPLE_FDTS && !STM32H7_QENCODER_SAMPLE_CKINT
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bool "6"
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config STM32H7_QENCODER_SAMPLE_EVENT_8
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depends on !STM32H7_QENCODER_SAMPLE_FDTS
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bool "8"
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endchoice
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endmenu
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endif # ARCH_CHIP_STM32H7
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@ -141,3 +141,7 @@ endif
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ifeq ($(CONFIG_STM32H7_ETHMAC),y)
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CHIP_CSRCS += stm32_ethernet.c
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endif
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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CHIP_CSRCS += stm32_qencoder.c
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endif
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arch/arm/src/stm32h7/stm32_qencoder.c
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1177
arch/arm/src/stm32h7/stm32_qencoder.c
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File diff suppressed because it is too large
Load Diff
143
arch/arm/src/stm32h7/stm32_qencoder.h
Normal file
143
arch/arm/src/stm32h7/stm32_qencoder.h
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@ -0,0 +1,143 @@
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/************************************************************************************
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* arch/arm/src/stm32h7/stm32_qencoder.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32H7_STM32_QENCODER_H
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#define __ARCH_ARM_SRC_STM32H7_STM32_QENCODER_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#ifdef CONFIG_SENSORS_QENCODER
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/* Timer devices may be used for different purposes. One special purpose is as
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* a quadrature encoder input device. If CONFIG_STM32H7_TIMn is defined then the
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* CONFIG_STM32H7_TIMn_QE must also be defined to indicate that timer "n" is intended
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* to be used for as a quadrature encoder.
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*/
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#ifndef CONFIG_STM32H7_TIM1
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# undef CONFIG_STM32H7_TIM1_QE
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#endif
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#ifndef CONFIG_STM32H7_TIM2
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# undef CONFIG_STM32H7_TIM2_QE
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#endif
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#ifndef CONFIG_STM32H7_TIM3
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# undef CONFIG_STM32H7_TIM3_QE
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#endif
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#ifndef CONFIG_STM32H7_TIM4
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# undef CONFIG_STM32H7_TIM4_QE
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#endif
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#ifndef CONFIG_STM32H7_TIM5
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# undef CONFIG_STM32H7_TIM5_QE
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#endif
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#ifndef CONFIG_STM32H7_TIM8
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# undef CONFIG_STM32H7_TIM8_QE
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#endif
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/* Only timers 2-5, and 1 & 8 can be used as a quadrature encoder (at least for the
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* STM32 H7)
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*/
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#undef CONFIG_STM32H7_TIM6_QE
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#undef CONFIG_STM32H7_TIM7_QE
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#undef CONFIG_STM32H7_TIM9_QE
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#undef CONFIG_STM32H7_TIM10_QE
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#undef CONFIG_STM32H7_TIM11_QE
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#undef CONFIG_STM32H7_TIM12_QE
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#undef CONFIG_STM32H7_TIM13_QE
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#undef CONFIG_STM32H7_TIM14_QE
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/* Clock out frequency. This value is used to calculation the timer CLKIN in
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* prescaler value.
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*/
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#ifndef CONFIG_STM32H7_TIM1_QECLKOUT
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# define CONFIG_STM32H7_TIM1_QECLKOUT 28000000
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#endif
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#ifndef CONFIG_STM32H7_TIM2_QECLKOUT
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# define CONFIG_STM32H7_TIM2_QECLKOUT 28000000
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#endif
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#ifndef CONFIG_STM32H7_TIM3_QECLKOUT
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# define CONFIG_STM32H7_TIM3_QECLKOUT 28000000
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#endif
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#ifndef CONFIG_STM32H7_TIM4_QECLKOUT
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# define CONFIG_STM32H7_TIM4_QECLKOUT 28000000
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#endif
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#ifndef CONFIG_STM32H7_TIM5_QECLKOUT
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# define CONFIG_STM32H7_TIM5_QECLKOUT 28000000
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#endif
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#ifndef CONFIG_STM32H7_TIM8_QECLKOUT
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# define CONFIG_STM32H7_TIM8_QECLKOUT 28000000
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#endif
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_qeinitialize
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*
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* Description:
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* Initialize a quadrature encoder interface. This function must be called from
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* board-specific logic..
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*
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* Input Parameters:
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* devpath - The full path to the driver to register. E.g., "/dev/qe0"
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* tim - The timer number to used. 'tim' must be an element of {1,2,3,4,5,8}
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*
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* Returned Value:
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* Zero on success; A negated errno value is returned on failure.
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*
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************************************************************************************/
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int stm32_qeinitialize(FAR const char *devpath, int tim);
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#endif /* CONFIG_SENSORS_QENCODER */
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#endif /* __ARCH_ARM_SRC_STM32H7_STM32_QENCODER_H */
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@ -395,7 +395,7 @@ Configuration Subdirectories
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2019-06-18: The RTC now appears to be fully functional.
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2019-06-26: Renamed nsh configuration to nsh_flash. Added nsh_ram
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configuration.
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configuration. Not yet verified.
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sdboot
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@ -52,7 +52,7 @@
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****************************************************************************/
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/****************************************************************************
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* Name: alert, err, warn, and info
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* Name: _alert, _err, _warn, and _info
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*
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* Description:
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* If the cross-compiler's pre-processor does not support variable
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