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esp32-devkitc/ble: Enable SMP for BLE defconfig

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This defconfig also pins the HCI TX thread to the same core of the
BLE task.
This commit is contained in:
Tiago Medicci Serrano 2023-10-10 08:26:59 -03:00 committed by Xiang Xiao
parent 41c1b153e3
commit 0616796185
1 changed files with 4 additions and 1 deletions
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5
boards/xtensa/esp32/esp32-devkitc/configs/ble/defconfig
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@ -6,6 +6,7 @@
# modifications. # modifications.
# #
# CONFIG_ARCH_LEDS is not set # CONFIG_ARCH_LEDS is not set
# CONFIG_NDEBUG is not set
# CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ALLOW_BSD_COMPONENTS=y
@ -16,6 +17,7 @@ CONFIG_ARCH_BOARD_ESP32_DEVKITC=y
CONFIG_ARCH_CHIP="esp32" CONFIG_ARCH_CHIP="esp32"
CONFIG_ARCH_CHIP_ESP32=y CONFIG_ARCH_CHIP_ESP32=y
CONFIG_ARCH_CHIP_ESP32WROVER=y CONFIG_ARCH_CHIP_ESP32WROVER=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_XTENSA=y CONFIG_ARCH_XTENSA=y
CONFIG_BOARD_LOOPSPERMSEC=16717 CONFIG_BOARD_LOOPSPERMSEC=16717
@ -49,7 +51,8 @@ CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000 CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200 CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y CONFIG_SCHED_WAITPID=y
CONFIG_SPINLOCK=y CONFIG_SMP=y
CONFIG_SMP_NCPUS=2
CONFIG_START_DAY=6 CONFIG_START_DAY=6
CONFIG_START_MONTH=12 CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011 CONFIG_START_YEAR=2011