Adding context switching logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@561 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
261b0e7f58
commit
061e043bfe
@ -43,6 +43,6 @@ CMN_CSRCS = up_allocateheap.c up_initialize.c up_schedulesigaction.c \
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up_unblocktask.c up_doirq.c up_releasepending.c up_usestack.c \
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up_unblocktask.c up_doirq.c up_releasepending.c up_usestack.c \
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up_exit.c up_releasestack.c up_idle.c up_reprioritizertr.c
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up_exit.c up_releasestack.c up_idle.c up_reprioritizertr.c
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CHIP_SSRCS = z16f_lowuart.S
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CHIP_SSRCS = z16f_lowuart.S z16f_saveusercontext.S
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CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c z16f_serial.c
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CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c z16f_serial.c
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@ -367,41 +367,41 @@
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/* UART0/1 Status 0 Register Bit Definitions ****************************************/
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/* UART0/1 Status 0 Register Bit Definitions ****************************************/
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#define Z16F_UARTSTAT0_RDA _HX8(0x80) /* Bit 7: Receive Data Available */
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#define Z16F_UARTSTAT0_RDA _HX8(80) /* Bit 7: Receive Data Available */
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#define Z16F_UARTSTAT0_PE _HX8(0x40) /* Bit 6: Parity Error */
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#define Z16F_UARTSTAT0_PE _HX8(40) /* Bit 6: Parity Error */
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#define Z16F_UARTSTAT0_OE _HX8(0x20) /* Bit 5: Overrun Error */
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#define Z16F_UARTSTAT0_OE _HX8(20) /* Bit 5: Overrun Error */
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#define Z16F_UARTSTAT0_FE _HX8(0x10) /* Bit 4: Framing Error */
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#define Z16F_UARTSTAT0_FE _HX8(10) /* Bit 4: Framing Error */
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#define Z16F_UARTSTAT0_BRKD _HX8(0x08) /* Bit 3: Break Detect */
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#define Z16F_UARTSTAT0_BRKD _HX8(08) /* Bit 3: Break Detect */
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#define Z16F_UARTSTAT0_TDRE _HX8(0x04) /* Bit 2: Transmitter Data Register Empty */
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#define Z16F_UARTSTAT0_TDRE _HX8(04) /* Bit 2: Transmitter Data Register Empty */
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#define Z16F_UARTSTAT0_TXE _HX8(0x02) /* Bit 1: Transmitter Empty */
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#define Z16F_UARTSTAT0_TXE _HX8(02) /* Bit 1: Transmitter Empty */
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#define Z16F_UARTSTAT0_CTS _HX8(0x01) /* Bit 0: Clear To Send */
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#define Z16F_UARTSTAT0_CTS _HX8(01) /* Bit 0: Clear To Send */
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/* UART0/1 Control 0/1 Register Bit Definitions *************************************/
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/* UART0/1 Control 0/1 Register Bit Definitions *************************************/
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#define Z16F_UARTCTL0_TEN _HX8(0x80) /* Bit 7: Transmit Enable */
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#define Z16F_UARTCTL0_TEN _HX8(80) /* Bit 7: Transmit Enable */
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#define Z16F_UARTCTL0_REN _HX8(0x40) /* Bit 6: Receive Enable */
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#define Z16F_UARTCTL0_REN _HX8(40) /* Bit 6: Receive Enable */
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#define Z16F_UARTCTL0_CTSE _HX8(0x20) /* Bit 5: CTS Enable */
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#define Z16F_UARTCTL0_CTSE _HX8(20) /* Bit 5: CTS Enable */
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#define Z16F_UARTCTL0_PEN _HX8(0x10) /* Bit 4: Parity Enable */
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#define Z16F_UARTCTL0_PEN _HX8(10) /* Bit 4: Parity Enable */
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#define Z16F_UARTCTL0_PSEL _HX8(0x08) /* Bit 3: Odd Parity Select */
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#define Z16F_UARTCTL0_PSEL _HX8(08) /* Bit 3: Odd Parity Select */
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#define Z16F_UARTCTL0_SBRK _HX8(0x04) /* Bit 2: Send Break */
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#define Z16F_UARTCTL0_SBRK _HX8(04) /* Bit 2: Send Break */
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#define Z16F_UARTCTL0_STOP _HX8(0x02) /* Bit 1: Stop Bit Select */
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#define Z16F_UARTCTL0_STOP _HX8(02) /* Bit 1: Stop Bit Select */
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#define Z16F_UARTCTL0_LBEN _HX8(0x01) /* Bit 0: Loopback Enable */
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#define Z16F_UARTCTL0_LBEN _HX8(01) /* Bit 0: Loopback Enable */
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#define Z16F_UARTCTL1_MPMD1 _HX8(0x80) /* Bit 7: Multiprocessor Mode (bit1) */
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#define Z16F_UARTCTL1_MPMD1 _HX8(80) /* Bit 7: Multiprocessor Mode (bit1) */
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#define Z16F_UARTCTL1_MPEN _HX8(0x40) /* Bit 6: Multiprocessor Enable */
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#define Z16F_UARTCTL1_MPEN _HX8(40) /* Bit 6: Multiprocessor Enable */
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#define Z16F_UARTCTL1_MPMD0 _HX8(0x20) /* Bit 5: Multiprocessor Mode (bit0) */
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#define Z16F_UARTCTL1_MPMD0 _HX8(20) /* Bit 5: Multiprocessor Mode (bit0) */
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#define Z16F_UARTCTL1_MPBT _HX8(0x10) /* Bit 4: Multiprocessor Bit Transmit */
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#define Z16F_UARTCTL1_MPBT _HX8(10) /* Bit 4: Multiprocessor Bit Transmit */
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#define Z16F_UARTCTL1_DEPOL _HX8(0x08) /* Bit 3: Driver Enable Polarity */
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#define Z16F_UARTCTL1_DEPOL _HX8(08) /* Bit 3: Driver Enable Polarity */
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#define Z16F_UARTCTL1_BRGCTL _HX8(0x04) /* Bit 2: Baud Rate Generator Control */
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#define Z16F_UARTCTL1_BRGCTL _HX8(04) /* Bit 2: Baud Rate Generator Control */
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#define Z16F_UARTCTL1_RDAIRQ _HX8(0x02) /* Bit 1: Receive Data Interrupt Enable */
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#define Z16F_UARTCTL1_RDAIRQ _HX8(02) /* Bit 1: Receive Data Interrupt Enable */
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#define Z16F_UARTCTL1_IREN _HX8(0x01) /* Bit 0: Infrared Encoder/Decoder Eanble */
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#define Z16F_UARTCTL1_IREN _HX8(01) /* Bit 0: Infrared Encoder/Decoder Eanble */
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/* UART0/1 Mode Status/Select Register Bit Definitions ******************************/
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/* UART0/1 Mode Status/Select Register Bit Definitions ******************************/
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#define Z16F_UARTMDSEL_NORMAL _HX8(0x00) /* Bits 5-7=0: Multiprocessor and Normal Mode */
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#define Z16F_UARTMDSEL_NORMAL _HX8(00) /* Bits 5-7=0: Multiprocessor and Normal Mode */
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#define Z16F_UARTMDSEL_FILTER _HX8(0x20) /* Bits 5-7=1: Noise Filter Control/Status */
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#define Z16F_UARTMDSEL_FILTER _HX8(20) /* Bits 5-7=1: Noise Filter Control/Status */
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#define Z16F_UARTMDSEL_LINP _HX8(0x40) /* Bits 5-7=2: LIN protocol Contol/Status */
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#define Z16F_UARTMDSEL_LINP _HX8(40) /* Bits 5-7=2: LIN protocol Contol/Status */
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#define Z16F_UARTMDSEL_HWREV _HX8(0xe0) /* Bits 5-7=7: LIN-UART Hardware Revision */
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#define Z16F_UARTMDSEL_HWREV _HX8(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */
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/* Bits 0-4: Mode dependent status */
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/* Bits 0-4: Mode dependent status */
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/* Timer0/1/2 registers *************************************************************/
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/* Timer0/1/2 registers *************************************************************/
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@ -1,195 +1,264 @@
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/**************************************************************************
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/**************************************************************************
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* arch/z16/src/z16f/z16f_head.S
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* arch/z16/src/z16f/z16f_head.S
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* Z16F Reset Entry Point
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* Z16F Reset Entry Point
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*
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* modification, are permitted provided that the following conditions
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* are met:
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* are met:
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*
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*
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* 1. Redistributions of source code must retain the above copyright
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* the documentation and/or other materials provided with the
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* distribution.
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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* without specific prior written permission.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*
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**************************************************************************/
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**************************************************************************/
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/**************************************************************************
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/**************************************************************************
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* Included Files
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* Included Files
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**************************************************************************/
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**************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/config.h>
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/**************************************************************************
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/**************************************************************************
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* External References / External Definitions
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* External References / External Definitions
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**************************************************************************/
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**************************************************************************/
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xref _z16f_lowinit:EROM
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xref _z16f_lowinit:EROM
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#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
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#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
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xref _z16f_lowuartinit:EROM
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xref _z16f_lowuartinit:EROM
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#endif
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#endif
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xref _os_start:EROM
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xref _os_start:EROM
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xdef _reset
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xdef _reset
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xdef _sysexc_isr
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xdef _sysexc_isr
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xdef _timer2_isr
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xdef _timer2_isr
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xdef _timer1_isr
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xdef _timer1_isr
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xdef _timer0_isr
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xdef _timer0_isr
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xdef _uart0rx_isr
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xdef _uart0rx_isr
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xdef _uart0tx_isr
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xdef _uart0tx_isr
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xdef _i2c_isr
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xdef _i2c_isr
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xdef _spi_isr
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xdef _spi_isr
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xdef _adc_isr
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xdef _adc_isr
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xdef _p7ad_isr
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xdef _p7ad_isr
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xdef _p6ad_isr
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xdef _p6ad_isr
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xdef _p5ad_isr
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xdef _p5ad_isr
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xdef _p4ad_isr
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xdef _p4ad_isr
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xdef _p3ad_isr
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xdef _p3ad_isr
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xdef _p2ad_isr
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xdef _p2ad_isr
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xdef _p1ad_isr
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xdef _p1ad_isr
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xdef _p0ad_isr
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xdef _p0ad_isr
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xdef _pwmtimer_isr
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xdef _pwmtimer_isr
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xdef _uart1rx_isr
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xdef _uart1rx_isr
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xdef _uart1tx_isr
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xdef _uart1tx_isr
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xdef _pwmfault_isr
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xdef _pwmfault_isr
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xdef _c3_isr
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xdef _c3_isr
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xdef _c2_isr
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xdef _c2_isr
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xdef _c1_isr
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xdef _c1_isr
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xdef _c0_isr
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xdef _c0_isr
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xdef _common_isr
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xdef _common_isr
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/**************************************************************************
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xref _low_nearbss:RAM
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* Flash Option Byte Setup
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xref _len_nearbss
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**************************************************************************/
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xref _low_farbss:ERAM
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xref _len_farbss:ERAM
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define FOPTIONSEG, SPACE=ROM, ORG=0
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xref _low_neardata:RAM
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segment FOPTIONSEG
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xref _len_neardata
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db %FF
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xref _low_near_romdata:EROM
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db %FF
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xref _low_fardata:ERAM
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db %FF
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xref _len_fardata:ERAM
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db %FF
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xref _low_far_romdata:EROM
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xref far_heapbot:ERAM
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/**************************************************************************
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xref _far_stack:ERAM
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* vectors
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xref _near_stack:RAM
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**************************************************************************/
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/**************************************************************************
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vector RESET=_reset
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* Flash Option Byte Setup
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vector SYSEXC=_sysexc_isr
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**************************************************************************/
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vector TIMER2=_timer2_isr
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vector TIMER1=_timer1_isr
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define FOPTIONSEG, SPACE=ROM, ORG=0
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vector TIMER0=_timer0_isr
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segment FOPTIONSEG
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vector UART0_RX=_uart0rx_isr
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db %FF
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vector UART0_TX=_uart0tx_isr
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db %FF
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vector I2C=_i2c_isr
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db %FF
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vector SPI=_spi_isr
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db %FF
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vector ADC=_adc_isr
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vector P7AD=_p7ad_isr
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/**************************************************************************
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vector P6AD=_p6ad_isr
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* vectors
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vector P5AD=_p5ad_isr
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**************************************************************************/
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vector P4AD=_p4ad_isr
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vector P3AD=_p3ad_isr
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vector RESET=_reset
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vector P2AD=_p2ad_isr
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vector SYSEXC=_sysexc_isr
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vector P1AD=_p1ad_isr
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vector TIMER2=_timer2_isr
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vector P0AD=_p0ad_isr
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vector TIMER1=_timer1_isr
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vector PWM_TIMER=_pwmtimer_isr
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vector TIMER0=_timer0_isr
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vector UART1_RX=_uart1rx_isr
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vector UART0_RX=_uart0rx_isr
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vector UART1_TX=_uart1tx_isr
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vector UART0_TX=_uart0tx_isr
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vector PWM_FAULT=_pwmfault_isr
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vector I2C=_i2c_isr
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vector C3=_c3_isr
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vector SPI=_spi_isr
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vector C2=_c3_isr
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vector ADC=_adc_isr
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vector C1=_c2_isr
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vector P7AD=_p7ad_isr
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vector C0=_c0_isr
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vector P6AD=_p6ad_isr
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vector P5AD=_p5ad_isr
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/**************************************************************************
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vector P4AD=_p4ad_isr
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* Equates
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vector P3AD=_p3ad_isr
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**************************************************************************/
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vector P2AD=_p2ad_isr
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vector P1AD=_p1ad_isr
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STACK_TOP equ %FFC000
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vector P0AD=_p0ad_isr
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vector PWM_TIMER=_pwmtimer_isr
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/**************************************************************************
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vector UART1_RX=_uart1rx_isr
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* Data Allocation
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vector UART1_TX=_uart1tx_isr
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**************************************************************************/
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vector PWM_FAULT=_pwmfault_isr
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vector C3=_c3_isr
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/**************************************************************************
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vector C2=_c3_isr
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* Code
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vector C1=_c2_isr
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**************************************************************************/
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vector C0=_c0_isr
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define CODESEG, SPACE=EROM
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/**************************************************************************
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segment CODESEG
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* Equates
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**************************************************************************/
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/**************************************************************************
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* Name: _reset
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/**************************************************************************
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*
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* Data Allocation
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* Description:
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**************************************************************************/
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* Reset entry point
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*
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/**************************************************************************
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**************************************************************************/
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* Code
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**************************************************************************/
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_reset:
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ld sp, #STACK_TOP /* Set Stack Pointer */
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define CODESEG, SPACE=EROM
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call _z16f_lowinit /* Perform low-level hardware initialization */
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segment CODESEG
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#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
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call _z16f_lowuartinit /* Initialize the UART for debugging */
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/**************************************************************************
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#endif
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* Name: _reset
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call _os_start /* Start the operating system */
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*
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_halted: /* _os_start() should not return */
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* Description:
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halt
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* Reset entry point
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jp _halted
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*
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**************************************************************************/
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/**************************************************************************
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* Name: Interrupt handlers
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_reset:
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*
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/* Initialize the init/idle task stack */
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* Description:
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* All interrupts will be vectored to the following locations.
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ld sp, #(_near_stack+1) /* Set Stack Pointer to the top of internal RAM */
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*
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clr fp
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**************************************************************************/
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/* Perform VERY early UART initialization so that we can use it here */
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_sysexc_isr:
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_timer2_isr:
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#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
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_timer1_isr:
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call _z16f_lowuartinit /* Initialize the UART for debugging */
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_timer0_isr:
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#endif
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_uart0rx_isr:
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/* Initialize the hardware stack overflow register */
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_uart0tx_isr:
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_i2c_isr:
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#ifdef CONFIG_Z16F_INITSPOV
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_spi_isr:
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ld r0, #(_near_stack_bot+1)
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_adc_isr:
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ld spov, r0
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_p7ad_isr:
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#endif
|
||||||
_p6ad_isr:
|
/* Clear BSS */
|
||||||
_p5ad_isr:
|
|
||||||
_p4ad_isr:
|
lea r0, _low_nearbss
|
||||||
_p3ad_isr:
|
ld r1, #_len_nearbss+1
|
||||||
_p2ad_isr:
|
jp _reset2
|
||||||
_p1ad_isr:
|
_reset1:
|
||||||
_p0ad_isr:
|
ld.b (r0++), #0
|
||||||
_pwmtimer_isr:
|
_reset2:
|
||||||
_uart1rx_isr:
|
djnz r1, _reset1
|
||||||
_uart1tx_isr:
|
|
||||||
_pwmfault_isr:
|
lea r0, _low_farbss
|
||||||
_c3_isr:
|
ld r1, #_len_farbss+1
|
||||||
_c2_isr:
|
jp _reset4
|
||||||
_c1_isr:
|
_reset3:
|
||||||
_c0_isr:
|
ld.b (r0++), #0
|
||||||
_common_isr:
|
_reset4:
|
||||||
nop
|
djnz r1, _reset3
|
||||||
iret
|
|
||||||
|
/* Copy ROM data into RAM */
|
||||||
end
|
|
||||||
|
lea r0, _low_near_romdata
|
||||||
|
lea r1, _low_neardata
|
||||||
|
ld r2, #_len_neardata+1
|
||||||
|
jp _reset6
|
||||||
|
_reset5:
|
||||||
|
ld.b r3, (r0++)
|
||||||
|
ld.b (r1++), r3
|
||||||
|
_reset6:
|
||||||
|
djnz r2, _reset5
|
||||||
|
|
||||||
|
lea r0, _low_far_romdata
|
||||||
|
lea r1, _low_fardata
|
||||||
|
ld r2, #_len_fardata+1
|
||||||
|
jp _reset8
|
||||||
|
_reset7:
|
||||||
|
ld.b r3, (r0++)
|
||||||
|
ld.b (r1++), r3
|
||||||
|
_reset8:
|
||||||
|
djnz r2, _reset7
|
||||||
|
|
||||||
|
/* Perform low-level hardware initialization */
|
||||||
|
|
||||||
|
call _z16f_lowinit /* Perform low-level hardware initialization */
|
||||||
|
|
||||||
|
/* Start NuttX */
|
||||||
|
|
||||||
|
call _os_start /* Start the operating system */
|
||||||
|
_halted: /* _os_start() should not return */
|
||||||
|
halt
|
||||||
|
jp _halted
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Name: Interrupt handlers
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* All interrupts will be vectored to the following locations.
|
||||||
|
*
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
_sysexc_isr:
|
||||||
|
_timer2_isr:
|
||||||
|
_timer1_isr:
|
||||||
|
_timer0_isr:
|
||||||
|
_uart0rx_isr:
|
||||||
|
_uart0tx_isr:
|
||||||
|
_i2c_isr:
|
||||||
|
_spi_isr:
|
||||||
|
_adc_isr:
|
||||||
|
_p7ad_isr:
|
||||||
|
_p6ad_isr:
|
||||||
|
_p5ad_isr:
|
||||||
|
_p4ad_isr:
|
||||||
|
_p3ad_isr:
|
||||||
|
_p2ad_isr:
|
||||||
|
_p1ad_isr:
|
||||||
|
_p0ad_isr:
|
||||||
|
_pwmtimer_isr:
|
||||||
|
_uart1rx_isr:
|
||||||
|
_uart1tx_isr:
|
||||||
|
_pwmfault_isr:
|
||||||
|
_c3_isr:
|
||||||
|
_c2_isr:
|
||||||
|
_c1_isr:
|
||||||
|
_c0_isr:
|
||||||
|
_common_isr:
|
||||||
|
nop
|
||||||
|
iret
|
||||||
|
|
||||||
|
end
|
||||||
|
|||||||
@ -1,238 +1,234 @@
|
|||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* arch/z16/src/z16f/z16f_lowuart.asm
|
* arch/z16/src/z16f/z16f_lowuart.asm
|
||||||
* Z16F UART management
|
* Z16F UART management
|
||||||
*
|
*
|
||||||
* Copyright (C) 2008 Gregory Nutt. All rights reserved.
|
* Copyright (C) 2008 Gregory Nutt. All rights reserved.
|
||||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
* modification, are permitted provided that the following conditions
|
* modification, are permitted provided that the following conditions
|
||||||
* are met:
|
* are met:
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer.
|
* notice, this list of conditions and the following disclaimer.
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
* notice, this list of conditions and the following disclaimer in
|
* notice, this list of conditions and the following disclaimer in
|
||||||
* the documentation and/or other materials provided with the
|
* the documentation and/or other materials provided with the
|
||||||
* distribution.
|
* distribution.
|
||||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
* used to endorse or promote products derived from this software
|
* used to endorse or promote products derived from this software
|
||||||
* without specific prior written permission.
|
* without specific prior written permission.
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSeqUENTIAL DAMAGES (INCLUDING,
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSeqUENTIAL DAMAGES (INCLUDING,
|
||||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
*************************************************************************/
|
*************************************************************************/
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* Included Files
|
* Included Files
|
||||||
*************************************************************************/
|
*************************************************************************/
|
||||||
|
|
||||||
#include <nuttx/config.h>
|
#include <nuttx/config.h>
|
||||||
#include "chip/chip.h"
|
#include "chip/chip.h"
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
|
#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* External References / External Definitions
|
* External References / External Definitions
|
||||||
*************************************************************************/
|
*************************************************************************/
|
||||||
|
|
||||||
xdef z16f_lowuartinit
|
xdef z16f_lowuartinit
|
||||||
xref _SYS_CLK_FREQ:EROM
|
xref _SYS_CLK_FREQ:EROM
|
||||||
#ifdef CONFIG_ARCH_LOWPUTC
|
#ifdef CONFIG_ARCH_LOWPUTC
|
||||||
xdef _z16f_xmitc
|
xdef _z16f_xmitc
|
||||||
xdef _up_lowputc
|
xdef _up_lowputc
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_ARCH_LOWGETC
|
#ifdef CONFIG_ARCH_LOWGETC
|
||||||
xdef _up_lowgetc
|
xdef _up_lowgetc
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* Data Allocation
|
* Data Allocation
|
||||||
*************************************************************************/
|
*************************************************************************/
|
||||||
|
|
||||||
/*************************************************************************
|
define CODESEG, SPACE=EROM
|
||||||
* Data Allocation
|
segment CODESEG
|
||||||
*************************************************************************/
|
|
||||||
|
/*************************************************************************
|
||||||
define CODESEG, SPACE=EROM
|
* Code
|
||||||
segment CODESEG
|
*************************************************************************/
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
* Code
|
* Name: z16f_lowuartinit
|
||||||
*************************************************************************/
|
*
|
||||||
|
* Description:
|
||||||
/*************************************************************************
|
* Initialize UART0 or UART1
|
||||||
* Name: z16f_lowuartinit
|
*
|
||||||
*
|
* Parameters:
|
||||||
* Description:
|
* None
|
||||||
* Initialize UART0 or UART1
|
*
|
||||||
*
|
*************************************************************************/
|
||||||
* Parameters:
|
|
||||||
* None
|
z16f_lowuartinit:
|
||||||
*
|
pushmlo <r0, r3> /* Save registers */
|
||||||
*************************************************************************/
|
|
||||||
|
/* Calculate and set the baud rate generation register */
|
||||||
z16f_lowuartinit:
|
|
||||||
pushmlo <r0, r3> /* Save registers */
|
|
||||||
|
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
||||||
/* Calculate and set the baud rate generation register */
|
ld r3, #CONFIG_UART0_BAUD /* r3 = baud */
|
||||||
|
#else
|
||||||
|
ld r3, #CONFIG_UART1_BAUD /* r3 = baud */
|
||||||
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
#endif
|
||||||
ld r3, #CONFIG_UART0_BAUD /* r3 = baud */
|
ld r0, r3 /* r0 = baud */
|
||||||
#else
|
sll r0, #3 /* r0 = baud * 8 */
|
||||||
ld r3, #CONFIG_UART1_BAUD /* r3 = baud */
|
add r0, #_SYS_CLK_FREQ /* r3 = freq + baud * 8*/
|
||||||
#endif
|
sll r3, #4 /* r3 = baud * 16 */
|
||||||
ld r0, r3 /* r0 = baud */
|
udiv r0, r3 /* BRG = (freq + baud * 8)/(baud * 16) */
|
||||||
sll r0, #3 /* r0 = baud * 8 */
|
|
||||||
add r0, #_SYS_CLK_FREQ /* r3 = freq + baud * 8*/
|
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
||||||
sll r3, #4 /* r3 = baud * 16 */
|
ld.w Z16F_UART0_BR, r0 /* Z16F_UART0_BR = BRG */
|
||||||
udiv r0, r3 /* BRG = (freq + baud * 8)/(baud * 16) */
|
|
||||||
|
/* Set the GPIO Alternate Function Register Lo (AFL) register */
|
||||||
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
|
||||||
ld.w Z16F_UART0_BR, r0 /* Z16F_UART0_BR = BRG */
|
ld r0, #%30
|
||||||
|
or.b Z16F_GPIOA_AFL, r0 /* Z16F_GPIOA_AFL |= %30 */
|
||||||
/* Set the GPIO Alternate Function Register Lo (AFL) register */
|
|
||||||
|
/* Enable UART receive (REN) and transmit (TEN) */
|
||||||
ld r0, #%30
|
|
||||||
or.b Z16F_GPIOA_AFL, r0 /* Z16F_GPIOA_AFL |= %30 */
|
clr.b Z16F_UART0_CTL1 /* Z16F_UART0_CTL1 = 0 */
|
||||||
|
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
|
||||||
/* Enable UART receive (REN) and transmit (TEN) */
|
ld.b Z16F_UART0_CTL0, r0 /* Z16F_UART0_CTL0 = %c0 */
|
||||||
|
#else
|
||||||
clr.b Z16F_UART0_CTL1 /* Z16F_UART0_CTL1 = 0 */
|
ld.w Z16F_UART1_BR, r0 /* Z16F_UART1_BR = BRG */
|
||||||
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
|
|
||||||
ld.b Z16F_UART0_CTL0, r0 /* Z16F_UART0_CTL0 = %c0 */
|
/* Set the GPIO Alternate Function Register Lo (AFL) register */
|
||||||
#else
|
|
||||||
ld.w Z16F_UART1_BR, r0 /* Z16F_UART1_BR = BRG */
|
ld r0, #%30
|
||||||
|
or.b Z16F_GPIOD_AFL, r0 /* Z16F_GPIOD_AFL |= %30 */
|
||||||
/* Set the GPIO Alternate Function Register Lo (AFL) register */
|
|
||||||
|
/* Enable UART receive (REN) and transmit (TEN) */
|
||||||
ld r0, #%30
|
|
||||||
or.b Z16F_GPIOD_AFL, r0 /* Z16F_GPIOD_AFL |= %30 */
|
clr.b Z16F_UART1_CTL1 /* Z16F_UART1_CTL1 = 0 */
|
||||||
|
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
|
||||||
/* Enable UART receive (REN) and transmit (TEN) */
|
ld.b Z16F_UART1_CTL0, r0 /* Z16F_UART1_CTL0 = %c0 */
|
||||||
|
#endif
|
||||||
clr.b Z16F_UART1_CTL1 /* Z16F_UART1_CTL1 = 0 */
|
popmlo <r0, r3> /* Restore registers */
|
||||||
ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
|
ret /* Return */
|
||||||
ld.b Z16F_UART1_CTL0, r0 /* Z16F_UART1_CTL0 = %c0 */
|
|
||||||
#endif
|
|
||||||
popmlo <r0, r3> /* Restore registers */
|
/*************************************************************************
|
||||||
ret /* Return */
|
* Name: _z16f_xmitc
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
/*************************************************************************
|
* Send one character on the selected port
|
||||||
* Name: _z16f_xmitc
|
*
|
||||||
*
|
* Parmeters:
|
||||||
* Description:
|
* r1 = character
|
||||||
* Send one character on the selected port
|
*
|
||||||
*
|
*************************************************************************/
|
||||||
* Parmeters:
|
|
||||||
* r1 = character
|
#ifdef CONFIG_ARCH_LOWPUTC
|
||||||
*
|
_z16f_xmitc:
|
||||||
*************************************************************************/
|
pushmlo <r0> /* Save registers */
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_LOWPUTC
|
_z16f_xmitc1:
|
||||||
_z16f_xmitc:
|
ld r0, Z16F_UARTSTAT0_TDRE /* TDRE=Transmitter Data Register Empty */
|
||||||
pushmlo <r0> /* Save registers */
|
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
||||||
|
tm.b Z16F_UART0_STAT0, r0 /* r0 = Z16F_UART0_STAT0 */
|
||||||
_z16f_xmitc1:
|
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & TDRE)) */
|
||||||
ld r0, #Z16F_UARTSTAT0_TDRE /* TDRE=Transmitter Data Register Empty */
|
ld.b Z16F_UART0_TXD, r1 /* Z16F_UART0_TXD = r1 (character) */
|
||||||
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
#else
|
||||||
tm.b Z16F_UART0_STAT0, r0 /* r0 = Z16F_UART0_STAT0 */
|
tm.b Z16F_UART1_STAT0, r0 /* r0 = Z16F_UART0_STAT1 */
|
||||||
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & TDRE)) */
|
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & TDRE)) */
|
||||||
ld.b Z16F_UART0_TXD, r1 /* Z16F_UART0_TXD = r1 (character) */
|
ld.b Z16F_UART1_TXD, r1 /* Z16F_UART1_TXD = r1 (character) */
|
||||||
#else
|
#endif
|
||||||
tm.b Z16F_UART1_STAT0, r0 /* r0 = Z16F_UART0_STAT1 */
|
popmlo <r0> /* Restore registers */
|
||||||
jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & TDRE)) */
|
ret /* Return */
|
||||||
ld.b Z16F_UART1_TXD, r1 /* Z16F_UART1_TXD = r1 (character) */
|
#endif
|
||||||
#endif
|
|
||||||
popmlo <r0> /* Restore registers */
|
/*************************************************************************
|
||||||
ret /* Return */
|
* Name: _up_lowputc
|
||||||
#endif
|
*
|
||||||
|
* Description:
|
||||||
/*************************************************************************
|
* Send one character to the selected serial console
|
||||||
* Name: _up_lowputc
|
*
|
||||||
*
|
* Parmeters:
|
||||||
* Description:
|
* r1 = character
|
||||||
* Send one character to the selected serial console
|
*
|
||||||
*
|
* Return
|
||||||
* Parmeters:
|
* R0 = 0
|
||||||
* r1 = character
|
*
|
||||||
*
|
*************************************************************************/
|
||||||
* Return
|
|
||||||
* R0 = 0
|
#ifdef CONFIG_ARCH_LOWPUTC
|
||||||
*
|
_up_lowputc:
|
||||||
*************************************************************************/
|
pushmlo <r1,r5> /* Save registers */
|
||||||
|
ld r0, r1
|
||||||
#ifdef CONFIG_ARCH_LOWPUTC
|
ext.ub r5, r0
|
||||||
_up_lowputc:
|
cp r5, #10
|
||||||
pushmlo <r1,r5> /* Save registers */
|
jp ne, _up_lowputc1 /* If (character == \n) */
|
||||||
ld r0,r1
|
|
||||||
ext.ub r5,r0
|
ld r1,#13
|
||||||
cp r5,#10
|
call _z16f_xmitc /* Call _z16f_xmitc with \r */
|
||||||
jp ne, _up_lowputc1 /* If (character == \n) */
|
|
||||||
|
_up_lowputc1:
|
||||||
ld r1,#13
|
ld r1, r0
|
||||||
call _z16f_xmitc /* Call _z16f_xmitc with \r */
|
call _z16f_xmitc /* Xall _z16f_xmitc with character */
|
||||||
|
|
||||||
_up_lowputc1:
|
ld r0, #0 /* return r0 = 0 */
|
||||||
ld r1, r0
|
popmlo <r1,r5> /* Restore registers */
|
||||||
call _z16f_xmitc /* Xall _z16f_xmitc with character */
|
ret /* Return */
|
||||||
|
#endif
|
||||||
ld r0, #0 /* return r0 = 0 */
|
|
||||||
popmlo <r1,r5> /* Restore registers */
|
/*************************************************************************
|
||||||
ret /* Return */
|
* Name: _up_lowgetc
|
||||||
#endif
|
*
|
||||||
|
* Description:
|
||||||
/*************************************************************************
|
* Get a character from the serial port
|
||||||
* Name: _up_lowgetc
|
*
|
||||||
*
|
* Parmeters:
|
||||||
* Description:
|
* None
|
||||||
* Get a character from the serial port
|
*
|
||||||
*
|
* Return
|
||||||
* Parmeters:
|
* R0 = Character read
|
||||||
* None
|
*
|
||||||
*
|
*************************************************************************/
|
||||||
* Return
|
|
||||||
* R0 = Character read
|
#ifdef CONFIG_ARCH_LOWGETC
|
||||||
*
|
_up_lowgetc:
|
||||||
*************************************************************************/
|
up_lowgetc1:
|
||||||
|
ld r0, #Z16F_UARTSTAT0_RDA /* RDA=Receive data available */
|
||||||
#ifdef CONFIG_ARCH_LOWGETC
|
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
||||||
_up_lowgetc:
|
tm.b Z16F_UART0_STAT0, r0
|
||||||
up_lowgetc1:
|
jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & RDA)) */
|
||||||
ld r0, #Z16F_UARTSTAT0_RDA /* RDA=Receive data available */
|
ld.ub r0, Z16F_UART0_RXD /* r0 = Z16F_UART0_RXD */
|
||||||
#ifdef CONFIG_UART0_SERIAL_CONSOLE
|
#else
|
||||||
tm.b Z16F_UART0_STAT0, r0
|
tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & RDA) */
|
||||||
jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & RDA)) */
|
jp eq, _up_lowgetc1
|
||||||
ld.ub r0, Z16F_UART0_RXD /* r0 = Z16F_UART0_RXD */
|
ld.ub r0, Z16F_UART1_RXD /* r0 = Z16F_UART1_RXD */
|
||||||
#else
|
#endif
|
||||||
tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & RDA) */
|
cp r0, #%0d /* Test for '\r' */
|
||||||
jp eq, _up_lowgetc1
|
jp eq, _up_lowgetc2
|
||||||
ld.ub r0, Z16F_UART1_RXD /* r0 = Z16F_UART1_RXD */
|
|
||||||
#endif
|
cp r0, #%0d /* Test \r + high bit */
|
||||||
cp r0, #%0d /* Test for '\r' */
|
jp ne, _up_lowgetc3
|
||||||
jp eq, _up_lowgetc2
|
_up_lowgetc2:
|
||||||
|
ld r0, #%0a /* Convert '\r' to '\n' */
|
||||||
cp r0, #%0d /* Test \r + high bit */
|
_up_lowgetc3: /* Return value in r0 */
|
||||||
jp ne, _up_lowgetc3
|
ret /* Return */
|
||||||
_up_lowgetc2:
|
#endif
|
||||||
ld r0, #%0a /* Convert '\r' to '\n' */
|
|
||||||
_up_lowgetc3: /* Return value in r0 */
|
#endif /* CONFIG_ARCH_LOWPUTC || CONFIG_ARCH_LOWGETC */
|
||||||
ret /* Return */
|
|
||||||
#endif
|
end
|
||||||
|
|
||||||
#endif /* CONFIG_ARCH_LOWPUTC || CONFIG_ARCH_LOWGETC */
|
|
||||||
|
|
||||||
end
|
|
||||||
|
|||||||
104
arch/z16/src/z16f/z16f_saveusercontext.S
Normal file
104
arch/z16/src/z16f/z16f_saveusercontext.S
Normal file
@ -0,0 +1,104 @@
|
|||||||
|
/*************************************************************************
|
||||||
|
* arch/z16/src/z16f/z16f_saveusercontext.asm
|
||||||
|
*
|
||||||
|
* Copyright (C) 2008 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSeqUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* Included Files
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <arch/irq.h>
|
||||||
|
#include "chip/chip.h"
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* External References / External Definitions
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
xdef up_saveusercontext
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* Data Allocation
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
define CODESEG, SPACE=EROM
|
||||||
|
segment CODESEG
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* Code
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
/*************************************************************************
|
||||||
|
* Name: up_saveusercontext
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Save the current user context.
|
||||||
|
* r0-r7: These are caller saved registers and do not need to be stored
|
||||||
|
* here
|
||||||
|
* r8-r13: There callee saved registers must be preserved
|
||||||
|
* r14: Frame pointer
|
||||||
|
* r15: Stack pointer (with return address on stack)
|
||||||
|
*
|
||||||
|
* Parameters:
|
||||||
|
* r1: pointer to the register save array in the XCPT structure
|
||||||
|
*
|
||||||
|
*************************************************************************/
|
||||||
|
|
||||||
|
up_saveusercontext:
|
||||||
|
/* Save the flags (needed to restore the interrupt state) */
|
||||||
|
|
||||||
|
ld r3, Z16F_CNTRL_FLAGS /* Fetch the flags register */
|
||||||
|
sll r3, #8 /* Pad with zero */
|
||||||
|
ld 2*REG_FLAGS(r1), r3
|
||||||
|
|
||||||
|
/* Save r8-R13 */
|
||||||
|
|
||||||
|
ld 2*REG_R8(r1), r8 /* Save r8 */
|
||||||
|
ld 2*REG_R8(r1), r9 /* Save r9 */
|
||||||
|
ld 2*REG_R8(r1), r10 /* Save r10 */
|
||||||
|
ld 2*REG_R8(r1), r11 /* Save r11 */
|
||||||
|
ld 2*REG_R8(r1), r12 /* Save r12 */
|
||||||
|
ld 2*REG_R8(r1), r13 /* Save r13 */
|
||||||
|
|
||||||
|
/* Save the stack pointer and the frame pointer */
|
||||||
|
|
||||||
|
ld 2*REG_FP(r1), fp /* Save the frame pointer */
|
||||||
|
ld 2*REG_SP(r1), sp /* Save the stack pointer */
|
||||||
|
|
||||||
|
/* Save the return address at the top of the stack */
|
||||||
|
|
||||||
|
ld r0, (sp) /* Save the return address */
|
||||||
|
ld 2*REG_PC(r1), r0
|
||||||
|
clr r0 /* Always returns 0 */
|
||||||
|
ret
|
||||||
|
end
|
||||||
@ -51,7 +51,7 @@
|
|||||||
#include <nuttx/serial.h>
|
#include <nuttx/serial.h>
|
||||||
#include <arch/serial.h>
|
#include <arch/serial.h>
|
||||||
|
|
||||||
#include "up_arch.h"
|
#include "chip/chip.h"
|
||||||
#include "os_internal.h"
|
#include "os_internal.h"
|
||||||
#include "up_internal.h"
|
#include "up_internal.h"
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user