Add ATMega128 configuration
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3695 42af7a65-404d-4744-a932-0658087f49c3
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@ -144,13 +144,19 @@
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#ifdef HAVE_USART_DEVICE
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void usart1_reset(void)
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{
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/* Clear USART configuration */
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UCSR1A = 0;
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UCSR1B = 0;
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UCSR1C = 0;
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/* Unconfigure pins */
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DDRD &= ~(1 << 3);
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PORTD &= ~(1 << 2);
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/* Unconfigure BAUD divisor */
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UBRR1 = 0;
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}
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#endif
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@ -214,10 +220,20 @@ void usart1_configure(void)
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UCSR1B = ucsr1b;
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UCSR1C = ucsr1c;
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/* Configure pin */
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/* Pin Configuration: None necessary, Port D bits 2&3 are automatically
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* configured:
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*
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* Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When
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* the USART1 receiver is enabled this pin is configured as an input
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* regardless of the value of DDD2. When the USART forces this pin to
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* be an input, the pull-up can still be controlled by the PORTD2 bit.
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* Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1).
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* When the USART1 Transmitter is enabled, this pin is configured as
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* an output regardless of the value of DDD3.
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*/
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DDRD |= (1 << 3);
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PORTD |= (1 << 2);
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DDRD |= (1 << 3); /* Force Port D pin 3 to be an output */
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PORTD |= (1 << 2); /* Set pull-up on port D pin 2 */
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/* Set the baud rate divisor */
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H
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#define __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H
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#ifndef __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H
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#define __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H
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/************************************************************************************
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* Included Files
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@ -80,5 +80,5 @@
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_AVR_SRC_AT90USB_AT90USB_CONFIG_H */
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#endif /* __ARCH_AVR_SRC_ATMEGA_ATMEGA_CONFIG_H */
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@ -49,7 +49,7 @@
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.file "atmega_exceptions.S"
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.global up_doirq
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.gloal up_fullcontextrestore
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.global up_fullcontextrestore
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/********************************************************************************************
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* Macros
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@ -58,10 +58,10 @@
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/* USART0 Baud rate settings for normal and double speed settings */
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#define AVR_NORMAL_UBRR0 \
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((((BOARD_CPU_CLOCK / 16) + (CONFIG_USART0_BAUD / 2)) / (CONFIG_USART0_BAUD)) - 1)
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(((((BOARD_CPU_CLOCK / 16) + (CONFIG_USART0_BAUD / 2)) / (CONFIG_USART0_BAUD)) - 1)
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#define AVR_DBLSPEED_UBRR0 \
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((((BOARD_CPU_CLOCK / 8) + (CONFIG_USART0_BAUD / 2)) / (CONFIG_USART0_BAUD)) - 1)
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(((((BOARD_CPU_CLOCK / 8) + (CONFIG_USART0_BAUD / 2)) / (CONFIG_USART0_BAUD)) - 1)
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/* Select normal or double speed baud settings. This is a trade-off between the
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* sampling rate and the accuracy of the divisor for high baud rates.
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@ -111,10 +111,10 @@
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/* USART1 Baud rate settings for normal and double speed settings */
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#define AVR_NORMAL_UBRR1 \
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(((BOARD_CPU_CLOCK / 16) + (CONFIG_USART1_BAUD / 2)) / (CONFIG_USART1_BAUD)) - 1)
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((((BOARD_CPU_CLOCK / 16) + (CONFIG_USART1_BAUD / 2)) / (CONFIG_USART1_BAUD)) - 1)
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#define AVR_DBLSPEED_UBRR1 \
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(((BOARD_CPU_CLOCK / 8) + (CONFIG_USART1_BAUD / 2)) / (CONFIG_USART1_BAUD)) - 1)
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((((BOARD_CPU_CLOCK / 8) + (CONFIG_USART1_BAUD / 2)) / (CONFIG_USART1_BAUD)) - 1)
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/* Select normal or double speed baud settings. This is a trade-off between the
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* sampling rate and the accuracy of the divisor for high baud rates.
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@ -196,27 +196,42 @@
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#ifdef CONFIG_ATMEGA_USART0
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void usart0_reset(void)
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{
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/* Clear USART configuration */
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UCSR0A = 0;
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UCSR0B = 0;
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UCSR0C = 0;
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# warning "Missing logic"
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/* Unconfigure pins (no action needed */
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UBRR0 = 0;
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DDRE &= ~(1 << 1);
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PORTE &= ~(1 << 0);
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/* Unconfigure BAUD divisor */
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UBRR0H = 0;
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UBRR0L = 0;
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}
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#endif
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#ifdef CONFIG_ATMEGA_USART1
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void usart1_reset(void)
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{
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/* Clear USART configuration */
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UCSR1A = 0;
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UCSR1B = 0;
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UCSR1C = 0;
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/* Unconfigure pins */
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DDRD &= ~(1 << 3);
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PORTD &= ~(1 << 2);
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UBRR1 = 0;
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/* Unconfigure BAUD divisor */
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UBRR1H = 0;
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UBRR1L = 0;
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}
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#endif
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@ -279,13 +294,28 @@ void usart0_configure(void)
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UCSR0B = ucsr0b;
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UCSR0C = ucsr0c;
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/* Configure pin */
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/* Pin Configuration: None necessary, Port E bits 0&1 are automatically
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* configured:
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*
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* Port E, Bit 0: RXD0, USART0 Receive Pin. Receive Data (Data input pin
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* for the USART0). When the USART0 receiver is enabled this pin is
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* configured as an input regardless of the value of DDRE0. When the
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* USART0 forces this pin to be an input, a logical one in PORTE0 will
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* turn on the internal pull-up.
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*
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* Port E, Bit 1: TXD0, UART0 Transmit pin.
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*
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* REVISIT: According to table 41, TXD0 is also automatically configured.
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* However, this is not explicitly stated in the text.
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*/
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#warning "Missing logic"
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DDRE |= (1 << 1); /* Force Port E pin 1 to be an input */
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PORTE |= (1 << 0); /* Set pull-up on Port E pin 0 */
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/* Set the baud rate divisor */
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UBRR0 = AVR_UBRR0;
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UBRR0H = AVR_UBRR1 >> 8;
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UBRR0L = AVR_UBRR1 & 0xff;
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}
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#endif
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@ -340,14 +370,25 @@ void usart1_configure(void)
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UCSR1B = ucsr1b;
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UCSR1C = ucsr1c;
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/* Configure pin */
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/* Pin Configuration: None necessary, Port D bits 2&3 are automatically
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* configured:
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*
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* Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When
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* the USART1 receiver is enabled this pin is configured as an input
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* regardless of the value of DDD2. When the USART forces this pin to
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* be an input, the pull-up can still be controlled by the PORTD2 bit.
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* Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1).
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* When the USART1 Transmitter is enabled, this pin is configured as
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* an output regardless of the value of DDD3.
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*/
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DDRD |= (1 << 3);
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PORTD |= (1 << 2);
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DDRD |= (1 << 3); /* Force Port D pin 3 to be an output */
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PORTD |= (1 << 2); /* Set pull-up on port D pin 2 */
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/* Set the baud rate divisor */
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UBRR1 = AVR_UBRR1;
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UBRR1H = AVR_UBRR1 >> 8;
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UBRR1L = AVR_UBRR1 & 0xff;
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}
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#endif
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@ -177,5 +177,5 @@ void up_timerinit(void)
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/* Enable the interrupt on compare match A */
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TIMSK1 |= (1 << OCIE1A);
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TIMSK |= (1 << OCIE1A);
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}
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@ -38,7 +38,6 @@
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****************************************************************************/
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#include <nuttx/config.h>
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#include "at90usb_config.h"
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#include <stdint.h>
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#include <errno.h>
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