diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig
index 76ea47282b..b32b4b24ae 100644
--- a/arch/mips/src/pic32mz/Kconfig
+++ b/arch/mips/src/pic32mz/Kconfig
@@ -364,6 +364,16 @@ config PIC32MZ_TRACE_ENABLE
 	---help---
 		Trace Enable
 
+config PIC32MZ_ECC_OPTION
+	int "PIC32 ECC control"
+	default 3
+	range 0 3
+	---help---
+		0: Flash ECC enabled (locked)
+		1: Dynamic Flash ECC enabled (locked) */
+		2: ECC / dynamic ECC disabled (locked) */
+		3: ECC / dynamic ECC disabled (writable) */
+
 endmenu
 
 menu "Device Configuration 1 (DEVCFG1)"
diff --git a/arch/mips/src/pic32mz/pic32mz-config.h b/arch/mips/src/pic32mz/pic32mz-config.h
index 678a35677b..0d356b6e79 100644
--- a/arch/mips/src/pic32mz/pic32mz-config.h
+++ b/arch/mips/src/pic32mz/pic32mz-config.h
@@ -438,9 +438,18 @@
 #  define CONFIG_PIC32MZ_BOOTISA DEVCFG0_BOOT_MIPS32
 #endif
 
+#ifndef CONFIG_PIC32MZ_ECC_OPTION
+#  define CONFIG_PIC32MZ_ECC_OPTION 3
+#endif
+#if CONFIG_PIC32MZ_ECC_OPTION < 0 || CONFIG_PIC32MZ_ECC_OPTION > 3
+#  error Invalid CONFIG_PIC32MZ_ECC_OPTION Invalid
+#  undef CONFIG_PIC32MZ_ECC_OPTION
+#  define CONFIG_PIC32MZ_ECC_OPTION 3
+#endif
+#define CONFIG_PIC32MZ_FECCCON  (CONFIG_PIC32MZ_ECC_OPTION << DEVCFG0_FECCCON_SHIFT)
+
 /* Not yet configurable settings */
 
-#define CONFIG_PIC32MZ_FECCCON  DEVCFG0_FECCCON_DISWR
 #define CONFIG_PIC32MZ_FSLEEP   DEVCFG0_FSLEEP_OFF
 #define CONFIG_PIC32MZ_DBGPER   DEVCFG0_DBGPER_ALL
 #define CONFIG_PIC32MZ_EJTAGBEN DEVCFG0_EJTAG_NORMAL
diff --git a/arch/mips/src/pic32mz/pic32mz-lowinit.c b/arch/mips/src/pic32mz/pic32mz-lowinit.c
index 15534c37ca..c8f2839c9c 100644
--- a/arch/mips/src/pic32mz/pic32mz-lowinit.c
+++ b/arch/mips/src/pic32mz/pic32mz-lowinit.c
@@ -51,6 +51,7 @@
 #include "chip/pic32mz-prefetch.h"
 #include "chip/pic32mz-osc.h"
 
+#include "pic32mz-config.h"
 #include "pic32mz-lowconsole.h"
 #include "pic32mz-lowinit.h"
 
@@ -59,8 +60,12 @@
  ****************************************************************************/
 /* Maximum Frequencies ******************************************************/
 
-#define MAX_FLASH_ECC_HZ    66000000 /* Maximum FLASH speed (Hz) with ECC */
-#define MAX_FLASH_NOECC_HZ  83000000 /* Maximum FLASH speed (Hz) without ECC */
+#if CONFIG_PIC32MZ_ECC_OPTION == 3
+#  define MAX_FLASH_HZ       83000000 /* Maximum FLASH speed (Hz) without ECC */
+#else
+#  define MAX_FLASH_HZ       66000000 /* Maximum FLASH speed (Hz) with ECC */
+#endif
+
 #define MAX_PBCLK           100000000 /* Max peripheral bus speed (Hz) */
 #define MAX_PBCLK7          200000000 /* Max peripheral bus speed (Hz) for PBCLK7 */
 
@@ -199,15 +204,23 @@ static inline void pic32mz_prefetch(void)
   unsigned int residual;
   uint32_t regval;
 
-  /* Configure pre-fetch cache FLASH wait states (assuming ECC is enabled) */
+  /* Configure pre-fetch cache FLASH wait states (assuming ECC is enabled).
+   * REVISIT: Is this calculation right?  It seems like residual should be
+   *
+   *    residual = BOARD_CPU_CLOCK / nwaits
+   *
+   * This logic uses:
+   *
+   *    BOARD_CPU_CLOCK - nwaits * MAX_FLASH_HZ
+   */
 
   residual = BOARD_CPU_CLOCK;
   nwaits   = 0;
 
-  while (residual > MAX_FLASH_ECC_HZ)
+  while (residual > MAX_FLASH_HZ)
     {
       nwaits++;
-      residual -= MAX_FLASH_ECC_HZ;
+      residual -= MAX_FLASH_HZ;
     }
 
   DEBUGASSERT(nwaits < 8);
diff --git a/configs/pic32mz-starterkit/nsh/defconfig b/configs/pic32mz-starterkit/nsh/defconfig
index 955783081b..8cd3f3e775 100644
--- a/configs/pic32mz-starterkit/nsh/defconfig
+++ b/configs/pic32mz-starterkit/nsh/defconfig
@@ -156,6 +156,7 @@ CONFIG_PIC32MZ_UART1=y
 # CONFIG_PIC32MZ_JTAG_ENABLE is not set
 CONFIG_PIC32MZ_ICESEL_CH2=y
 # CONFIG_PIC32MZ_TRACE_ENABLE is not set
+CONFIG_PIC32MZ_ECC_OPTION=3
 
 #
 # Device Configuration 1 (DEVCFG1)