Fix several errors, mostly related to interrupt setup
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1211 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
parent
ac5cd9e084
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0751e5dd75
@ -139,8 +139,8 @@ struct up_dev_s
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{
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uint32 scibase; /* Base address of SCI registers */
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uint32 baud; /* Configured baud */
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ubyte scr; /* Saved SCR value */
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ubyte ssr; /* Saved SR value (only used during interrupt processing) */
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volatile ubyte scr; /* Saved SCR value */
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volatile ubyte ssr; /* Saved SR value (only used during interrupt processing) */
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ubyte irq; /* IRQ associated with this SCI */
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ubyte parity; /* 0=none, 1=odd, 2=even */
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ubyte bits; /* Number of bits (7 or 8) */
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@ -155,7 +155,10 @@ static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupt(int irq, void *context);
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static int up_rxinterrupt(int irq, void *context);
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static int up_erinterrupt(int irq, void *context);
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static int up_txinterrupt(int irq, void *context);
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static int up_interrupt(int irqbase);
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static int up_receive(struct uart_dev_s *dev, uint32 *status);
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static void up_rxint(struct uart_dev_s *dev, boolean enable);
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static boolean up_rxavailable(struct uart_dev_s *dev);
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@ -276,10 +279,10 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, ubyte value)
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}
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/****************************************************************************
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* Name: up_disableuartint
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* Name: up_disablesciint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv, ubyte *scr)
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static inline void up_disablesciint(struct up_dev_s *priv, ubyte *scr)
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{
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/* Return a copy of the current scr settings */
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@ -290,15 +293,15 @@ static inline void up_disableuartint(struct up_dev_s *priv, ubyte *scr)
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/* The disable all interrupts */
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priv->scr |= SH1_SCISCR_ALLINTS;
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priv->scr &= ~SH1_SCISCR_ALLINTS;
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up_serialout(priv, SH1_SCI_SCR_OFFSET, priv->scr);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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* Name: up_restoresciint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, ubyte scr)
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static inline void up_restoresciint(struct up_dev_s *priv, ubyte scr)
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{
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/* Set the interrupt bits in the scr value */
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@ -454,7 +457,7 @@ static int up_setup(struct uart_dev_s *dev)
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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up_disableuartint(priv, NULL);
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up_disablesciint(priv, NULL);
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}
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/****************************************************************************
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@ -477,18 +480,38 @@ static int up_attach(struct uart_dev_s *dev)
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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int ret;
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/* Attach the RDR full IRQ */
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/* Attach the RDR full IRQ (RXI) that is enabled by the RIE SCR bit */
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ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt);
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ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_rxinterrupt);
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if (ret == OK)
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{
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/* Attach the TDR empty IRQ */
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/* The RIE interrupt enable also enables the receive error interrupt (ERI) */
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ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt);
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if (ret < 0)
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ret = irq_attach(priv->irq + SH1_ERI_IRQ_OFFSET, up_erinterrupt);
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if (ret == OK)
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{
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(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
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/* Attach the TDR empty IRQ (TXI) enabled by the TIE SCR bit */
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ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_txinterrupt);
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if (ret == OK)
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{
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/* All SCI0 interrupts share the same prioritization */
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up_prioritize_irq(priv->irq, 7); /* Set SCI priority midway */
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/* Return OK on success */
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return OK;
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}
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/* Detach the ERI interrupt on failure */
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(void)irq_detach(priv->irq + SH1_ERI_IRQ_OFFSET);
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}
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/* Detach the RXI interrupt on failure */
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(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
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}
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return ret;
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@ -507,8 +530,47 @@ static int up_attach(struct uart_dev_s *dev)
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static void up_detach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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up_disableuartint(priv, NULL);
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irq_detach(priv->irq);
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/* Disable all SCI interrupts */
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up_disablesciint(priv, NULL);
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/* Detach the SCI interrupts */
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(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
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(void)irq_detach(priv->irq + SH1_ERI_IRQ_OFFSET);
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(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
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/* Set the interrupt priority to zero (masking all SCI interrupts). NOTE
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* that all SCI0 interrupts share the same prioritization.
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*/
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up_prioritize_irq(priv->irq, 0);
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}
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/****************************************************************************
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* Name: up_rxinterrupt / up_erinterrupt / up_txinterrupt
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*
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* Description:
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* These are simple "front-ends" to up-interrupt to handle the different
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* IRQs used by the RX and TX interrupt. The IRQ is necessary to work
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* back to the private data structure for the interrupt SCI.
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*
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****************************************************************************/
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static int up_rxinterrupt(int irq, void *context)
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{
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return up_interrupt(irq - SH1_RXI_IRQ_OFFSET);
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}
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static int up_erinterrupt(int irq, void *context)
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{
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return up_interrupt(irq - SH1_ERI_IRQ_OFFSET);
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}
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static int up_txinterrupt(int irq, void *context)
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{
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return up_interrupt(irq - SH1_TXI_IRQ_OFFSET);
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}
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/****************************************************************************
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@ -520,11 +582,11 @@ static void up_detach(struct uart_dev_s *dev)
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* uart_transmitchars or uart_receivechar to perform the
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* appropriate data transfers. The interrupt handling logic\
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* must be able to map the 'irq' number into the approprite
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* uart_dev_s structure in order to call these functions.
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* up_dev_s structure in order to call these functions.
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*
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****************************************************************************/
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static int up_interrupt(int irq, void *context)
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static int up_interrupt(int irqbase)
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{
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struct uart_dev_s *dev = NULL;
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struct up_dev_s *priv;
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@ -532,32 +594,18 @@ static int up_interrupt(int irq, void *context)
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boolean handled;
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#ifdef CONFIG_SH1_SCI0
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if (g_sci0priv.irq == irq)
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if (g_sci0priv.irq == irqbase)
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{
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dev = &g_sci0port;
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}
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else
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#endif
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#ifdef CONFIG_SH1_SCI1
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if (g_sci1priv.irq == irq)
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if (g_sci1priv.irq == irqbase)
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{
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dev = &g_sci1port;
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}
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else
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#endif
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#ifdef CONFIG_SH1_SCI2
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if (g_sci2priv.irq == irq)
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{
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dev = &g_sci2port;
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}
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else
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#endif
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#ifdef CONFIG_SH1_SCI3
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if (g_sci3priv.irq == irq)
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{
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dev = &g_sci3port;
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}
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else
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#endif
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{
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PANIC(OSERR_INTERNAL);
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@ -568,7 +616,7 @@ static int up_interrupt(int irq, void *context)
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* until we have been looping for a long time.
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*/
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for (passes = 0, handled = FALSE; passes < 256 && handled; passes++)
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for (passes = 0, handled = TRUE; passes < 256 && handled; passes++)
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{
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handled = FALSE;
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@ -595,6 +643,16 @@ static int up_interrupt(int irq, void *context)
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uart_xmitchars(dev);
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handled = TRUE;
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}
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/* Clear all (clear-able) status flags. Note that that SH-1 requires
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* that you read the bit in the "1" then write "0" to the bit in order
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* to clear it. Any bits in the SSR that transitioned from 0->1 will
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* not be effected by the following:
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*/
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priv->ssr &= ~(SH1_SCISSR_TDRE|SH1_SCISSR_RDRF|SH1_SCISSR_ORER|\
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SH1_SCISSR_FER|SH1_SCISSR_PER|SH1_SCISSR_TEND);
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up_serialout(priv, SH1_SCI_SSR_OFFSET, priv->ssr);
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}
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return OK;
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}
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@ -630,6 +688,14 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status)
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static void up_rxint(struct uart_dev_s *dev, boolean enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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irqstate_t flags;
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/* Disable interrupts to prevent asynchronous accesses */
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flags = irqsave();
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/* Are we enabling or disabling? */
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if (enable)
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{
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/* Enable the RDR full interrupt */
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@ -648,6 +714,7 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable)
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/* Write the modified SCR value to hardware */
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up_serialout(priv, SH1_SCI_SCR_OFFSET, priv->scr);
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irqrestore(flags);
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}
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/****************************************************************************
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@ -701,12 +768,35 @@ static void up_send(struct uart_dev_s *dev, int ch)
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static void up_txint(struct uart_dev_s *dev, boolean enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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irqstate_t flags;
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/* Disable interrupts to prevent asynchronous accesses */
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flags = irqsave();
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/* Are we enabling or disabling? */
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if (enable)
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{
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#ifndef CONFIG_SUPPRESS_SERIAL_INTS
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/* Enable the TDR empty interrupt */
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#ifndef CONFIG_SUPPRESS_SERIAL_INTS
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priv->scr |= SH1_SCISCR_TIE;
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/* If the TDR is already empty, then don't wait for the interrupt */
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#if 1
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if (up_txready(dev))
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{
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/* Tx data register empty ... process outgoing bytes. Note:
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* this could call up_txint to be called recursively. However,
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* in this event, priv->scr should hold the correct value upon
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* return from uuart_xmitchars().
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*/
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uart_xmitchars(dev);
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}
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#endif
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#endif
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}
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else
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@ -719,6 +809,7 @@ static void up_txint(struct uart_dev_s *dev, boolean enable)
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/* Write the modified SCR value to hardware */
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up_serialout(priv, SH1_SCI_SCR_OFFSET, priv->scr);
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irqrestore(flags);
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}
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/****************************************************************************
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@ -736,7 +827,7 @@ static boolean up_txready(struct uart_dev_s *dev)
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}
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/****************************************************************************
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* Public Funtions
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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@ -755,12 +846,12 @@ void up_earlyserialinit(void)
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* up_lowsetup
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*/
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/* Disable all UARTS */
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/* Disable all SCIs */
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#ifdef TTYS0_DEV
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up_disableuartint(TTYS0_DEV.priv, NULL);
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up_disablesciint(TTYS0_DEV.priv, NULL);
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#ifdef TTYS1_DEV
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up_disableuartint(TTYS1_DEV.priv, NULL);
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up_disablesciint(TTYS1_DEV.priv, NULL);
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#endif
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#endif
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@ -813,7 +904,7 @@ int up_putc(int ch)
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struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
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ubyte scr;
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up_disableuartint(priv, &scr);
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up_disablesciint(priv, &scr);
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/* Check for LF */
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@ -829,7 +920,7 @@ int up_putc(int ch)
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up_serialout(priv, SH1_SCI_TDR_OFFSET, (ubyte)ch);
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up_waittxready(priv);
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up_restoreuartint(priv, scr);
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up_restoresciint(priv, scr);
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#endif
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return ch;
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}
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