arch/stm32h7: Fix nxstyle errors

arch/arm/src/stm32h7/stm32_usbhost.h:

    * Fix nxstyle issues.
This commit is contained in:
Nathan Hartman 2021-01-15 15:40:11 -05:00 committed by Abdelatif Guettouche
parent 938db2fa9e
commit 07b1014ef0

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/stm32h7/stm32_usbhost.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
@ -31,7 +31,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32H7_STM32_USBHOST_H
#define __ARCH_ARM_SRC_STM32H7_STM32_USBHOST_H
@ -61,9 +61,9 @@
* debug. Depends on CONFIG_DEBUG_FEATURES.
*/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
@ -71,59 +71,58 @@
#if (defined(CONFIG_STM32H7_OTGFS) || defined(CONFIG_STM32H7_OTGHS)) && \
defined(CONFIG_USBHOST)
#ifdef HAVE_USBHOST_TRACE
enum usbhost_trace1codes_e
{
__TRACE1_BASEVALUE = 0, /* This will force the first value to be 1 */
OTG_TRACE1_DEVDISCONN, /* OTG ERROR: Host Port Device disconnected */
OTG_TRACE1_IRQATTACH, /* OTG ERROR: Failed to attach IRQ */
OTG_TRACE1_TRNSFRFAILED, /* OTG ERROR: Host Port Transfer Failed */
OTG_TRACE1_SENDSETUP, /* OTG ERROR: sendsetup() failed with: */
OTG_TRACE1_SENDDATA, /* OTG ERROR: senddata() failed with: */
OTG_TRACE1_RECVDATA, /* OTG ERROR: recvdata() failed with: */
OTG_TRACE1_DEVDISCONN, /* OTG ERROR: Host Port Device disconnected */
OTG_TRACE1_IRQATTACH, /* OTG ERROR: Failed to attach IRQ */
OTG_TRACE1_TRNSFRFAILED, /* OTG ERROR: Host Port Transfer Failed */
OTG_TRACE1_SENDSETUP, /* OTG ERROR: sendsetup() failed with: */
OTG_TRACE1_SENDDATA, /* OTG ERROR: senddata() failed with: */
OTG_TRACE1_RECVDATA, /* OTG ERROR: recvdata() failed with: */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OTG_VTRACE1_CONNECTED, /* OTG Host Port connected */
OTG_VTRACE1_DISCONNECTED, /* OTG Host Port disconnected */
OTG_VTRACE1_GINT, /* OTG Handling Interrupt. Entry Point */
OTG_VTRACE1_GINT_SOF, /* OTG Handle the start of frame interrupt */
OTG_VTRACE1_GINT_RXFLVL, /* OTG Handle the RxFIFO non-empty interrupt */
OTG_VTRACE1_GINT_NPTXFE, /* OTG Handle the non-periodic TxFIFO empty interrupt */
OTG_VTRACE1_GINT_PTXFE, /* OTG Handle the periodic TxFIFO empty interrupt */
OTG_VTRACE1_GINT_HC, /* OTG Handle the host channels interrupt */
OTG_VTRACE1_GINT_HPRT, /* OTG Handle the host port interrupt */
OTG_VTRACE1_GINT_HPRT_POCCHNG, /* OTG HPRT: Port Over-Current Change*/
OTG_VTRACE1_GINT_HPRT_PCDET, /* OTG HPRT: Port Connect Detect */
OTG_VTRACE1_GINT_HPRT_PENCHNG, /* OTG HPRT: Port Enable Changed */
OTG_VTRACE1_GINT_HPRT_LSDEV, /* OTG HPRT: Low Speed Device Connected */
OTG_VTRACE1_GINT_HPRT_FSDEV, /* OTG HPRT: Full Speed Device Connected */
OTG_VTRACE1_GINT_HPRT_LSFSSW, /* OTG HPRT: Host Switch: LS -> FS */
OTG_VTRACE1_GINT_HPRT_FSLSSW, /* OTG HPRT: Host Switch: FS -> LS */
OTG_VTRACE1_GINT_DISC, /* OTG Handle the disconnect detected interrupt */
OTG_VTRACE1_GINT_IPXFR, /* OTG Handle the incomplete periodic transfer */
OTG_VTRACE1_CONNECTED, /* OTG Host Port connected */
OTG_VTRACE1_DISCONNECTED, /* OTG Host Port disconnected */
OTG_VTRACE1_GINT, /* OTG Handling Interrupt. Entry Point */
OTG_VTRACE1_GINT_SOF, /* OTG Handle the start of frame interrupt */
OTG_VTRACE1_GINT_RXFLVL, /* OTG Handle the RxFIFO non-empty interrupt */
OTG_VTRACE1_GINT_NPTXFE, /* OTG Handle the non-periodic TxFIFO empty interrupt */
OTG_VTRACE1_GINT_PTXFE, /* OTG Handle the periodic TxFIFO empty interrupt */
OTG_VTRACE1_GINT_HC, /* OTG Handle the host channels interrupt */
OTG_VTRACE1_GINT_HPRT, /* OTG Handle the host port interrupt */
OTG_VTRACE1_GINT_HPRT_POCCHNG, /* OTG HPRT: Port Over-Current Change */
OTG_VTRACE1_GINT_HPRT_PCDET, /* OTG HPRT: Port Connect Detect */
OTG_VTRACE1_GINT_HPRT_PENCHNG, /* OTG HPRT: Port Enable Changed */
OTG_VTRACE1_GINT_HPRT_LSDEV, /* OTG HPRT: Low Speed Device Connected */
OTG_VTRACE1_GINT_HPRT_FSDEV, /* OTG HPRT: Full Speed Device Connected */
OTG_VTRACE1_GINT_HPRT_LSFSSW, /* OTG HPRT: Host Switch: LS -> FS */
OTG_VTRACE1_GINT_HPRT_FSLSSW, /* OTG HPRT: Host Switch: FS -> LS */
OTG_VTRACE1_GINT_DISC, /* OTG Handle the disconnect detected interrupt */
OTG_VTRACE1_GINT_IPXFR, /* OTG Handle the incomplete periodic transfer */
#endif
__TRACE1_NSTRINGS, /* Separates the format 1 from the format 2 strings */
__TRACE1_NSTRINGS, /* Separates the format 1 from the format 2 strings */
OTG_TRACE2_CLIP, /* OTG CLIP: chidx: buflen: */
OTG_TRACE2_CLIP, /* OTG CLIP: chidx: buflen: */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OTG_VTRACE2_CHANWAKEUP_IN, /* OTG IN Channel wake up with result */
OTG_VTRACE2_CHANWAKEUP_OUT, /* OTG OUT Channel wake up with result */
OTG_VTRACE2_CTRLIN, /* OTG CTRLIN */
OTG_VTRACE2_CTRLOUT, /* OTG CTRLOUT */
OTG_VTRACE2_INTRIN, /* OTG INTRIN */
OTG_VTRACE2_INTROUT, /* OTG INTROUT */
OTG_VTRACE2_BULKIN, /* OTG BULKIN */
OTG_VTRACE2_BULKOUT, /* OTG BULKOUT */
OTG_VTRACE2_ISOCIN, /* OTG ISOCIN */
OTG_VTRACE2_ISOCOUT, /* OTG ISOCOUT */
OTG_VTRACE2_STARTTRANSFER, /* OTG EP buflen */
OTG_VTRACE2_CHANWAKEUP_IN, /* OTG IN Channel wake up with result */
OTG_VTRACE2_CHANWAKEUP_OUT, /* OTG OUT Channel wake up with result */
OTG_VTRACE2_CTRLIN, /* OTG CTRLIN */
OTG_VTRACE2_CTRLOUT, /* OTG CTRLOUT */
OTG_VTRACE2_INTRIN, /* OTG INTRIN */
OTG_VTRACE2_INTROUT, /* OTG INTROUT */
OTG_VTRACE2_BULKIN, /* OTG BULKIN */
OTG_VTRACE2_BULKOUT, /* OTG BULKOUT */
OTG_VTRACE2_ISOCIN, /* OTG ISOCIN */
OTG_VTRACE2_ISOCOUT, /* OTG ISOCOUT */
OTG_VTRACE2_STARTTRANSFER, /* OTG EP buflen */
OTG_VTRACE2_CHANCONF_CTRL_IN,
OTG_VTRACE2_CHANCONF_CTRL_OUT,
OTG_VTRACE2_CHANCONF_INTR_IN,
@ -132,11 +131,11 @@ enum usbhost_trace1codes_e
OTG_VTRACE2_CHANCONF_BULK_OUT,
OTG_VTRACE2_CHANCONF_ISOC_IN,
OTG_VTRACE2_CHANCONF_ISOC_OUT,
OTG_VTRACE2_CHANHALT, /* Channel halted. chidx: , reason: */
OTG_VTRACE2_CHANHALT, /* Channel halted. chidx: , reason: */
#endif
__TRACE2_NSTRINGS /* Total number of enumeration values */
__TRACE2_NSTRINGS /* Total number of enumeration values */
};
# define TRACE1_FIRST ((int)__TRACE1_BASEVALUE + 1)
@ -149,9 +148,9 @@ enum usbhost_trace1codes_e
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
@ -164,31 +163,34 @@ extern "C"
#define EXTERN extern
#endif
/***********************************************************************************
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
* Enable/disable driving of VBUS 5V output. This function must be
* provided be each platform that implements the STM32 OTG FS host
* interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
* "On-chip 5 V VBUS generation is not supported. For this reason, a
* charge pump or, if 5 V are available on the application board, a basic
* power switch, must be added externally to drive the 5 V VBUS line.
* The external charge pump can be driven by any GPIO output. When the
* application decides to power on VBUS using the chosen GPIO, it must
* also set the port power bit in the host port control and status
* register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an overcurrent condition."
* "The application uses this field to control power to this port, and the
* core clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* iface - For future growth to handle multiple USB host interface.
* Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
****************************************************************************/
void stm32_usbhost_vbusdrive(int iface, bool enable);