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armv7a/irq: enable fiq in tee, enable irq in ap

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According to the current design on the armv7-a platform,
only fiq is processed in TEE, while irq and fiq are processed
in REE.
If we enable the irq function in TEE, when we process
some signal-related scenarios in TEE,
such as the ostest sighand testcase, this testcase will
call up_irq_enable() to enable irq interrupt in the
arm_sigdeliver() function. After the signal processing
logic is executed, irq will be disabled again.
During the interval of enabling irq, some external device
irq interrupts will be enabled, but these external device
irqs do not have corresponding handlers registered in TEE,
so an "unexpected irq isr exception" will be triggered.
Therefore, a better implementation is to keep the original
implementation of the up_irq_enable() function, that is,
to enable only fiq in TEE and to enable irq and fiq in REE.
Then  for vendor-specific requirements, such as the need to
briefly enable irq during the TEE initialization process
and then disable irq before starting APz in TEE, we directly
provide a separate implementation of enabling irq in the
vendor, without modifying the implementation of the public
up_enable_irq() function.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
This commit is contained in:
guoshichao 2024-05-08 17:31:41 +08:00 committed by Xiang Xiao
parent 590c7fe129
commit 07c370817c
1 changed files with 4 additions and 3 deletions
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7
arch/arm/include/armv7-a/irq.h
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@ -379,10 +379,11 @@ static inline irqstate_t up_irq_enable(void)
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_HIPRI_INTERRUPT)
#if defined(CONFIG_ARCH_HIPRI_INTERRUPT)
"\tcpsie if\n"
#elif defined(CONFIG_ARCH_TRUSTZONE_SECURE)
"\tcpsie f\n"
#endif
#ifndef CONFIG_ARCH_TRUSTZONE_SECURE
#else
"\tcpsie i\n"
#endif
: "=r" (cpsr)