Updates to the STM32 OTGFS host logic from Leo
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@ -1,7 +1,7 @@
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/****************************************************************************************************
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* arch/arm/src/stm32/chip/stm32_otgfs.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -485,7 +485,8 @@
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#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */
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#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */
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#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */
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#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer */
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#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */
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#define OTGFS_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
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/* Bits 22-23: Reserved, must be kept at reset value */
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#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */
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#define OTGFS_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */
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@ -135,11 +135,6 @@
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# undef CONFIG_STM32_USBHOST_PKTDUMP
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#endif
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#undef HAVE_USB_TRACE
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#if defined(CONFIG_USBHOST_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
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# define HAVE_USB_TRACE 1
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#endif
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/* HCD Setup *******************************************************************/
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/* Hardware capabilities */
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@ -356,7 +351,7 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv);
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static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv);
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static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv);
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static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv);
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static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv);
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static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv);
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/* First level, global interrupt handler */
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@ -726,7 +721,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
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case OTGFS_EPTYPE_CTRL:
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case OTGFS_EPTYPE_BULK:
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{
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#ifdef HAVE_USB_TRACE
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#ifdef HAVE_USBHOST_TRACE_VERBOSE
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uint16_t intrace;
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uint16_t outtrace;
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@ -779,7 +774,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
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priv->chan[chidx].epno);
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regval |= OTGFS_HCINT_BBERR;
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}
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#ifdef HAVE_USB_TRACE
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#ifdef HAVE_USBHOST_TRACE_VERBOSE
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else
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{
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usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_OUT, chidx,
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@ -803,7 +798,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
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priv->chan[chidx].epno);
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regval |= (OTGFS_HCINT_TXERR | OTGFS_HCINT_BBERR);
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}
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#ifdef HAVE_USB_TRACE
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#ifdef HAVE_USBHOST_TRACE_VERBOSE
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else
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{
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usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, chidx,
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@ -2781,14 +2776,14 @@ static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv)
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}
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/*******************************************************************************
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* Name: stm32_gint_iisooxfrisr
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* Name: stm32_gint_ipxfrisr
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*
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* Description:
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* USB OTG FS incomplete isochronous interrupt handler
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* USB OTG FS incomplete periodic interrupt handler
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*
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*******************************************************************************/
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static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv)
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static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv)
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{
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uint32_t regval;
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@ -2802,7 +2797,7 @@ static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv)
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/* Clear the incomplete isochronous OUT interrupt */
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stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_IISOOXFR);
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stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_IPXFR);
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}
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/*******************************************************************************
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@ -2911,12 +2906,12 @@ static int stm32_gint_isr(int irq, FAR void *context)
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stm32_gint_discisr(priv);
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}
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/* Handle the incomplete isochronous OUT transfer */
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/* Handle the incomplete periodic transfer */
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if ((pending & OTGFS_GINT_IISOOXFR) != 0)
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if ((pending & OTGFS_GINT_IPXFR) != 0)
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{
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usbhost_vtrace1(OTGFS_VTRACE1_GINT_IISOOXFR, 0);
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stm32_gint_iisooxfrisr(priv);
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stm32_gint_ipxfrisr(priv);
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}
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}
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@ -3025,7 +3020,7 @@ static inline void stm32_hostinit_enable(void)
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regval |= (OTGFS_GINT_SOF | OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR |
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OTGFS_GINT_HPRT | OTGFS_GINT_HC | OTGFS_GINT_DISC);
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#else
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regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR | OTGFS_GINT_HPRT |
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regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IPXFR | OTGFS_GINT_HPRT |
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OTGFS_GINT_HC | OTGFS_GINT_DISC);
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#endif
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stm32_putreg(STM32_OTGFS_GINTMSK, regval);
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@ -102,7 +102,7 @@ static const struct stm32_usbhost_trace_s g_trace1[TRACE1_NSTRINGS] =
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TRENTRY(OTGFS_VTRACE1_GINT_HC, TR_FMT1, "OTGFS Handle the host channels interrupt.\n"),
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TRENTRY(OTGFS_VTRACE1_GINT_HPRT, TR_FMT1, "OTGFS Handle the host port interrupt.\n"),
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TRENTRY(OTGFS_VTRACE1_GINT_DISC, TR_FMT1, "OTGFS Handle the disconnect detected interrupt.\n"),
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TRENTRY(OTGFS_VTRACE1_GINT_IISOOXFR, TR_FMT1, "OTGFS Handle the incomplete isochronous OUT transfer.\n"),
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TRENTRY(OTGFS_VTRACE1_GINT_IPXFR, TR_FMT1, "OTGFS Handle the incomplete periodic transfer.\n"),
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# endif
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#endif
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@ -75,7 +75,7 @@ enum usbhost_trace1codes_e
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OTGFS_VTRACE1_GINT_HC, /* OTGFS Handle the host channels interrupt */
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OTGFS_VTRACE1_GINT_HPRT, /* OTGFS Handle the host port interrupt */
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OTGFS_VTRACE1_GINT_DISC, /* OTGFS Handle the disconnect detected interrupt */
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OTGFS_VTRACE1_GINT_IISOOXFR, /* OTGFS Handle the incomplete isochronous OUT transfer */
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OTGFS_VTRACE1_GINT_IPXFR, /* OTGFS Handle the incomplete periodic transfer */
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# endif
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#endif
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