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Updates to the STM32 OTGFS host logic from Leo

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This commit is contained in:
Gregory Nutt 2014-04-15 08:49:33 -06:00
parent 7ad2ace833
commit 08218f977e
4 changed files with 17 additions and 21 deletions
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5
arch/arm/src/stm32/chip/stm32_otgfs.h
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@ -1,7 +1,7 @@
/**************************************************************************************************** /****************************************************************************************************
* arch/arm/src/stm32/chip/stm32_otgfs.h * arch/arm/src/stm32/chip/stm32_otgfs.h
* *
* Copyright (C) 2012 Gregory Nutt. All rights reserved. * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -485,7 +485,8 @@
#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */ #define OTGFS_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */
#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */ #define OTGFS_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */
#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */ #define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */
#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer */ #define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */
#define OTGFS_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
/* Bits 22-23: Reserved, must be kept at reset value */ /* Bits 22-23: Reserved, must be kept at reset value */
#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */ #define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */
#define OTGFS_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */ #define OTGFS_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */

29
arch/arm/src/stm32/stm32_otgfshost.c
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@ -135,11 +135,6 @@
# undef CONFIG_STM32_USBHOST_PKTDUMP # undef CONFIG_STM32_USBHOST_PKTDUMP
#endif #endif
#undef HAVE_USB_TRACE
#if defined(CONFIG_USBHOST_TRACE) || (defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_USB))
# define HAVE_USB_TRACE 1
#endif
/* HCD Setup *******************************************************************/ /* HCD Setup *******************************************************************/
/* Hardware capabilities */ /* Hardware capabilities */
@ -356,7 +351,7 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv);
static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv); static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv);
static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv); static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv);
static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv); static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv);
static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv); static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv);
/* First level, global interrupt handler */ /* First level, global interrupt handler */
@ -726,7 +721,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
case OTGFS_EPTYPE_CTRL: case OTGFS_EPTYPE_CTRL:
case OTGFS_EPTYPE_BULK: case OTGFS_EPTYPE_BULK:
{ {
#ifdef HAVE_USB_TRACE #ifdef HAVE_USBHOST_TRACE_VERBOSE
uint16_t intrace; uint16_t intrace;
uint16_t outtrace; uint16_t outtrace;
@ -779,7 +774,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
priv->chan[chidx].epno); priv->chan[chidx].epno);
regval |= OTGFS_HCINT_BBERR; regval |= OTGFS_HCINT_BBERR;
} }
#ifdef HAVE_USB_TRACE #ifdef HAVE_USBHOST_TRACE_VERBOSE
else else
{ {
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_OUT, chidx, usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_INTR_OUT, chidx,
@ -803,7 +798,7 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx)
priv->chan[chidx].epno); priv->chan[chidx].epno);
regval |= (OTGFS_HCINT_TXERR | OTGFS_HCINT_BBERR); regval |= (OTGFS_HCINT_TXERR | OTGFS_HCINT_BBERR);
} }
#ifdef HAVE_USB_TRACE #ifdef HAVE_USBHOST_TRACE_VERBOSE
else else
{ {
usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, chidx, usbhost_vtrace2(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, chidx,
@ -2781,14 +2776,14 @@ static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv)
} }
/******************************************************************************* /*******************************************************************************
* Name: stm32_gint_iisooxfrisr * Name: stm32_gint_ipxfrisr
* *
* Description: * Description:
* USB OTG FS incomplete isochronous interrupt handler * USB OTG FS incomplete periodic interrupt handler
* *
*******************************************************************************/ *******************************************************************************/
static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv) static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv)
{ {
uint32_t regval; uint32_t regval;
@ -2802,7 +2797,7 @@ static inline void stm32_gint_iisooxfrisr(FAR struct stm32_usbhost_s *priv)
/* Clear the incomplete isochronous OUT interrupt */ /* Clear the incomplete isochronous OUT interrupt */
stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_IISOOXFR); stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_IPXFR);
} }
/******************************************************************************* /*******************************************************************************
@ -2911,12 +2906,12 @@ static int stm32_gint_isr(int irq, FAR void *context)
stm32_gint_discisr(priv); stm32_gint_discisr(priv);
} }
/* Handle the incomplete isochronous OUT transfer */ /* Handle the incomplete periodic transfer */
if ((pending & OTGFS_GINT_IISOOXFR) != 0) if ((pending & OTGFS_GINT_IPXFR) != 0)
{ {
usbhost_vtrace1(OTGFS_VTRACE1_GINT_IISOOXFR, 0); usbhost_vtrace1(OTGFS_VTRACE1_GINT_IISOOXFR, 0);
stm32_gint_iisooxfrisr(priv); stm32_gint_ipxfrisr(priv);
} }
} }
@ -3025,7 +3020,7 @@ static inline void stm32_hostinit_enable(void)
regval |= (OTGFS_GINT_SOF | OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR | regval |= (OTGFS_GINT_SOF | OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR |
OTGFS_GINT_HPRT | OTGFS_GINT_HC | OTGFS_GINT_DISC); OTGFS_GINT_HPRT | OTGFS_GINT_HC | OTGFS_GINT_DISC);
#else #else
regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR | OTGFS_GINT_HPRT | regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IPXFR | OTGFS_GINT_HPRT |
OTGFS_GINT_HC | OTGFS_GINT_DISC); OTGFS_GINT_HC | OTGFS_GINT_DISC);
#endif #endif
stm32_putreg(STM32_OTGFS_GINTMSK, regval); stm32_putreg(STM32_OTGFS_GINTMSK, regval);

2
arch/arm/src/stm32/stm32_usbhost.c
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@ -102,7 +102,7 @@ static const struct stm32_usbhost_trace_s g_trace1[TRACE1_NSTRINGS] =
TRENTRY(OTGFS_VTRACE1_GINT_HC, TR_FMT1, "OTGFS Handle the host channels interrupt.\n"), TRENTRY(OTGFS_VTRACE1_GINT_HC, TR_FMT1, "OTGFS Handle the host channels interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT, TR_FMT1, "OTGFS Handle the host port interrupt.\n"), TRENTRY(OTGFS_VTRACE1_GINT_HPRT, TR_FMT1, "OTGFS Handle the host port interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_DISC, TR_FMT1, "OTGFS Handle the disconnect detected interrupt.\n"), TRENTRY(OTGFS_VTRACE1_GINT_DISC, TR_FMT1, "OTGFS Handle the disconnect detected interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_IISOOXFR, TR_FMT1, "OTGFS Handle the incomplete isochronous OUT transfer.\n"), TRENTRY(OTGFS_VTRACE1_GINT_IPXFR, TR_FMT1, "OTGFS Handle the incomplete periodic transfer.\n"),
# endif # endif
#endif #endif

2
arch/arm/src/stm32/stm32_usbhost.h
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@ -75,7 +75,7 @@ enum usbhost_trace1codes_e
OTGFS_VTRACE1_GINT_HC, /* OTGFS Handle the host channels interrupt */ OTGFS_VTRACE1_GINT_HC, /* OTGFS Handle the host channels interrupt */
OTGFS_VTRACE1_GINT_HPRT, /* OTGFS Handle the host port interrupt */ OTGFS_VTRACE1_GINT_HPRT, /* OTGFS Handle the host port interrupt */
OTGFS_VTRACE1_GINT_DISC, /* OTGFS Handle the disconnect detected interrupt */ OTGFS_VTRACE1_GINT_DISC, /* OTGFS Handle the disconnect detected interrupt */
OTGFS_VTRACE1_GINT_IISOOXFR, /* OTGFS Handle the incomplete isochronous OUT transfer */ OTGFS_VTRACE1_GINT_IPXFR, /* OTGFS Handle the incomplete periodic transfer */
# endif # endif
#endif #endif