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SAMA5D4: USART peripheral clock appears to be MCK/2

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This commit is contained in:
Gregory Nutt 2014-06-20 11:40:36 -06:00
parent 3a3af8a5dd
commit 083986e814
14 changed files with 81 additions and 6 deletions
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6
arch/arm/src/sama5/sam_lowputc.c
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@ -149,10 +149,10 @@
# undef HAVE_UART_CONSOLE
#endif
/* The UART/USART modules are driven by the main clock (MCK). */
/* The UART/USART modules are driven by the peripheral clock (MCK or MCK2). */
#define SAM_USART_CLOCK BOARD_MCK_FREQUENCY /* Frequency of the main clock */
#define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */
#define SAM_USART_CLOCK BOARD_USART_FREQUENCY /* Frequency of the USART clock */
#define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */
/* Select USART parameters for the selected console */

6
arch/arm/src/sama5/sam_serial.c
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@ -382,10 +382,10 @@
# define USART4_ASSIGNED 1
#endif
/* The UART/USART modules are driven by the main clock (MCK). */
/* The UART/USART modules are driven by the peripheral clock (MCK or MCK2). */
#define SAM_USART_CLOCK BOARD_MCK_FREQUENCY /* Frequency of the main clock */
#define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */
#define SAM_USART_CLOCK BOARD_USART_FREQUENCY /* Frequency of the USART clock */
#define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */
/****************************************************************************
* Private Types

6
configs/sama5d3-xplained/include/board_384mhz.h
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@ -167,6 +167,12 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)

6
configs/sama5d3-xplained/include/board_396mhz.h
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@ -125,6 +125,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

6
configs/sama5d3-xplained/include/board_528mhz.h
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@ -124,6 +124,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

6
configs/sama5d3-xplained/include/board_sdram.h
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@ -63,6 +63,12 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

6
configs/sama5d3x-ek/include/board_384mhz.h
View File

@ -167,6 +167,12 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)

6
configs/sama5d3x-ek/include/board_396mhz.h
View File

@ -125,6 +125,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

5
configs/sama5d3x-ek/include/board_528mhz.h
View File

@ -124,6 +124,11 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

6
configs/sama5d3x-ek/include/board_sdram.h
View File

@ -63,6 +63,12 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

7
configs/sama5d4-ek/include/board_384mhz.h
View File

@ -165,6 +165,13 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)

7
configs/sama5d4-ek/include/board_396mhz.h
View File

@ -123,6 +123,13 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

7
configs/sama5d4-ek/include/board_528mhz.h
View File

@ -122,6 +122,13 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)

7
configs/sama5d4-ek/include/board_sdram.h
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@ -63,6 +63,13 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)