Fix error in NUC120 SysTick source clock setting; switch to core clock as SysTick clock source
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5684 42af7a65-404d-4744-a932-0658087f49c3
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@ -358,7 +358,10 @@ config NUC_INTHI
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choice
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prompt "SysTick clock source"
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default NUC_SYSTICK_XTALHI
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default NUC_SYSTICK_CORECLK
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config NUC_SYSTICK_CORECLK
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bool "Cortex-M0 core clock"
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config NUC_SYSTICK_XTALHI
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bool "High speed XTAL clock"
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@ -52,13 +52,16 @@
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#include "chip.h"
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#include "chip/nuc_clk.h"
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#include "chip/nuc_gcr.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Get the frequency of the selected clock source */
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#if defined(CONFIG_NUC_SYSTICK_XTALHI)
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#if defined(CONFIG_NUC_SYSTICK_CORECLK)
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# define SYSTICK_CLOCK BOARD_HCLK_FREQUENCY /* Core clock */
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#elif defined(CONFIG_NUC_SYSTICK_XTALHI)
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# define SYSTICK_CLOCK BOARD_XTALHI_FREQUENCY /* High speed XTAL clock */
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#elif defined(CONFIG_NUC_SYSTICK_XTALLO)
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# define SYSTICK_CLOCK BOARD_XTALLO_FREQUENCY /* Low speed XTAL clock */
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@ -104,6 +107,50 @@
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: nuc_unlock
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*
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* Description:
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* Unlock registers
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_NUC_SYSTICK_CORECLK
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static inline void nuc_unlock(void)
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{
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putreg32(0x59, NUC_GCR_REGWRPROT);
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putreg32(0x16, NUC_GCR_REGWRPROT);
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putreg32(0x88, NUC_GCR_REGWRPROT);
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}
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#endif
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/****************************************************************************
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* Name: nuclock
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*
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* Description:
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* Lok registers
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_NUC_SYSTICK_CORECLK
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static inline void nuc_lock(void)
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{
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putreg32(0, NUC_GCR_REGWRPROT);
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}
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#endif
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/****************************************************************************
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* Global Functions
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****************************************************************************/
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@ -138,7 +185,17 @@ void up_timerinit(void)
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{
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uint32_t regval;
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/* Configure the SysTick clock source.*/
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/* Configure the SysTick clock source. This is only necessary if we are not
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* using the Cortex-M0 core clock as the frequency source.
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*/
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#ifndef CONFIG_NUC_SYSTICK_CORECLK
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/* This field is write protected and must be unlocked */
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nuc_unlock();
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/* Read the CLKSEL0 register and set the STCLK_S field appropriately */
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regval = getreg32(NUC_CLK_CLKSEL0);
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regval &= ~CLK_CLKSEL0_STCLK_S_MASK;
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@ -155,6 +212,11 @@ void up_timerinit(void)
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#endif
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putreg32(regval, NUC_CLK_CLKSEL0);
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/* Re-lock the register */
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nuc_lock();
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#endif
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/* Set the SysTick interrupt to the default priority */
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regval = getreg32(ARMV6M_SYSCON_SHPR3);
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@ -170,10 +232,16 @@ void up_timerinit(void)
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(void)irq_attach(NUC_IRQ_SYSTICK, (xcpt_t)up_timerisr);
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/* Enable SysTick interrupts */
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/* Enable SysTick interrupts. We need to select the core clock here if
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* we are not using one of the alternative clock sources above.
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*/
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#ifdef CONFIG_NUC_SYSTICK_CORECLK
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putreg32((SYSTICK_CSR_CLKSOURCE | SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE),
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ARMV6M_SYSTICK_CSR);
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#else
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putreg32((SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE), ARMV6M_SYSTICK_CSR);
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#endif
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/* And enable the timer interrupt */
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@ -162,7 +162,8 @@ CONFIG_NUC_UART1=y
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# CONFIG_NUC_PS2 is not set
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# CONFIG_NUC_I2S is not set
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CONFIG_NUC_INTHI=y
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CONFIG_NUC_SYSTICK_XTALHI=y
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CONFIG_NUC_SYSTICK_CORECLK=y
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# CONFIG_NUC_SYSTICK_XTALHI is not set
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# CONFIG_NUC_SYSTICK_XTALLO is not set
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# CONFIG_NUC_SYSTICK_XTALHId2 is not set
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# CONFIG_NUC_SYSTICK_HCLKd2 is not set
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@ -164,7 +164,8 @@ CONFIG_NUC_UART1=y
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# CONFIG_NUC_PS2 is not set
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# CONFIG_NUC_I2S is not set
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CONFIG_NUC_INTHI=y
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CONFIG_NUC_SYSTICK_XTALHI=y
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CONFIG_NUC_SYSTICK_CORECLK=y
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# CONFIG_NUC_SYSTICK_XTALHI is not set
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# CONFIG_NUC_SYSTICK_XTALLO is not set
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# CONFIG_NUC_SYSTICK_XTALHId2 is not set
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# CONFIG_NUC_SYSTICK_HCLKd2 is not set
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