Merged in david_s5/nuttx/master_f7 (pull request #956)
stm32f7:If only one SDMMC it is slot 0 Approved-by: Gregory Nutt <gnutt@nuttx.org>
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@ -1,9 +1,9 @@
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/****************************************************************************
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* arch/arm/src/stm32f7/stm32_sdmmc.c
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*
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* Copyright (C) 2009, 2011-2018 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2011-2018,2019 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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* David Sidrane <david.sidrane@nscdg.com>
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* Bob Feretich <bob.feretich@rafresearch.com>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -109,6 +109,17 @@
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* resistors.
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*/
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/* If there are 2 SDMMC enabled, then Slot 0 is SDMMC1, and Slot 1 is SDMMC2
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* If there is only 1 SDMMC, then Slot 0 is assigned to the defined SDMMC
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* hence, if only SDMMC2 is defined it will be slot 0.
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*/
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#if !defined(CONFIG_STM32F7_SDMMC1)
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# define SDMMC2_SLOT 0
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#else
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# define SDMMC2_SLOT 1
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#endif
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#ifndef CONFIG_STM32F7_SDMMC_DMA
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# warning "Large Non-DMA transfer may result in RX overrun failures"
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#else
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@ -3336,15 +3347,15 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
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priv = &g_sdmmcdev1;
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#ifdef CONFIG_STM32F7_SDMMC_DMA
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# ifdef CONFIG_STM32F7_SDMMC_DMA
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dmachan = SDMMC1_DMACHAN;
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#endif
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# endif
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#ifdef CONFIG_SDMMC1_WIDTH_D1_ONLY
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# ifdef CONFIG_SDMMC1_WIDTH_D1_ONLY
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priv->onebit = true;
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#else
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# else
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priv->onebit = false;
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#endif
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# endif
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/* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
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* 8-bit wide bus operation but D4-D7 are not configured).
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@ -3353,35 +3364,35 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
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* in the scope of the board support package.
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*/
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#ifndef CONFIG_SDIO_MUXBUS
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# ifndef CONFIG_SDIO_MUXBUS
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stm32_configgpio(GPIO_SDMMC1_D0 | priv->pullup);
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#ifndef CONFIG_SDMMC1_WIDTH_D1_ONLY
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# ifndef CONFIG_SDMMC1_WIDTH_D1_ONLY
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stm32_configgpio(GPIO_SDMMC1_D1 | priv->pullup);
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stm32_configgpio(GPIO_SDMMC1_D2 | priv->pullup);
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stm32_configgpio(GPIO_SDMMC1_D3 | priv->pullup);
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#endif
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# endif
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stm32_configgpio(GPIO_SDMMC1_CK);
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stm32_configgpio(GPIO_SDMMC1_CMD | priv->pullup);
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#endif
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# endif
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}
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else
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#endif
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#ifdef CONFIG_STM32F7_SDMMC2
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if (slotno == 1)
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if (slotno == SDMMC2_SLOT)
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{
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/* Select SDMMC 2 */
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priv = &g_sdmmcdev2;
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#ifdef CONFIG_STM32F7_SDMMC_DMA
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# ifdef CONFIG_STM32F7_SDMMC_DMA
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dmachan = SDMMC2_DMACHAN;
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#endif
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# endif
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#ifdef CONFIG_SDMMC2_WIDTH_D1_ONLY
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# ifdef CONFIG_SDMMC2_WIDTH_D1_ONLY
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priv->onebit = true;
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#else
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# else
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priv->onebit = false;
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#endif
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# endif
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/* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
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* 8-bit wide bus operation but D4-D7 are not configured).
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@ -3390,16 +3401,16 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
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* in the scope of the board support package.
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*/
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#ifndef CONFIG_SDIO_MUXBUS
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# ifndef CONFIG_SDIO_MUXBUS
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stm32_configgpio(GPIO_SDMMC2_D0 | priv->pullup);
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#ifndef CONFIG_SDMMC2_WIDTH_D1_ONLY
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# ifndef CONFIG_SDMMC2_WIDTH_D1_ONLY
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stm32_configgpio(GPIO_SDMMC2_D1 | priv->pullup);
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stm32_configgpio(GPIO_SDMMC2_D2 | priv->pullup);
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stm32_configgpio(GPIO_SDMMC2_D3 | priv->pullup);
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#endif
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# endif
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stm32_configgpio(GPIO_SDMMC2_CK);
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stm32_configgpio(GPIO_SDMMC2_CMD | priv->pullup);
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#endif
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# endif
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}
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else
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#endif
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