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STM32L4: Bring power management logic from Motrola MDK into NuttX

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This commit is contained in:
Gregory Nutt 2017-02-18 10:18:42 -06:00
parent e29b50e00a
commit 085616d651
13 changed files with 1088 additions and 55 deletions
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34
arch/arm/src/stm32l4/Kconfig
View File

@ -37,13 +37,18 @@ endchoice # STM32 L4 Chip Selection
# Chip families
config STM32L4_STM32L476XX
config STM32L4_STM32L4X3
bool
default n
select STM32L4_HAVE_USART1
select STM32L4_HAVE_USART2
select STM32L4_HAVE_USART3
select STM32L4_HAVE_SAI1
select STM32L4_HAVE_SAI2
config STM32L4_STM32L4X6
bool
default n
select ARCH_HAVE_FPU
select ARCH_HAVE_DPFPU # REVISIT
select ARMV7M_HAVE_ITCM
select ARMV7M_HAVE_DTCM
select STM32L4_HAVE_USART1
select STM32L4_HAVE_USART2
select STM32L4_HAVE_USART3
@ -52,20 +57,23 @@ config STM32L4_STM32L476XX
select STM32L4_HAVE_SAI1
select STM32L4_HAVE_SAI2
config STM32L4_STM32L486XX
config STM32L4_STM32L476XX
bool
default n
select STM32L4_STM32L4X6
select ARCH_HAVE_FPU
select ARCH_HAVE_DPFPU # REVISIT
select ARMV7M_HAVE_ITCM
select ARMV7M_HAVE_DTCM
config STM32L4_STM32L486XX
bool
default n
select STM32L4_STM32L4X6
select ARCH_HAVE_FPU
select ARCH_HAVE_DPFPU # REVISIT
select ARMV7M_HAVE_ITCM
select ARMV7M_HAVE_DTCM
select STM32L4_HAVE_USART1
select STM32L4_HAVE_USART2
select STM32L4_HAVE_USART3
select STM32L4_HAVE_UART4
select STM32L4_HAVE_UART5
select STM32L4_HAVE_SAI1
select STM32L4_HAVE_SAI2
select STM32L4_FLASH_1024KB
choice

9
arch/arm/src/stm32l4/Make.defs
View File

@ -160,6 +160,15 @@ endif
endif
endif
ifeq ($(CONFIG_PM),y)
CHIP_CSRCS += stm32l4_pmlpr.c stm32l4_pmsleep.c stm32l4_pmstandby.c
CHIP_CSRCS += stm32l4_pmstop.c
ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
CHIP_CSRCS += stm32l4_pminitialize.c
endif
endif
ifeq ($(CONFIG_STM32L4_PWR),y)
CHIP_CSRCS += stm32l4_exti_pwr.c
endif

4
arch/arm/src/stm32l4/chip/stm32l4_pwr.h
View File

@ -105,8 +105,8 @@
#define PWR_CR1_LPMS_SHIFT 0
#define PWR_CR1_LPMS_MASK (7 << PWR_CR1_LPMS_SHIFT) /* Bits 0-2: Low-power mode selection */
# define PWR_CR1_LPMS_STOP0 (0 << PWR_CR1_LPMS_SHIFT) /* 000: Stop 0 mode */
# define PWR_CR1_LPMS_STOP1 (1 << PWR_CR1_LPMS_SHIFT) /* 001: Stpp 1 mode */
# define PWR_CR1_LPMS_STOP1MR (0 << PWR_CR1_LPMS_SHIFT) /* Stop 1 mode with main regulator (MR) */
# define PWR_CR1_LPMS_STOP1LPR (1 << PWR_CR1_LPMS_SHIFT) /* Stop 1 mode with low-power regulator (LPR) */
# define PWR_CR1_LPMS_STOP2 (2 << PWR_CR1_LPMS_SHIFT) /* 010: Stop 2 mode*/
# define PWR_CR1_LPMS_STANDBY (3 << PWR_CR1_LPMS_SHIFT) /* 011: Standby mode */
# define PWR_CR1_LPMS_SHUTDOWN (4 << PWR_CR1_LPMS_SHIFT) /* 1xx: Shutdown node */

7
arch/arm/src/stm32l4/stm32l4_idle.c
View File

@ -42,11 +42,10 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/irq.h>
#include "chip.h"
#include "stm32l4_pm.h"
#include "up_internal.h"
@ -97,7 +96,7 @@ static void up_idlepm(void)
if (newstate != oldstate)
{
flags = irqsave();
flags = enter_critical_section();
/* Perform board-specific, state-dependent logic here */
@ -141,7 +140,7 @@ static void up_idlepm(void)
break;
}
irqrestore(flags);
leave_critical_section(flags);
}
}
#else

171
arch/arm/src/stm32l4/stm32l4_pm.h
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@ -0,0 +1,171 @@
/************************************************************************************
* arch/arm/src/stm32l4/stm32l4_pm.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H
#define __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "chip.h"
#include "up_internal.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: stm32l4_pmstop
*
* Description:
* Enter STOP mode.
*
* Input Parameters:
* lpds - true: To further reduce power consumption in Stop mode, put the
* internal voltage regulator in low-power mode using the LPDS bit
* of the Power control register (PWR_CR).
*
* Returned Value:
* Zero means that the STOP was successfully entered and the system has
* been re-awakened. The internal voltage regulator is back to its
* original state. Otherwise, STOP mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
int stm32l4_pmstop(bool lpds);
/****************************************************************************
* Name: stm32l4_pmstop2
*
* Description:
* Enter STOP2 mode.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero means that the STOP2 was successfully entered and the system has
* been re-awakened. Otherwise, STOP2 mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
int stm32l4_pmstop2(void);
#endif
/****************************************************************************
* Name: stm32l4_pmstandby
*
* Description:
* Enter STANDBY mode.
*
* Input Parameters:
* None
*
* Returned Value.
* On success, this function will not return (STANDBY mode can only be
* terminated with a reset event). Otherwise, STANDBY mode did not occur
* and a negated errno value is returned to indicate the cause of the
* failure.
*
****************************************************************************/
int stm32l4_pmstandby(void);
/****************************************************************************
* Name: stm32l4_pmsleep
*
* Description:
* Enter SLEEP mode.
*
* Input Parameters:
* sleeponexit - true: SLEEPONEXIT bit is set when the WFI instruction is
* executed, the MCU enters Sleep mode as soon as it
* exits the lowest priority ISR.
* - false: SLEEPONEXIT bit is cleared, the MCU enters Sleep mode
* as soon as WFI or WFE instruction is executed.
* Returned Value:
* Zero means that the STOP was successfully entered and the system has
* been re-awakened. The internal volatage regulator is back to its
* original state. Otherwise, STOP mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
void stm32l4_pmsleep(bool sleeponexit);
/****************************************************************************
* Name: stm32l4_pmlpr
*
* Description:
* Enter Low-Power Run (LPR) mode.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero means that LPR was successfully entered. Otherwise, LPR mode was not
* entered and a negated errno value is returned to indicate the cause of the
* failure.
*
****************************************************************************/
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
int stm32l4_pmlpr(void);
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_PM_H */

78
arch/arm/src/stm32l4/stm32l4_pminitialize.c Normal file
View File

@ -0,0 +1,78 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_pminitialize.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/power/pm.h>
#include "up_internal.h"
#include "stm32l4_pm.h"
#ifdef CONFIG_PM
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_pminitialize
*
* Description:
* This function is called by MCU-specific logic at power-on reset in
* order to provide one-time initialization the power management subystem.
* This function must be called *very* early in the initialization sequence
* *before* any other device drivers are initialized (since they may
* attempt to register with the power management subsystem).
*
* Input parameters:
* None.
*
* Returned value:
* None.
*
****************************************************************************/
void up_pminitialize(void)
{
/* Then initialize the NuttX power management subsystem proper */
pm_initialize();
}
#endif /* CONFIG_PM */

111
arch/arm/src/stm32l4/stm32l4_pmlpr.c Normal file
View File

@ -0,0 +1,111 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_pmlpr.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "up_arch.h"
#include "nvic.h"
#include "stm32l4_pwr.h"
#include "stm32l4_pm.h"
#include "stm32l4_rcc.h"
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_pmlpr
*
* Description:
* Enter Low-Power Run (LPR) mode.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero means that LPR was successfully entered. Otherwise, LPR mode was not
* entered and a negated errno value is returned to indicate the cause of the
* failure.
*
****************************************************************************/
int stm32l4_pmlpr(void)
{
uint32_t regval;
/* Enable MSI clock */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_MSION;
/* Set MSI clock to 2 MHz */
regval &= ~RCC_CR_MSIRANGE_MASK;
regval |= RCC_CR_MSIRANGE_2M; /* 2 MHz */
regval |= RCC_CR_MSIRGSEL; /* Select new MSIRANGE */
putreg32(regval, STM32L4_RCC_CR);
/* Select MSI clock as system clock source */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_SW_MASK;
regval |= RCC_CFGR_SW_MSI;
putreg32(regval, STM32L4_RCC_CFGR);
/* Wait until the MSI source is used as the system clock source */
while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_MSI)
{
}
/* Enable Low-Power Run */
regval = getreg32(STM32L4_PWR_CR1);
regval |= PWR_CR1_LPR;
putreg32(regval, STM32L4_PWR_CR1);
return OK;
}
#endif /* CONFIG_STM32L4_STM32L4X6 || CONFIG_STM32L4_STM32L4X3 */

104
arch/arm/src/stm32l4/stm32l4_pmsleep.c Normal file
View File

@ -0,0 +1,104 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_pmsleep.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Diego Sanchez <dsanchez@nx-engineering.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "up_arch.h"
#include "nvic.h"
#include "stm32l4_pwr.h"
#include "stm32l4_pm.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_pmsleep
*
* Description:
* Enter SLEEP mode.
*
* Input Parameters:
* sleeponexit - true: SLEEPONEXIT bit is set when the WFI instruction is
* executed, the MCU enters Sleep mode as soon as it
* exits the lowest priority ISR.
* - false: SLEEPONEXIT bit is cleared, the MCU enters Sleep mode
* as soon as WFI or WFE instruction is executed.
* Returned Value:
* Zero means that the STOP was successfully entered and the system has
* been re-awakened. The internal volatage regulator is back to its
* original state. Otherwise, STOP mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
void stm32l4_pmsleep(bool sleeponexit)
{
uint32_t regval;
/* Clear SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval &= ~NVIC_SYSCON_SLEEPDEEP;
if (sleeponexit)
{
regval |= NVIC_SYSCON_SLEEPONEXIT;
}
else
{
regval &= ~NVIC_SYSCON_SLEEPONEXIT;
}
putreg32(regval, NVIC_SYSCON);
/* Sleep until the wakeup interrupt or event occurs */
#ifdef CONFIG_PM_WFE
/* Mode: SLEEP + Entry with WFE */
asm("wfe");
#else
/* Mode: SLEEP + Entry with WFI */
asm("wfi");
#endif
}

114
arch/arm/src/stm32l4/stm32l4_pmstandby.c Normal file
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@ -0,0 +1,114 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_pmstandby.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "up_arch.h"
#include "nvic.h"
#include "stm32l4_pwr.h"
#include "stm32l4_pm.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_pmstandby
*
* Description:
* Enter STANDBY mode.
*
* Input Parameters:
* None
*
* Returned Value.
* On success, this function will not return (STANDBY mode can only be
* terminated with a reset event). Otherwise, STANDBY mode did not occur
* and a negated errno value is returned to indicate the cause of the
* failure.
*
****************************************************************************/
int stm32l4_pmstandby(void)
{
uint32_t regval;
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
/* Clear the Wake-Up Flags by setting the CWUFx bits in the power status
* clear register
*/
regval = PWR_SCR_CWUF1 | PWR_SCR_CWUF2 | PWR_SCR_CWUF3 |
PWR_SCR_CWUF4 | PWR_SCR_CWUF5;
putreg32(regval, STM32L4_PWR_SCR);
/* Select Standby mode */
regval = getreg32(STM32L4_PWR_CR1);
regval &= ~PWR_CR1_LPMS_MASK;
regval |= PWR_CR1_LPMS_STANDBY;
putreg32(regval, STM32L4_PWR_CR1);
#else
/* Clear the Wake-Up Flag by setting the CWUF bit in the power control
* register.
*/
regval = getreg32(STM32L4_PWR_CR);
regval |= PWR_CR_CWUF;
putreg32(regval, STM32L4_PWR_CR);
/* Set the Power Down Deep Sleep (PDDS) bit in the power control register. */
regval |= PWR_CR_PDDS;
putreg32(regval, STM32L4_PWR_CR);
#endif
/* Set SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval |= NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
/* Sleep until the wakeup reset occurs */
asm("wfi");
return OK; /* Won't get here */
}

177
arch/arm/src/stm32l4/stm32l4_pmstop.c Normal file
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@ -0,0 +1,177 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_pmstop.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2015 Motorola Mobility, LLC. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "up_arch.h"
#include "nvic.h"
#include "stm32l4_pwr.h"
#include "stm32l4_pm.h"
/****************************************************************************
* Private Functions
****************************************************************************/
static int do_stop(void)
{
uint32_t regval;
/* Set SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval |= NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
/* Sleep until the wakeup interrupt or event occurs */
#ifdef CONFIG_PM_WFE
/* Mode: SLEEP + Entry with WFE */
asm("wfe");
#else
/* Mode: SLEEP + Entry with WFI */
asm("wfi");
#endif
/* Clear SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval &= ~NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_pmstop
*
* Description:
* Enter STOP mode.
*
* Input Parameters:
* lpds - true: To further reduce power consumption in Stop mode, put the
* internal voltage regulator in low-power mode using the LPDS bit
* of the Power control register (PWR_CR).
*
* Returned Value:
* Zero means that the STOP was successfully entered and the system has
* been re-awakened. The internal volatage regulator is back to its
* original state. Otherwise, STOP mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
int stm32l4_pmstop(bool lpds)
{
uint32_t regval;
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
/* Clear Low-Power Mode Selection (LPMS) bits in power control register 1. */
regval = getreg32(STM32L4_PWR_CR1);
regval &= ~PWR_CR1_LPMS_MASK;
/* Select Stop 1 mode with low-power regulator if so requested */
if (lpds)
{
regval |= PWR_CR1_LPMS_STOP1LPR;
}
putreg32(regval, STM32L4_PWR_CR1);
#else
/* Clear the Power Down Deep Sleep (PDDS), Low Power Deep Sleep (LPDS), and
* Low Power regulator Low Voltage in Deep Sleep (LPLVDS) bits in the power
* control register.
*/
regval = getreg32(STM32L4_PWR_CR);
regval &= ~(PWR_CR_LPDS | PWR_CR_PDDS | PWR_CR_LPLVDS);
/* Set the Low Power Deep Sleep (LPDS) and Low Power regulator Low Voltage
* in Deep Sleep (LPLVDS) bits if so requested */
if (lpds)
{
regval |= PWR_CR_LPDS | PWR_CR_LPLVDS;
}
putreg32(regval, STM32L4_PWR_CR);
#endif
return do_stop();
}
/****************************************************************************
* Name: stm32l4_pmstop2
*
* Description:
* Enter STOP2 mode.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero means that the STOP2 was successfully entered and the system has
* been re-awakened. Otherwise, STOP2 mode did not occur and a negated
* errno value is returned to indicate the cause of the failure.
*
****************************************************************************/
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4X3)
int stm32l4_pmstop2(void)
{
uint32_t regval;
/* Select Stop 2 mode in power control register 1. */
regval = getreg32(STM32L4_PWR_CR1);
regval &= ~PWR_CR1_LPMS_MASK;
regval |= PWR_CR1_LPMS_STOP2;
putreg32(regval, STM32L4_PWR_CR1);
return do_stop();
}
#endif

116
configs/nucleo-l476rg/nsh/defconfig
View File

@ -61,9 +61,12 @@ CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_MISOC is not set
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_XTENSA is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32L4=y
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM23 is not set
# CONFIG_ARCH_CORTEXM3 is not set
# CONFIG_ARCH_CORTEXM33 is not set
CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXM7 is not set
# CONFIG_ARCH_CORTEXA5 is not set
@ -158,6 +163,8 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
CONFIG_ARCH_CHIP_STM32L476RG=y
# CONFIG_ARCH_CHIP_STM32L476RE is not set
# CONFIG_ARCH_CHIP_STM32L486 is not set
# CONFIG_STM32L4_STM32L4X3 is not set
CONFIG_STM32L4_STM32L4X6=y
CONFIG_STM32L4_STM32L476XX=y
# CONFIG_STM32L4_STM32L486XX is not set
# CONFIG_STM32L4_FLASH_256KB is not set
@ -178,6 +185,8 @@ CONFIG_STM32L4_SRAM2_INIT=y
# STM32L4 Peripheral Support
#
# CONFIG_STM32L4_HAVE_LTDC is not set
CONFIG_STM32L4_HAVE_SAI1=y
CONFIG_STM32L4_HAVE_SAI2=y
# CONFIG_STM32L4_ADC is not set
# CONFIG_STM32L4_CAN is not set
# CONFIG_STM32L4_DAC is not set
@ -205,6 +214,10 @@ CONFIG_STM32L4_DMA2=y
# CONFIG_STM32L4_ADC3 is not set
# CONFIG_STM32L4_AES is not set
CONFIG_STM32L4_RNG=y
# CONFIG_STM32L4_SAI1_A is not set
# CONFIG_STM32L4_SAI1_B is not set
# CONFIG_STM32L4_SAI2_A is not set
# CONFIG_STM32L4_SAI2_B is not set
#
# AHB3 Peripherals
@ -278,6 +291,11 @@ CONFIG_STM32L4_SAI1PLL=y
#
# CONFIG_STM32L4_ONESHOT is not set
# CONFIG_STM32L4_FREERUN is not set
CONFIG_STM32L4_HAVE_USART1=y
CONFIG_STM32L4_HAVE_USART2=y
CONFIG_STM32L4_HAVE_USART3=y
CONFIG_STM32L4_HAVE_UART4=y
CONFIG_STM32L4_HAVE_UART5=y
#
# U[S]ART Configuration
@ -348,6 +366,7 @@ CONFIG_RAM_SIZE=98304
#
CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
# CONFIG_ARCH_BOARD_STM32L476VG_DISCO is not set
# CONFIG_ARCH_BOARD_STM32L476_MDK is not set
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD="nucleo-l476rg"
@ -399,6 +418,7 @@ CONFIG_PREALLOC_TIMERS=4
#
# Tasks and Scheduling
#
# CONFIG_SPINLOCK is not set
# CONFIG_INIT_NONE is not set
CONFIG_INIT_ENTRYPOINT=y
# CONFIG_INIT_FILEPATH is not set
@ -415,6 +435,8 @@ CONFIG_SCHED_WAITPID=y
#
# CONFIG_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set
#
# Performance Monitoring
@ -497,14 +519,14 @@ CONFIG_DEV_RANDOM=y
CONFIG_ARCH_HAVE_I2CRESET=y
# CONFIG_I2C is not set
CONFIG_SPI=y
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
CONFIG_ARCH_HAVE_SPI_BITORDER=y
# CONFIG_SPI_SLAVE is not set
CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_CMDDATA is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_HWFEATURES is not set
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
CONFIG_ARCH_HAVE_SPI_BITORDER=y
# CONFIG_SPI_BITORDER is not set
# CONFIG_SPI_CS_DELAY_CONTROL is not set
# CONFIG_SPI_DRIVER is not set
@ -515,6 +537,7 @@ CONFIG_ARCH_HAVE_SPI_BITORDER=y
# Timer Driver Support
#
# CONFIG_TIMER is not set
# CONFIG_ONESHOT is not set
CONFIG_RTC=y
CONFIG_RTC_DATETIME=y
CONFIG_RTC_ALARM=y
@ -610,6 +633,7 @@ CONFIG_USART2_2STOP=0
# CONFIG_USBHOST is not set
# CONFIG_HAVE_USBTRACE is not set
# CONFIG_DRIVERS_WIRELESS is not set
# CONFIG_DRIVERS_CONTACTLESS is not set
#
# System Logging
@ -647,6 +671,7 @@ CONFIG_SYSLOG_CONSOLE=y
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_PSEUDOFS_SOFTLINKS is not set
# CONFIG_FS_READABLE is not set
# CONFIG_FS_WRITABLE is not set
# CONFIG_FS_NAMED_SEMAPHORES is not set
@ -701,34 +726,97 @@ CONFIG_BUILTIN=y
#
# Standard C Library Options
#
#
# Standard C I/O
#
# CONFIG_STDIO_DISABLE_BUFFERING is not set
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_LIBC_SCANSET is not set
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_MEMCPY_VIK is not set
# CONFIG_LIBM is not set
#
# Architecture-Specific Support
#
CONFIG_ARCH_LOWPUTC=y
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_LIBC_ARCH_MEMCPY is not set
# CONFIG_LIBC_ARCH_MEMCMP is not set
# CONFIG_LIBC_ARCH_MEMMOVE is not set
# CONFIG_LIBC_ARCH_MEMSET is not set
# CONFIG_LIBC_ARCH_STRCHR is not set
# CONFIG_LIBC_ARCH_STRCMP is not set
# CONFIG_LIBC_ARCH_STRCPY is not set
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
#
# stdlib Options
#
CONFIG_LIB_RAND_ORDER=1
CONFIG_LIB_HOMEDIR="/"
#
# Program Execution Options
#
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
#
# errno Decode Support
#
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
#
# memcpy/memset Options
#
# CONFIG_MEMSET_OPTSPEED is not set
# CONFIG_LIBC_DLLFCN is not set
# CONFIG_LIBC_MODLIB is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
#
# Time/Time Zone Support
#
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
CONFIG_ARCH_HAVE_TLS=y
#
# Thread Local Storage (TLS)
#
# CONFIG_TLS is not set
#
# Network-Related Options
#
# CONFIG_LIBC_IPv4_ADDRCONV is not set
# CONFIG_LIBC_IPv6_ADDRCONV is not set
# CONFIG_LIBC_NETDB is not set
#
# NETDB Support
#
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
#
# Non-standard Library Support
#
@ -771,6 +859,8 @@ CONFIG_EXAMPLES_ALARM_PRIORITY=100
CONFIG_EXAMPLES_ALARM_STACKSIZE=2048
CONFIG_EXAMPLES_ALARM_DEVPATH="/dev/rtc0"
CONFIG_EXAMPLES_ALARM_SIGNO=1
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CCTYPE is not set
# CONFIG_EXAMPLES_CHAT is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CXXTEST is not set
@ -822,6 +912,7 @@ CONFIG_EXAMPLES_NSAMPLES=8
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_STAT is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_TIFF is not set
@ -852,6 +943,7 @@ CONFIG_EXAMPLES_NSAMPLES=8
#
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
# CONFIG_INTERPRETERS_MINIBASIC is not set
# CONFIG_INTERPRETERS_PCODE is not set
#
@ -922,6 +1014,7 @@ CONFIG_NSH_DISABLE_LOSMART=y
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_MV is not set
# CONFIG_NSH_DISABLE_MW is not set
CONFIG_NSH_DISABLE_PRINTF=y
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set
@ -944,6 +1037,7 @@ CONFIG_NSH_MMCSDMINOR=0
# Configure Command Options
#
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_DD_STATS is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_FILEIOSIZE=512
@ -989,6 +1083,8 @@ CONFIG_READLINE_ECHO=y
# CONFIG_READLINE_TABCOMPLETION is not set
# CONFIG_READLINE_CMD_HISTORY is not set
# CONFIG_SYSTEM_SUDOKU is not set
# CONFIG_SYSTEM_SYSTEM is not set
# CONFIG_SYSTEM_TEE is not set
# CONFIG_SYSTEM_UBLOXMODEM is not set
# CONFIG_SYSTEM_VI is not set
# CONFIG_SYSTEM_ZMODEM is not set

117
configs/stm32l476-mdk/nsh/defconfig
View File

@ -61,9 +61,12 @@ CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_MISOC is not set
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_XTENSA is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
@ -103,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32L4=y
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM23 is not set
# CONFIG_ARCH_CORTEXM3 is not set
# CONFIG_ARCH_CORTEXM33 is not set
CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXM7 is not set
# CONFIG_ARCH_CORTEXA5 is not set
@ -158,6 +163,8 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
CONFIG_ARCH_CHIP_STM32L476RG=y
# CONFIG_ARCH_CHIP_STM32L476RE is not set
# CONFIG_ARCH_CHIP_STM32L486 is not set
# CONFIG_STM32L4_STM32L4X3 is not set
CONFIG_STM32L4_STM32L4X6=y
CONFIG_STM32L4_STM32L476XX=y
# CONFIG_STM32L4_STM32L486XX is not set
# CONFIG_STM32L4_FLASH_256KB is not set
@ -178,6 +185,8 @@ CONFIG_STM32L4_FLASH_1024KB=y
# STM32L4 Peripheral Support
#
# CONFIG_STM32L4_HAVE_LTDC is not set
CONFIG_STM32L4_HAVE_SAI1=y
CONFIG_STM32L4_HAVE_SAI2=y
# CONFIG_STM32L4_ADC is not set
# CONFIG_STM32L4_CAN is not set
# CONFIG_STM32L4_DAC is not set
@ -205,6 +214,10 @@ CONFIG_STM32L4_DMA2=y
# CONFIG_STM32L4_ADC3 is not set
# CONFIG_STM32L4_AES is not set
CONFIG_STM32L4_RNG=y
# CONFIG_STM32L4_SAI1_A is not set
# CONFIG_STM32L4_SAI1_B is not set
# CONFIG_STM32L4_SAI2_A is not set
# CONFIG_STM32L4_SAI2_B is not set
#
# AHB3 Peripherals
@ -228,6 +241,8 @@ CONFIG_STM32L4_PWR=y
# CONFIG_STM32L4_USART1 is not set
# CONFIG_STM32L4_USART2 is not set
CONFIG_STM32L4_USART3=y
# CONFIG_STM32L4_UART4 is not set
# CONFIG_STM32L4_UART5 is not set
# CONFIG_STM32L4_I2C1 is not set
# CONFIG_STM32L4_I2C2 is not set
# CONFIG_STM32L4_I2C3 is not set
@ -276,9 +291,11 @@ CONFIG_STM32L4_SAI1PLL=y
#
# CONFIG_STM32L4_ONESHOT is not set
# CONFIG_STM32L4_FREERUN is not set
CONFIG_STM32L4_HAVE_USART1=y
CONFIG_STM32L4_HAVE_USART2=y
CONFIG_STM32L4_HAVE_USART3=y
# CONFIG_STM32L4_HAVE_USART4 is not set
# CONFIG_STM32L4_HAVE_USART5 is not set
CONFIG_STM32L4_HAVE_UART4=y
CONFIG_STM32L4_HAVE_UART5=y
#
# U[S]ART Configuration
@ -403,6 +420,7 @@ CONFIG_PREALLOC_TIMERS=4
#
# Tasks and Scheduling
#
# CONFIG_SPINLOCK is not set
# CONFIG_INIT_NONE is not set
CONFIG_INIT_ENTRYPOINT=y
# CONFIG_INIT_FILEPATH is not set
@ -419,6 +437,8 @@ CONFIG_SCHED_WAITPID=y
#
# CONFIG_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set
#
# Performance Monitoring
@ -501,14 +521,14 @@ CONFIG_DEV_LOOP=y
CONFIG_ARCH_HAVE_I2CRESET=y
# CONFIG_I2C is not set
CONFIG_SPI=y
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
CONFIG_ARCH_HAVE_SPI_BITORDER=y
# CONFIG_SPI_SLAVE is not set
CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_CMDDATA is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_HWFEATURES is not set
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
CONFIG_ARCH_HAVE_SPI_BITORDER=y
# CONFIG_SPI_BITORDER is not set
# CONFIG_SPI_CS_DELAY_CONTROL is not set
# CONFIG_SPI_DRIVER is not set
@ -653,6 +673,7 @@ CONFIG_SYSLOG_CONSOLE=y
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_PSEUDOFS_SOFTLINKS is not set
CONFIG_FS_READABLE=y
CONFIG_FS_WRITABLE=y
# CONFIG_FS_NAMED_SEMAPHORES is not set
@ -720,36 +741,99 @@ CONFIG_BUILTIN=y
#
# Standard C Library Options
#
#
# Standard C I/O
#
# CONFIG_STDIO_DISABLE_BUFFERING is not set
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
CONFIG_LIBM=y
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_LIBC_SCANSET is not set
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_MEMCPY_VIK is not set
CONFIG_LIBM=y
#
# Architecture-Specific Support
#
CONFIG_ARCH_LOWPUTC=y
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_LIBC_ARCH_MEMCPY is not set
# CONFIG_LIBC_ARCH_MEMCMP is not set
# CONFIG_LIBC_ARCH_MEMMOVE is not set
# CONFIG_LIBC_ARCH_MEMSET is not set
# CONFIG_LIBC_ARCH_STRCHR is not set
# CONFIG_LIBC_ARCH_STRCMP is not set
# CONFIG_LIBC_ARCH_STRCPY is not set
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
#
# stdlib Options
#
CONFIG_LIB_RAND_ORDER=1
CONFIG_LIB_HOMEDIR="/"
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
#
# Program Execution Options
#
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
#
# errno Decode Support
#
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
CONFIG_ARCH_LOWPUTC=y
#
# memcpy/memset Options
#
# CONFIG_MEMSET_OPTSPEED is not set
# CONFIG_LIBC_DLLFCN is not set
# CONFIG_LIBC_MODLIB is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
#
# Time/Time Zone Support
#
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
CONFIG_ARCH_HAVE_TLS=y
#
# Thread Local Storage (TLS)
#
# CONFIG_TLS is not set
#
# Network-Related Options
#
# CONFIG_LIBC_IPv4_ADDRCONV is not set
# CONFIG_LIBC_IPv6_ADDRCONV is not set
# CONFIG_LIBC_NETDB is not set
#
# NETDB Support
#
# CONFIG_NETDB_HOSTFILE is not set
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
#
# Non-standard Library Support
@ -790,6 +874,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
#
# CONFIG_EXAMPLES_ALARM is not set
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CCTYPE is not set
# CONFIG_EXAMPLES_CHAT is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CXXTEST is not set
@ -812,10 +897,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXTEXT is not set
@ -835,6 +920,7 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_STAT is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_THTTPD is not set
@ -963,6 +1049,7 @@ CONFIG_NSH_MMCSDMINOR=0
# Configure Command Options
#
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_DD_STATS is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_PROC_MOUNTPOINT="/proc"

101
configs/stm32l476vg-disco/nsh/defconfig
View File

@ -106,7 +106,9 @@ CONFIG_ARCH_CHIP_STM32L4=y
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM23 is not set
# CONFIG_ARCH_CORTEXM3 is not set
# CONFIG_ARCH_CORTEXM33 is not set
CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXM7 is not set
# CONFIG_ARCH_CORTEXA5 is not set
@ -161,6 +163,8 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y
CONFIG_ARCH_CHIP_STM32L476RG=y
# CONFIG_ARCH_CHIP_STM32L476RE is not set
# CONFIG_ARCH_CHIP_STM32L486 is not set
# CONFIG_STM32L4_STM32L4X3 is not set
CONFIG_STM32L4_STM32L4X6=y
CONFIG_STM32L4_STM32L476XX=y
# CONFIG_STM32L4_STM32L486XX is not set
# CONFIG_STM32L4_FLASH_256KB is not set
@ -181,6 +185,8 @@ CONFIG_STM32L4_FLASH_1024KB=y
# STM32L4 Peripheral Support
#
# CONFIG_STM32L4_HAVE_LTDC is not set
CONFIG_STM32L4_HAVE_SAI1=y
CONFIG_STM32L4_HAVE_SAI2=y
# CONFIG_STM32L4_ADC is not set
# CONFIG_STM32L4_CAN is not set
# CONFIG_STM32L4_DAC is not set
@ -208,6 +214,10 @@ CONFIG_STM32L4_DMA2=y
# CONFIG_STM32L4_ADC3 is not set
# CONFIG_STM32L4_AES is not set
CONFIG_STM32L4_RNG=y
# CONFIG_STM32L4_SAI1_A is not set
# CONFIG_STM32L4_SAI1_B is not set
# CONFIG_STM32L4_SAI2_A is not set
# CONFIG_STM32L4_SAI2_B is not set
#
# AHB3 Peripherals
@ -294,6 +304,8 @@ CONFIG_STM32L4_SAI1PLL=y
#
# CONFIG_STM32L4_ONESHOT is not set
# CONFIG_STM32L4_FREERUN is not set
CONFIG_STM32L4_HAVE_USART1=y
CONFIG_STM32L4_HAVE_USART2=y
CONFIG_STM32L4_HAVE_USART3=y
CONFIG_STM32L4_HAVE_UART4=y
CONFIG_STM32L4_HAVE_UART5=y
@ -421,6 +433,7 @@ CONFIG_PREALLOC_TIMERS=4
#
# Tasks and Scheduling
#
# CONFIG_SPINLOCK is not set
# CONFIG_INIT_NONE is not set
CONFIG_INIT_ENTRYPOINT=y
# CONFIG_INIT_FILEPATH is not set
@ -437,6 +450,8 @@ CONFIG_SCHED_WAITPID=y
#
# CONFIG_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set
#
# Performance Monitoring
@ -706,6 +721,7 @@ CONFIG_SYSLOG_CONSOLE=y
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_PSEUDOFS_SOFTLINKS is not set
CONFIG_FS_READABLE=y
CONFIG_FS_WRITABLE=y
# CONFIG_FS_NAMED_SEMAPHORES is not set
@ -775,38 +791,99 @@ CONFIG_BUILTIN=y
#
# Standard C Library Options
#
#
# Standard C I/O
#
# CONFIG_STDIO_DISABLE_BUFFERING is not set
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_IOCTL_VARIADIC is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_LIBC_SCANSET is not set
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_MEMCPY_VIK is not set
# CONFIG_LIBM is not set
#
# Architecture-Specific Support
#
CONFIG_ARCH_LOWPUTC=y
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_LIBC_ARCH_MEMCPY is not set
# CONFIG_LIBC_ARCH_MEMCMP is not set
# CONFIG_LIBC_ARCH_MEMMOVE is not set
# CONFIG_LIBC_ARCH_MEMSET is not set
# CONFIG_LIBC_ARCH_STRCHR is not set
# CONFIG_LIBC_ARCH_STRCMP is not set
# CONFIG_LIBC_ARCH_STRCPY is not set
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
#
# stdlib Options
#
CONFIG_LIB_RAND_ORDER=1
CONFIG_LIB_HOMEDIR="/"
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
#
# Program Execution Options
#
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
#
# errno Decode Support
#
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
CONFIG_ARCH_LOWPUTC=y
#
# memcpy/memset Options
#
# CONFIG_MEMSET_OPTSPEED is not set
# CONFIG_LIBC_DLLFCN is not set
# CONFIG_LIBC_MODLIB is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
#
# Time/Time Zone Support
#
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
CONFIG_ARCH_HAVE_TLS=y
#
# Thread Local Storage (TLS)
#
# CONFIG_TLS is not set
#
# Network-Related Options
#
# CONFIG_LIBC_IPv4_ADDRCONV is not set
# CONFIG_LIBC_IPv6_ADDRCONV is not set
# CONFIG_LIBC_NETDB is not set
#
# NETDB Support
#
# CONFIG_NETDB_HOSTFILE is not set
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
#
# Non-standard Library Support
@ -900,6 +977,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_STAT is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_THTTPD is not set
@ -1029,6 +1107,7 @@ CONFIG_NSH_MMCSDMINOR=0
# Configure Command Options
#
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_DD_STATS is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_PROC_MOUNTPOINT="/proc"