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Cosmetic: Fix some long lines in comment blocks

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This commit is contained in:
Gregory Nutt 2016-06-16 15:45:57 -06:00
parent 1b53214a82
commit 088e9920a8
2 changed files with 28 additions and 29 deletions
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29
arch/arm/src/stm32/stm32_rcc.c
View File

@ -101,14 +101,14 @@
* Public Functions
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: rcc_resetbkp
*
* Description:
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting the
* Backup Domain renders to disabling the LSE as consequence. In order to avoid
* resetting the Backup Domain when we already configured LSE we will reset the
* Backup Domain early (here).
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
* the Backup Domain renders to disabling the LSE as consequence. In order
* to avoid resetting the Backup Domain when we already configured LSE we
* will reset the Backup Domain early (here).
*
* Input Parameters:
* None
@ -116,7 +116,7 @@
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
#if defined(CONFIG_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
static inline rcc_resetbkp(void)
@ -148,17 +148,17 @@ static inline rcc_resetbkp(void)
* Public Functions
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h. This
* function (by default) will reset most everything, enable the PLL, and enable
* peripheral clocking for all periperipherals enabled in the NuttX configuration
* file.
* Called to establish the clock settings based on the values in board.h.
* This function (by default) will reset most everything, enable the PLL,
* and enable peripheral clocking for all peripherals enabled in the NuttX
* configuration file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
* will be enabled by an externally provided, board-specific function called
* stm32_board_clockconfig().
*
* Input Parameters:
@ -167,7 +167,7 @@ static inline rcc_resetbkp(void)
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
void stm32_clockconfig(void)
{
@ -241,4 +241,3 @@ void stm32_clockenable(void)
#endif
}
#endif

28
arch/arm/src/stm32l4/stm32l4_rcc.c
View File

@ -88,14 +88,14 @@
* Public Functions
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: rcc_resetbkp
*
* Description:
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting the
* Backup Domain renders to disabling the LSE as consequence. In order to avoid
* resetting the Backup Domain when we already configured LSE we will reset the
* Backup Domain early (here).
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
* the Backup Domain renders to disabling the LSE as consequence. In order
* to avoid resetting the Backup Domain when we already configured LSE we
* will reset the Backup Domain early (here).
*
* Input Parameters:
* None
@ -103,7 +103,7 @@
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
#if defined(CONFIG_STM32_PWR) && defined(CONFIG_RTC)
static inline rcc_resetbkp(void)
@ -139,17 +139,17 @@ static inline rcc_resetbkp(void)
* Public Functions
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h. This
* function (by default) will reset most everything, enable the PLL, and enable
* peripheral clocking for all periperipherals enabled in the NuttX configuration
* file.
* Called to establish the clock settings based on the values in board.h.
* This function (by default) will reset most everything, enable the PLL,
* and enable peripheral clocking for all peripherals enabled in the NuttX
* configuration file.
*
* If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking
* will be enabled by an externally provided, board-specific function called
* stm32l4_board_clockconfig().
*
* Input Parameters:
@ -158,7 +158,7 @@ static inline rcc_resetbkp(void)
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
void stm32l4_clockconfig(void)
{