STM32 F7: Add low level serial console support
This commit is contained in:
Gregory Nutt
parent
d64058d36e
commit
08c883b6e8
@ -108,7 +108,8 @@ endif
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_allocateheap.c stm32_exti_gpio.c stm32_gpio.c
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CHIP_CSRCS += stm32_irq.c stm32_rcc.c stm32_start.c stm32_timerisr.c
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CHIP_CSRCS += stm32_irq.c stm32_lowputc.c stm32_rcc.c stm32_start.c
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CHIP_CSRCS += stm32_timerisr.c
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ifeq ($(CONFIG_ARMV7M_DTCM),y)
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CHIP_CSRCS += stm32_dtcm.c
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@ -626,17 +626,17 @@
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#define GPIO_LTDC_R3_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN2)
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#define GPIO_LTDC_R3_1 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0)
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#define GPIO_LTDC_R4_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
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#define GPIO_LTDC_R4_? (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
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#define GPIO_LTDC_R4_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)
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#define GPIO_LTDC_R4_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN3)
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#define GPIO_LTDC_R4_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5)
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#define GPIO_LTDC_R4_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)
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#define GPIO_LTDC_R4_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN3)
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#define GPIO_LTDC_R5_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
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#define GPIO_LTDC_R5_? (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
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#define GPIO_LTDC_R5_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11)
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#define GPIO_LTDC_R5_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN4)
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#define GPIO_LTDC_R5_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
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#define GPIO_LTDC_R5_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11)
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#define GPIO_LTDC_R5_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN4)
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#define GPIO_LTDC_R6_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
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#define GPIO_LTDC_R6_1 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
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#define GPIO_LTDC_R6_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12)
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#define GPIO_LTDC_R6_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN5)
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#define GPIO_LTDC_R6_2 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1)
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#define GPIO_LTDC_R6_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12)
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#define GPIO_LTDC_R6_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN5)
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#define GPIO_LTDC_R7_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN15)
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#define GPIO_LTDC_R7_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
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#define GPIO_LTDC_R7_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN6)
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@ -802,8 +802,8 @@
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#define GPIO_SAI2_MCK_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN4)
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#define GPIO_SAI2_MCK_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN1)
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#define GPIO_SAI2_MCK_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
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#define GPIO_SAI2_MCK_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN6)
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#define GPIO_SAI2_MCK_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN3)
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#define GPIO_SAI2_MCK_B_3 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN6)
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#define GPIO_SAI2_MCK_B_4 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN3)
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#define GPIO_SAI2_SCK_A_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN13)
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#define GPIO_SAI2_SCK_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN5)
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#define GPIO_SAI2_SCK_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
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@ -199,7 +199,7 @@
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#define USART_CR1_PS (1 << 9) /* Bit 9: Parity Selection */
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#define USART_CR1_PCE (1 << 10) /* Bit 10: Parity Control Enable */
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#define USART_CR1_WAKE (1 << 11) /* Bit 11: Receiver wakeup method */
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#define USART_CR1_M0 (1 << 12) /* Bit 12: Word length */
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#define USART_CR1_M0 (1 << 12) /* Bit 12: Word length, bit 0 */
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#define USART_CR1_MME (1 << 13) /* Bit 13: Mute mode enable */
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#define USART_CR1_CMIE (1 << 14) /* Bit 14: Character match interrupt enable */
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#define USART_CR1_OVER8 (1 << 15) /* Bit 15: Oversampling mode */
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@ -211,7 +211,7 @@
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# define USART_CR1_DEAT(n) ((uint32_t)(n) << USART_CR1_DEAT_SHIFT)
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#define USART_CR1_RTOIE (1 << 26) /* Bit 26: Receiver timeout interrupt enable */
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#define USART_CR1_EOBIE (1 << 27) /* Bit 27: End of Block interrupt enable */
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#define USART_CR1_M0 (1 << 28) /* Bit 31: Word length */
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#define USART_CR1_M1 (1 << 28) /* Bit 31: Word length, bit 1 */
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#define USART_CR1_ALLINTS \
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(USART_CR1_IDLEIE | USART_CR1_RXNEIE | USART_CR1_TCIE | USART_CR1_TXEIE |\
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440
arch/arm/src/stm32f7/stm32_lowputc.c
Normal file
440
arch/arm/src/stm32f7/stm32_lowputc.c
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@ -0,0 +1,440 @@
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/**************************************************************************
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* arch/arm/src/stm32f7/stm32_lowputc.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************/
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "chip/stm32_pinmap.h"
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#include "stm32_rcc.h"
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#include "stm32_gpio.h"
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#include "stm32_uart.h"
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#include <arch/board/board.h>
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/**************************************************************************
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* Pre-processor Definitions
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**************************************************************************/
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/* Select USART parameters for the selected console */
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#ifdef HAVE_CONSOLE
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# if defined(CONFIG_USART1_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_USART1_BASE
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# define STM32_APBCLOCK STM32_PCLK2_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB2ENR
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# define STM32_CONSOLE_APBEN RCC_APB2ENR_USART1EN
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# define STM32_CONSOLE_BAUD CONFIG_USART1_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART1_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART1_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART1_2STOP
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# define STM32_CONSOLE_TX GPIO_USART1_TX
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# define STM32_CONSOLE_RX GPIO_USART1_RX
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# ifdef CONFIG_USART1_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_USART1_RS485_DIR
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# if (CONFIG_USART1_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_USART2_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_USART2_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_USART2EN
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# define STM32_CONSOLE_BAUD CONFIG_USART2_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART2_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART2_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART2_2STOP
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# define STM32_CONSOLE_TX GPIO_USART2_TX
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# define STM32_CONSOLE_RX GPIO_USART2_RX
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# ifdef CONFIG_USART2_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_USART2_RS485_DIR
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# if (CONFIG_USART2_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_USART3_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_USART3_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_USART3EN
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# define STM32_CONSOLE_BAUD CONFIG_USART3_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART3_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART3_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART3_2STOP
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# define STM32_CONSOLE_TX GPIO_USART3_TX
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# define STM32_CONSOLE_RX GPIO_USART3_RX
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# ifdef CONFIG_USART3_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_USART3_RS485_DIR
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# if (CONFIG_USART3_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART4_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_UART4EN
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# define STM32_CONSOLE_BAUD CONFIG_UART4_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART4_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART4_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART4_2STOP
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# define STM32_CONSOLE_TX GPIO_UART4_TX
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# define STM32_CONSOLE_RX GPIO_UART4_RX
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# ifdef CONFIG_UART4_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_UART4_RS485_DIR
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# if (CONFIG_UART4_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART5_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_UART5EN
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# define STM32_CONSOLE_BAUD CONFIG_UART5_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART5_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART5_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART5_2STOP
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# define STM32_CONSOLE_TX GPIO_UART5_TX
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# define STM32_CONSOLE_RX GPIO_UART5_RX
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# ifdef CONFIG_UART5_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_UART5_RS485_DIR
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# if (CONFIG_UART5_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_USART6_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_USART6_BASE
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# define STM32_APBCLOCK STM32_PCLK2_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB2ENR
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# define STM32_CONSOLE_APBEN RCC_APB2ENR_USART6EN
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# define STM32_CONSOLE_BAUD CONFIG_USART6_BAUD
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# define STM32_CONSOLE_BITS CONFIG_USART6_BITS
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# define STM32_CONSOLE_PARITY CONFIG_USART6_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_USART6_2STOP
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# define STM32_CONSOLE_TX GPIO_USART6_TX
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# define STM32_CONSOLE_RX GPIO_USART6_RX
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# ifdef CONFIG_USART6_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_USART6_RS485_DIR
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# if (CONFIG_USART6_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_UART7_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART7_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_UART7EN
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# define STM32_CONSOLE_BAUD CONFIG_UART7_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART7_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART7_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART7_2STOP
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# define STM32_CONSOLE_TX GPIO_UART7_TX
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# define STM32_CONSOLE_RX GPIO_UART7_RX
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# ifdef CONFIG_UART7_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_UART7_RS485_DIR
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# if (CONFIG_UART7_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# elif defined(CONFIG_UART8_SERIAL_CONSOLE)
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# define STM32_CONSOLE_BASE STM32_UART8_BASE
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# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
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# define STM32_CONSOLE_APBREG STM32_RCC_APB1ENR
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# define STM32_CONSOLE_APBEN RCC_APB1ENR_UART8EN
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# define STM32_CONSOLE_BAUD CONFIG_UART8_BAUD
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# define STM32_CONSOLE_BITS CONFIG_UART8_BITS
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# define STM32_CONSOLE_PARITY CONFIG_UART8_PARITY
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# define STM32_CONSOLE_2STOP CONFIG_UART8_2STOP
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# define STM32_CONSOLE_TX GPIO_UART8_TX
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# define STM32_CONSOLE_RX GPIO_UART8_RX
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# ifdef CONFIG_UART8_RS485
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# define STM32_CONSOLE_RS485_DIR GPIO_UART8_RS485_DIR
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# if (CONFIG_UART8_RS485_DIR_POLARITY == 0)
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# define STM32_CONSOLE_RS485_DIR_POLARITY false
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# else
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# define STM32_CONSOLE_RS485_DIR_POLARITY true
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# endif
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# endif
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# endif
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/* CR1 settings */
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# if STM32_CONSOLE_BITS == 7
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# define USART_CR_M01_VALUE USART_CR1_M1
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# elif STM32_CONSOLE_BITS == 9
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# define USART_CR_M01_VALUE USART_CR1_M0
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# else /* STM32_CONSOLE_BITS == 8 */
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# define USART_CR_M01_VALUE 0
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# endif
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# if STM32_CONSOLE_PARITY == 1
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# define USART_CR1_PARITY_VALUE (USART_CR1_PCE|USART_CR1_PS)
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# elif STM32_CONSOLE_PARITY == 2
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# define USART_CR1_PARITY_VALUE USART_CR1_PCE
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# else
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# define USART_CR1_PARITY_VALUE 0
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# endif
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# define USART_CR1_CLRBITS \
|
||||
(USART_CR1_RE | USART_CR1_TE | USART_CR1_PS | USART_CR1_PCE | \
|
||||
USART_CR1_WAKE | USART_CR1_M0 | USART_CR1_MME | USART_CR1_OVER8 | \
|
||||
USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK | USART_CR1_ALLINTS)
|
||||
|
||||
# define USART_CR1_SETBITS (USART_CR_M01_VALUE | USART_CR1_PARITY_VALUE)
|
||||
|
||||
/* CR2 settings */
|
||||
|
||||
# if STM32_CONSOLE_2STOP != 0
|
||||
# define USART_CR2_STOP2_VALUE USART_CR2_STOP2
|
||||
# else
|
||||
# define USART_CR2_STOP2_VALUE 0
|
||||
# endif
|
||||
|
||||
# define USART_CR2_CLRBITS \
|
||||
(USART_CR2_ADDM7 | USART_CR2_LBDL | USART_CR2_LBDIE | USART_CR2_LBCL |\
|
||||
USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_STOP_MASK |\
|
||||
USART_CR2_LINEN | USART_CR2_RXINV | USART_CR2_TXINV | USART_CR2_DATAINV |\
|
||||
USART_CR2_MSBFIRST | USART_CR2_ABREN | USART_CR2_ABRMOD_MASK |\
|
||||
USART_CR2_RTOEN | USART_CR2_ADD8_MASK)
|
||||
|
||||
# define USART_CR2_SETBITS USART_CR2_STOP2_VALUE
|
||||
|
||||
/* CR3 settings */
|
||||
|
||||
# define USART_CR3_CLRBITS \
|
||||
(USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL |\
|
||||
USART_CR3_NACK | USART_CR3_SCEN | USART_CR3_DMAR | USART_CR3_DMAT |\
|
||||
USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR1_ONEBIT |\
|
||||
USART_CR1_OVRDIS | USART_CR1_DDRE | USART_CR1_DEM | USART_CR1_DEP |\
|
||||
USART_CR1_SCARCNT_MASK)
|
||||
|
||||
# define USART_CR3_SETBITS 0
|
||||
|
||||
/* Only the STM32 F3 supports oversampling by 8 */
|
||||
|
||||
# undef USE_OVER8
|
||||
|
||||
/* Calculate USART BAUD rate divider */
|
||||
/* Baud rate for standard USART (SPI mode included):
|
||||
*
|
||||
* In case of oversampling by 16, the equation is:
|
||||
* baud = fCK / UARTDIV
|
||||
* UARTDIV = fCK / baud
|
||||
*
|
||||
* In case of oversampling by 8, the equation is:
|
||||
*
|
||||
* baud = 2 * fCK / UARTDIV
|
||||
* UARTDIV = 2 * fCK / baud
|
||||
*/
|
||||
|
||||
# define STM32_USARTDIV8 \
|
||||
(((STM32_APBCLOCK << 1) + (STM32_CONSOLE_BAUD >> 1)) / STM32_CONSOLE_BAUD)
|
||||
# define STM32_USARTDIV16 \
|
||||
((STM32_APBCLOCK + (STM32_CONSOLE_BAUD >> 1)) / STM32_CONSOLE_BAUD)
|
||||
|
||||
/* Use oversampling by 8 only if the divisor is small. But what is small? */
|
||||
|
||||
# if STM32_USARTDIV8 > 100
|
||||
# define STM32_BRR_VALUE STM32_USARTDIV16
|
||||
# else
|
||||
# define USE_OVER8 1
|
||||
# define STM32_BRR_VALUE \
|
||||
((STM32_USARTDIV8 & 0xfff0) | ((STM32_USARTDIV8 & 0x000f) >> 1))
|
||||
# endif
|
||||
#endif /* HAVE_CONSOLE */
|
||||
|
||||
/**************************************************************************
|
||||
* Private Types
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Private Function Prototypes
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Global Variables
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Private Variables
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Private Functions
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Public Functions
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
* Name: up_lowputc
|
||||
*
|
||||
* Description:
|
||||
* Output one byte on the serial console
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
void up_lowputc(char ch)
|
||||
{
|
||||
#ifdef HAVE_CONSOLE
|
||||
/* Wait until the TX data register is empty */
|
||||
|
||||
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) & USART_ISR_TXE) == 0);
|
||||
#if STM32_CONSOLE_RS485_DIR
|
||||
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, STM32_CONSOLE_RS485_DIR_POLARITY);
|
||||
#endif
|
||||
|
||||
/* Then send the character */
|
||||
|
||||
putreg32((uint32_t)ch, STM32_CONSOLE_BASE + STM32_USART_TDR_OFFSET);
|
||||
|
||||
#if STM32_CONSOLE_RS485_DIR
|
||||
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) & USART_ISR_TC) == 0);
|
||||
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
|
||||
#endif
|
||||
|
||||
#endif /* HAVE_CONSOLE */
|
||||
}
|
||||
|
||||
/**************************************************************************
|
||||
* Name: stm32_lowsetup
|
||||
*
|
||||
* Description:
|
||||
* This performs basic initialization of the USART used for the serial
|
||||
* console. Its purpose is to get the console output availabe as soon
|
||||
* as possible.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
void stm32_lowsetup(void)
|
||||
{
|
||||
#if defined(HAVE_UART)
|
||||
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
||||
uint32_t cr;
|
||||
#endif
|
||||
|
||||
#if defined(HAVE_CONSOLE)
|
||||
/* Enable USART APB1/2 clock */
|
||||
|
||||
modifyreg32(STM32_CONSOLE_APBREG, 0, STM32_CONSOLE_APBEN);
|
||||
#endif
|
||||
|
||||
/* Enable the console USART and configure GPIO pins needed for rx/tx.
|
||||
*
|
||||
* NOTE: Clocking for selected U[S]ARTs was already provided in stm32_rcc.c
|
||||
*/
|
||||
|
||||
#ifdef STM32_CONSOLE_TX
|
||||
stm32_configgpio(STM32_CONSOLE_TX);
|
||||
#endif
|
||||
#ifdef STM32_CONSOLE_RX
|
||||
stm32_configgpio(STM32_CONSOLE_RX);
|
||||
#endif
|
||||
|
||||
#if STM32_CONSOLE_RS485_DIR
|
||||
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
|
||||
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
|
||||
#endif
|
||||
|
||||
/* Enable and configure the selected console device */
|
||||
|
||||
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
||||
/* Configure CR2 */
|
||||
|
||||
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET);
|
||||
cr &= ~USART_CR2_CLRBITS;
|
||||
cr |= USART_CR2_SETBITS;
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET);
|
||||
|
||||
/* Configure CR1 */
|
||||
|
||||
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
cr &= ~USART_CR1_CLRBITS;
|
||||
cr |= USART_CR1_SETBITS;
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
|
||||
/* Configure CR3 */
|
||||
|
||||
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET);
|
||||
cr &= ~USART_CR3_CLRBITS;
|
||||
cr |= USART_CR3_SETBITS;
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET);
|
||||
|
||||
/* Configure the USART Baud Rate */
|
||||
|
||||
putreg32(STM32_BRR_VALUE, STM32_CONSOLE_BASE + STM32_USART_BRR_OFFSET);
|
||||
|
||||
/* Select oversampling by 8 */
|
||||
|
||||
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
#ifdef USE_OVER8
|
||||
cr |= USART_CR1_OVER8;
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
#endif
|
||||
|
||||
/* Enable Rx, Tx, and the USART */
|
||||
|
||||
cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE);
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
|
||||
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
|
||||
#endif /* HAVE_UART */
|
||||
}
|
||||
345
arch/arm/src/stm32f7/stm32_uart.h
Normal file
345
arch/arm/src/stm32f7/stm32_uart.h
Normal file
@ -0,0 +1,345 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/stm32f7/stm32_uart.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_STC_STM32F7_STM32_UART_H
|
||||
#define __ARCH_ARM_STC_STM32F7_STM32_UART_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip/stm32_uart.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Make sure that we have not enabled more U[S]ARTs than are supported by the
|
||||
* device.
|
||||
*/
|
||||
|
||||
#if CONFIG_STM32F7_ < 4
|
||||
# undef CONFIG_STM32F7_UART8
|
||||
#endif
|
||||
#if CONFIG_STM32F7_ < 4
|
||||
# undef CONFIG_STM32F7_UART7
|
||||
#endif
|
||||
#if CONFIG_STM32F7_ < 3
|
||||
# undef CONFIG_STM32F7_UART5
|
||||
#endif
|
||||
#if CONFIG_STM32F7_ < 1
|
||||
# undef CONFIG_STM32F7_UART4
|
||||
#endif
|
||||
|
||||
#if STM32F7_NUSART < 4
|
||||
# undef CONFIG_STM32F7_USART6
|
||||
#endif
|
||||
#if STM32F7_NUSART < 3
|
||||
# undef CONFIG_STM32F7_USART3
|
||||
#endif
|
||||
#if STM32F7_NUSART < 2
|
||||
# undef CONFIG_STM32F7_USART2
|
||||
#endif
|
||||
#if STM32F7_NUSART < 1
|
||||
# undef CONFIG_STM32F7_USART1
|
||||
#endif
|
||||
|
||||
/* Is there a USART enabled? */
|
||||
|
||||
#if defined(CONFIG_STM32F7_USART1) || defined(CONFIG_STM32F7_USART2) || \
|
||||
defined(CONFIG_STM32F7_USART3) || defined(CONFIG_STM32F7_UART4) || \
|
||||
defined(CONFIG_STM32F7_UART5) || defined(CONFIG_STM32F7_USART6) || \
|
||||
defined(CONFIG_STM32F7_UART7) || defined(CONFIG_STM32F7_UART8)
|
||||
# define HAVE_UART 1
|
||||
#endif
|
||||
|
||||
/* Is there a serial console? */
|
||||
|
||||
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART1)
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 1
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART2)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 2
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART3)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 3
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART4)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 4
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART5)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 5
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_USART6)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 6
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART7)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 7
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32F7_UART8)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 8
|
||||
# define HAVE_CONSOLE 1
|
||||
#else
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART5_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART6_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART7_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 0
|
||||
# undef HAVE_CONSOLE
|
||||
#endif
|
||||
|
||||
/* DMA support is only provided if CONFIG_ARCH_DMA is in the NuttX configuration */
|
||||
|
||||
#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
|
||||
# undef CONFIG_USART1_RXDMA
|
||||
# undef CONFIG_USART2_RXDMA
|
||||
# undef CONFIG_USART3_RXDMA
|
||||
# undef CONFIG_UART4_RXDMA
|
||||
# undef CONFIG_UART5_RXDMA
|
||||
# undef CONFIG_USART6_RXDMA
|
||||
# undef CONFIG_UART7_RXDMA
|
||||
# undef CONFIG_UART8_RXDMA
|
||||
#endif
|
||||
|
||||
/* Disable the DMA configuration on all unused USARTs */
|
||||
|
||||
#ifndef CONFIG_STM32F7_USART1
|
||||
# undef CONFIG_USART1_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_USART2
|
||||
# undef CONFIG_USART2_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_USART3
|
||||
# undef CONFIG_USART3_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_UART4
|
||||
# undef CONFIG_UART4_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_UART5
|
||||
# undef CONFIG_UART5_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_USART6
|
||||
# undef CONFIG_USART6_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_UART7
|
||||
# undef CONFIG_UART7_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32F7_UART8
|
||||
# undef CONFIG_UART8_RXDMA
|
||||
#endif
|
||||
|
||||
/* Is DMA available on any (enabled) USART? */
|
||||
|
||||
#undef SERIAL_HAVE_DMA
|
||||
#if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
|
||||
defined(CONFIG_USART3_RXDMA) || defined(CONFIG_UART4_RXDMA) || \
|
||||
defined(CONFIG_UART5_RXDMA) || defined(CONFIG_USART6_RXDMA) || \
|
||||
defined(CONFIG_UART7_RXDMA) || defined(CONFIG_UART8_RXDMA)
|
||||
# define SERIAL_HAVE_DMA 1
|
||||
#endif
|
||||
|
||||
/* Is DMA used on the console UART? */
|
||||
|
||||
#undef SERIAL_HAVE_CONSOLE_DMA
|
||||
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_UART4_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_UART5_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_USART6_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_UART7_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_UART8_RXDMA)
|
||||
# define SERIAL_HAVE_CONSOLE_DMA 1
|
||||
#endif
|
||||
|
||||
/* Is DMA used on all (enabled) USARTs */
|
||||
|
||||
#define SERIAL_HAVE_ONLY_DMA 1
|
||||
#if defined(CONFIG_STM32F7_USART1) && !defined(CONFIG_USART1_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_USART2) && !defined(CONFIG_USART2_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_USART3) && !defined(CONFIG_USART3_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_UART4) && !defined(CONFIG_UART4_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_UART5) && !defined(CONFIG_UART5_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_USART6) && !defined(CONFIG_USART6_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_UART7) && !defined(CONFIG_UART7_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32F7_UART8) && !defined(CONFIG_UART8_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#endif
|
||||
|
||||
/* Is RS-485 used? */
|
||||
|
||||
#if defined(CONFIG_USART1_RS485) || defined(CONFIG_USART2_RS485) || \
|
||||
defined(CONFIG_USART3_RS485) || defined(CONFIG_UART4_RS485) || \
|
||||
defined(CONFIG_UART5_RS485) || defined(CONFIG_USART6_RS485) || \
|
||||
defined(CONFIG_UART7_RS485) || defined(CONFIG_UART8_RS485)
|
||||
# define HAVE_RS485 1
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_RS485
|
||||
# define USART_CR1_USED_INTS (USART_CR1_RXNEIE | USART_CR1_TXEIE | USART_CR1_PEIE | USART_CR1_TCIE)
|
||||
#else
|
||||
# define USART_CR1_USED_INTS (USART_CR1_RXNEIE | USART_CR1_TXEIE | USART_CR1_PEIE)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_serial_dma_poll
|
||||
*
|
||||
* Description:
|
||||
* Must be called periodically if any STM32 UART is configured for DMA. The DMA
|
||||
* callback is triggered for each FIFO size/2 bytes, but this can result in some
|
||||
* bytes being transferred but not collected if the incoming data is not a whole
|
||||
* multiple of half the FIFO size.
|
||||
*
|
||||
* May be safely called from either interrupt or thread context.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef SERIAL_HAVE_DMA
|
||||
void stm32_serial_dma_poll(void);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_STC_STM32F7_STM32_UART_H */
|
||||
Loading…
Reference in New Issue
Block a user