Beginning updates of SAM3U header files o include support for the SAM4S: WDT, SUPC, EEFC, MATRIX, and PMC
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@ -60,14 +60,14 @@
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/* Main oscillator register settings */
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#define BOARD_CKGR_MOR_MOSCXTST (63 << CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
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#define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
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/* PLLA configuration */
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#define BOARD_CKGR_PLLAR_MULA (7 << CKGR_PLLAR_MULA_SHIFT)
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#define BOARD_CKGR_PLLAR_STMODE CKGR_PLLAR_STMODE_FAST
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#define BOARD_CKGR_PLLAR_PLLACOUNT (63 << CKGR_PLLAR_PLLACOUNT_SHIFT)
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#define BOARD_CKGR_PLLAR_DIVA CKGR_PLLAR_DIVA_BYPASS
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#define BOARD_CKGR_PLLAR_MUL (7 << PMC_CKGR_PLLAR_MUL_SHIFT)
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#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST
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#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
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#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS
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/* PMC master clock register settings */
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@ -76,7 +76,7 @@
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/* USB UTMI PLL start-up time */
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#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << CKGR_UCKR_UPLLCOUNT_SHIFT)
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#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
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/* Resulting frequencies */
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