arch/mips/src/pic32mz/pic32mz-lowinit.c: Remove the pic32mz_k0cache function, this was actually enabling cache in KSEG2. Correct (as per the datasheet) the values for initializing the prefetch module. Add a function to disable all ADC inputs at startup. When ADC is used each pin will be enabled individually.
This commit is contained in:
Ouss4
Gregory Nutt
parent
54e09340d5
commit
0970d742e9
@ -50,6 +50,7 @@
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#include "hardware/pic32mz-features.h"
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#include "hardware/pic32mz-prefetch.h"
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#include "hardware/pic32mz-osc.h"
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#include "hardware/pic32mz-ioport.h"
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#include "pic32mz-config.h"
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#include "pic32mz-lowconsole.h"
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@ -58,16 +59,23 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Maximum Frequencies ******************************************************/
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#if CONFIG_PIC32MZ_ECC_OPTION == 3
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# define MAX_FLASH_HZ 83000000 /* Maximum FLASH speed (Hz) without ECC */
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#if (CONFIG_PIC32MZ_ECC_OPTION == 3) || (CONFIG_PIC32MZ_ECC_OPTION == 2)
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# define SYSCLK_MAX1 0
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# define SYSCLK_MAX2 74000000
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# define SYSCLK_MAX3 140000000
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# define SYSCLK_MAX4 200000000
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#else
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# define MAX_FLASH_HZ 66000000 /* Maximum FLASH speed (Hz) with ECC */
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# define SYSCLK_MAX1 0
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# define SYSCLK_MAX2 60000000
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# define SYSCLK_MAX3 120000000
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# define SYSCLK_MAX4 200000000
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#endif
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#define MAX_PBCLK 100000000 /* Max peripheral bus speed (Hz) */
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#define MAX_PBCLK7 200000000 /* Max peripheral bus speed (Hz) for PBCLK7 */
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#define MAX_PBCLK 100000000 /* Max peripheral bus speed (Hz) */
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#define MAX_PBCLK7 200000000 /* Max peripheral bus speed (Hz) for PBCLK7 */
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/* Sanity checks ************************************************************/
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@ -164,22 +172,6 @@
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# endif
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -201,63 +193,45 @@
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static inline void pic32mz_prefetch(void)
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{
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unsigned int nwaits;
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unsigned int residual;
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uint32_t regval;
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/* Configure pre-fetch cache FLASH wait states (assuming ECC is enabled).
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* REVISIT: Is this calculation right? It seems like residual should be
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*
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* residual = BOARD_CPU_CLOCK / nwaits
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*
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* This logic uses:
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*
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* BOARD_CPU_CLOCK - nwaits * MAX_FLASH_HZ
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*/
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/* Configure pre-fetch cache FLASH wait states */
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residual = BOARD_CPU_CLOCK;
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nwaits = 0;
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while (residual > MAX_FLASH_HZ)
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if (BOARD_CPU_CLOCK > SYSCLK_MAX1 && BOARD_CPU_CLOCK <= SYSCLK_MAX2)
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{
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nwaits++;
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residual -= MAX_FLASH_HZ;
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nwaits = 0;
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/* Don't enable predictive prefetch for wait states = 0 */
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regval = PRECON_PREFEN_DISABLE;
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}
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else if (BOARD_CPU_CLOCK > SYSCLK_MAX2 && BOARD_CPU_CLOCK <= SYSCLK_MAX3)
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{
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nwaits = 1;
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regval = PRECON_PREFEN_CPUID;
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}
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else if (BOARD_CPU_CLOCK > SYSCLK_MAX3 && BOARD_CPU_CLOCK <= SYSCLK_MAX4)
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{
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nwaits = 2;
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regval = PRECON_PREFEN_CPUID;
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}
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else
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{
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/* For devices with 252 Mhz SYSCLK */
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nwaits = 4;
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regval = PRECON_PREFEN_CPUID;
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}
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DEBUGASSERT(nwaits < 8);
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regval |= PRECON_PFMWS(nwaits);
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/* Set the FLASH wait states and enabled prefetch on CPU instructions and
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* data.
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/* Set the FLASH wait states and enable prefetch on CPU instructions
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* and data when required.
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*/
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regval = (PRECON_PREFEN_CPUID | PRECON_PFMWS(nwaits));
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putreg32(regval, PIC32MZ_PRECON);
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}
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/****************************************************************************
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* Name: pic32mz_k0cache
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*
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* Description:
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* Enable caching in KSEG0.
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*
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* Assumptions:
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* Interrupts are disabled.
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*
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****************************************************************************/
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static inline void pic32mz_k0cache(void)
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{
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register uint32_t regval;
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/* Enable cache on KSEG 0 in the CP0 CONFIG register */
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asm("\tmfc0 %0,$16,0\n" : "=r"(regval));
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regval &= ~CP0_CONFIG_K23_MASK;
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regval |= CP0_CONFIG_K23_CACHEABLE;
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asm("\tmtc0 %0,$16,0\n" : : "r" (regval));
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UNUSED(regval);
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}
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/****************************************************************************
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* Name: pic32mz_pbclk
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*
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@ -375,6 +349,58 @@ static inline void pic32mz_pbclk(void)
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putreg32(regval, PIC32MZ_PB8DIV);
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}
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/****************************************************************************
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* Name: pic32mz_adcdisable
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*
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* Description:
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* Disable adc inputs in all pins.
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*
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* Assumptions:
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*
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****************************************************************************/
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static inline void pic32mz_adcdisable(void)
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{
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putreg32(0xffffffff, PIC32MZ_IOPORTA_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#if CHIP_NPORTS > 1
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putreg32(0xffffffff, PIC32MZ_IOPORTB_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 2
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putreg32(0xffffffff, PIC32MZ_IOPORTC_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 3
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putreg32(0xffffffff, PIC32MZ_IOPORTD_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 4
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putreg32(0xffffffff, PIC32MZ_IOPORTE_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 5
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putreg32(0xffffffff, PIC32MZ_IOPORTF_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 6
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putreg32(0xffffffff, PIC32MZ_IOPORTG_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 7
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putreg32(0xffffffff, PIC32MZ_IOPORTH_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 8
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putreg32(0xffffffff, PIC32MZ_IOPORTJ_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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#if CHIP_NPORTS > 9
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putreg32(0xffffffff, PIC32MZ_IOPORTK_K1BASE +
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PIC32MZ_IOPORT_ANSELCLR_OFFSET);
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#endif
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -396,14 +422,14 @@ void pic32mz_lowinit(void)
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pic32mz_prefetch();
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/* Enable caching in KSEG0 */
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pic32mz_k0cache();
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/* Configure peripheral clocking */
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pic32mz_pbclk();
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/* Init IO pins (Disable all ADC circuits) */
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pic32mz_adcdisable();
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/* Initialize a console (probably a serial console) */
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pic32mz_consoleinit();
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