Merged in raiden00/nuttx (pull request #513)
Master * stm32f33xxx_adc.c: fix some warnings and compilation error when extsel not in use * nucleo-f334r8/adc: change serial console to USART2 (STLINK COM) Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Mateusz Szafoni
Gregory Nutt
parent
cf5cba953d
commit
09f3e9ce5c
@ -315,6 +315,30 @@
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(ADC2_SMP17 << ADC_SMPR2_SMP17_SHIFT) | \
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(ADC2_SMP18 << ADC_SMPR2_SMP18_SHIFT))
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/* Last bit of the extsel fields indicate if external trigger is in use */
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#define HAVE_EXTSEL_MASK (1<<8)
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#if defined(ADC1_HAVE_TIMER) || defined(ADC1_HAVE_HRTIM) || defined(ADC1_HAVE_EXTI)
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# define ADC1_HAVE_EXTSEL 1
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#else
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# undef ADC1_HAVE_EXTSEL
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#endif
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#if defined(ADC2_HAVE_TIMER) || defined(ADC2_HAVE_HRTIM) || defined(ADC2_HAVE_EXTI)
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# define ADC2_HAVE_EXTSEL 1
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#else
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# undef ADC2_HAVE_EXTSEL
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#endif
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#if defined(ADC1_HAVE_EXTSEL) || defined(ADC2_HAVE_EXTSEL)
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# define ADC_HAVE_EXTSEL
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#endif
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#if defined(ADC1_HAVE_JEXTSEL) || defined(ADC2_HAVE_JEXTSEL)
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# define ADC_HAVE_JEXTSEL
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -324,7 +348,7 @@
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struct stm32_dev_s
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{
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FAR const struct adc_callback_s *cb;
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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uint8_t irq; /* Interrupt generated by this ADC block */
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#endif
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uint8_t nchannels; /* Number of channels */
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@ -340,15 +364,19 @@ struct stm32_dev_s
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uint8_t trigger; /* Timer trigger channel: 0=CC1, 1=CC2, 2=CC3,
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* 3=CC4, 4=TRGO */
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#endif
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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xcpt_t isr; /* Interrupt handler for this ADC block */
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#endif
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uint32_t base; /* Base address of registers unique to this ADC
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* block */
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uint32_t smp1; /* Sample time part 1 */
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uint32_t smp2; /* Sample time part 2 */
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uint32_t smp1; /* Sample time part 1 */
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uint32_t smp2; /* Sample time part 2 */
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#ifdef ADC_HAVE_EXTSEL
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uint32_t extsel; /* EXTSEL value used by this ADC block */
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#endif
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#ifdef ADC_HAVE_JEXTSEL
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uint32_t jextsel; /* JEXTSEL value used by this ADC block */
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#endif
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#ifdef ADC_HAVE_TIMER
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uint32_t tbase; /* Base address of timer used by this ADC block */
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uint32_t pclck; /* The PCLK frequency that drives this timer */
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@ -457,7 +485,7 @@ static const struct adc_ops_s g_adcops =
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#ifdef CONFIG_STM32_ADC1
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static struct stm32_dev_s g_adcpriv1 =
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{
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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.irq = STM32_IRQ_ADC12,
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.isr = adc12_interrupt,
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#endif
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@ -465,8 +493,12 @@ static struct stm32_dev_s g_adcpriv1 =
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.base = STM32_ADC1_BASE,
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.smp1 = ADC1_SMPR1,
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.smp2 = ADC1_SMPR2,
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.extsel = ADC1_EXTSEL_VALUE,
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.jextsel = ADC1_JEXTSEL_VALUE,
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#if defined(ADC1_HAVE_EXTSEL)
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.extsel = ADC1_EXTSEL_VALUE | HAVE_EXTSEL_MASK,
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#endif
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#if defined(ADC1_HAVE_JEXTSEL)
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.jextsel = ADC1_JEXTSEL_VALUE | HAVE_EXTSEL_MASK,
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#endif
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#ifdef ADC1_HAVE_TIMER
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.trigger = CONFIG_STM32_ADC1_TIMTRIG,
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.tbase = ADC1_TIMER_BASE,
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@ -491,7 +523,7 @@ static struct adc_dev_s g_adcdev1 =
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#ifdef CONFIG_STM32_ADC2
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static struct stm32_dev_s g_adcpriv2 =
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{
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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.irq = STM32_IRQ_ADC12,
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.isr = adc12_interrupt,
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#endif
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@ -499,8 +531,12 @@ static struct stm32_dev_s g_adcpriv2 =
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.base = STM32_ADC2_BASE,
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.smp1 = ADC2_SMPR1,
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.smp2 = ADC2_SMPR2,
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.extsel = ADC2_EXTSEL_VALUE,
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.jextsel = ADC2_JEXTSEL_VALUE,
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#ifdef ADC2_HAVE_EXTSEL
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.extsel = ADC2_EXTSEL_VALUE | HAVE_EXTSEL_MASK,
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#endif
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#ifdef ADC2_HAVE_JEXTSEL
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.jextsel = ADC2_JEXTSEL_VALUE | HAVE_EXTSEL_MASK,
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#endif
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#ifdef ADC2_HAVE_TIMER
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.trigger = CONFIG_STM32_ADC2_TIMTRIG,
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.tbase = ADC2_TIMER_BASE,
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@ -1416,7 +1452,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
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adc_modifyreg(priv, STM32_ADC_CFGR_OFFSET, clrbits, setbits);
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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/* Enable interrupt flags, but disable overrun interrupt */
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clrbits = ADC_IER_OVR;
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@ -1488,16 +1524,27 @@ static void adc_reset(FAR struct adc_dev_s *dev)
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* position.
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*/
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ainfo("Initializing timers extsel = 0x%08x nad jextsel = 0x%08x\n",
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priv->extsel, priv->jextsel);
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#ifdef ADC_HAVE_EXTSEL
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if (priv->extsel & HAVE_EXTSEL_MASK)
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{
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ainfo("Initializing extsel = 0x%08x\n", (priv->extsel & ~HAVE_EXTSEL_MASK));
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adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
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ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
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ADC_EXTREG_EXTEN_DEFAULT | priv->extsel);
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adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
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ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
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ADC_EXTREG_EXTEN_DEFAULT | (priv->extsel & ~HAVE_EXTSEL_MASK));
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}
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#endif
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adc_modifyreg(priv, STM32_ADC_JEXTREG_OFFSET,
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ADC_JEXTREG_JEXTEN_MASK | ADC_JEXTREG_JEXTSEL_MASK,
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ADC_JEXTREG_JEXTEN_DEFAULT | priv->jextsel);
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#ifdef ADC_HAVE_JEXTSEL
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if (priv->jextsel & HAVE_EXTSEL_MASK)
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{
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ainfo("Initializing jextsel = 0x%08x\n", (priv->jextsel & ~HAVE_EXTSEL_MASK));
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adc_modifyreg(priv, STM32_ADC_JEXTREG_OFFSET,
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ADC_JEXTREG_JEXTEN_MASK | ADC_JEXTREG_JEXTSEL_MASK,
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ADC_JEXTREG_JEXTEN_DEFAULT | (priv->jextsel & ~HAVE_EXTSEL_MASK));
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}
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#endif
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#ifdef ADC_HAVE_TIMER
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if (priv->tbase != 0)
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@ -1555,12 +1602,14 @@ static void adc_reset(FAR struct adc_dev_s *dev)
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static int adc_setup(FAR struct adc_dev_s *dev)
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{
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#ifndef CONFIG_STM32_ADC_NOIRQ
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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#endif
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int ret;
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/* Attach the ADC interrupt */
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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ret = irq_attach(priv->irq, priv->isr, NULL);
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if (ret < 0)
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{
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@ -1575,7 +1624,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
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/* Enable the ADC interrupt */
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
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up_enable_irq(priv->irq);
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#endif
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@ -1604,7 +1653,7 @@ static void adc_shutdown(FAR struct adc_dev_s *dev)
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/* Disable ADC interrupts and detach the ADC interrupt handler */
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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#endif
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@ -1779,7 +1828,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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static int adc_interrupt(FAR struct adc_dev_s *dev)
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{
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FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
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@ -1866,7 +1915,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_ADC_NOIRQ
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#ifndef CONFIG_STM32_ADC_NOIRQ
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static int adc12_interrupt(int irq, FAR void *context, FAR void *arg)
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{
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#ifdef CONFIG_STM32_ADC1
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@ -93,10 +93,10 @@ CONFIG_STM32_ADC1=y
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CONFIG_STM32_DMA1=y
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CONFIG_STM32_JTAG_SW_ENABLE=y
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CONFIG_STM32_PWR=y
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CONFIG_STM32_USART1=y
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CONFIG_STM32_USART2=y
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CONFIG_TASK_NAME_SIZE=0
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CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=512
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CONFIG_USART1_SERIAL_CONSOLE=y
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CONFIG_USART2_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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CONFIG_USERMAIN_STACKSIZE=1024
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CONFIG_WDOG_INTRESERVE=0
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